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Mon, 29 Jan 2024 06:50:23 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40T6oNC2002546 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 29 Jan 2024 06:50:23 GMT Received: from [10.217.218.207] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Sun, 28 Jan 2024 22:50:14 -0800 Message-ID: Date: Mon, 29 Jan 2024 12:20:11 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 1/3] mmc: core: Add partial initialization support To: Ulf Hansson CC: Andy Gross , Bjorn Andersson , Konrad Dybcio , Adrian Hunter , , , , , , , , , , , , , , Veerabhadrarao Badiganti References: <20231019054612.9192-1-quic_sartgarg@quicinc.com> <20231019054612.9192-2-quic_sartgarg@quicinc.com> <21208de0-79bc-42c7-b32f-355daf5b09f0@quicinc.com> Content-Language: en-US From: Sarthak Garg In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 4RRZ3PVkPOHNZaSm6CJsg3skL3JrtV8D X-Proofpoint-ORIG-GUID: 4RRZ3PVkPOHNZaSm6CJsg3skL3JrtV8D X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-29_03,2024-01-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 impostorscore=0 clxscore=1011 priorityscore=1501 lowpriorityscore=0 adultscore=0 bulkscore=0 suspectscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401190000 definitions=main-2401290047 On 10/27/2023 3:23 PM, Ulf Hansson wrote: > [...] > >>>> +{ >>>> + int err = 0; >>>> + struct mmc_card *card = host->card; >>>> + >>>> + mmc_set_bus_width(host, host->cached_ios.bus_width); >>>> + mmc_set_timing(host, host->cached_ios.timing); >>>> + if (host->cached_ios.enhanced_strobe) { >>>> + host->ios.enhanced_strobe = true; >>>> + if (host->ops->hs400_enhanced_strobe) >>>> + host->ops->hs400_enhanced_strobe(host, &host->ios); >>>> + } >>>> + mmc_set_clock(host, host->cached_ios.clock); >>>> + mmc_set_bus_mode(host, host->cached_ios.bus_mode); >>>> + >>> >>> Rather than re-using the above APIs and the ->set_ios() callback in >>> the host, I believe it would be better to add a new host ops to manage >>> all of the above at once instead. Something along the lines of the >>> below, would then replace all of the above. >>> >>> host->ops->restore_ios(host, &host->cached_ios) >>> memcpy(&host->ios, &host->cached_ios, sizeof(host->ios)); >>> >>> Would that make sense to you too? >>> >> >> >> I didn't get this completely. Do you mean that we should implement a new >> restore_ios callback (e.g. sdhci_restore_ios) similar to sdhci_set_ios >> and removing all the redundant code from sdhci_set_ios which should >> achieve the behaviour same as calling all the above mmc_set_* API's ? > > Correct. Would it not simply the things in the driver too? > >> >> >>>> + if (!mmc_card_hs400es(card) && >>>> + (mmc_card_hs200(card) || mmc_card_hs400(card))) { >>>> + err = mmc_execute_tuning(card); >>>> + if (err) { >>>> + pr_err("%s: %s: Tuning failed (%d)\n", >>>> + mmc_hostname(host), __func__, err); >>> >>> There is already a print being done in mmc_execute_tuning() at >>> failure. So, let's drop the above print. >>> >> >> Sure will take care in V4. >> >>>> + goto out; >>>> + } >>>> + } >>>> + >>>> + err = mmc_test_awake_ext_csd(host); >>> >>> Again, I don't get why this is needed, so let's discuss this more. >>> >> >> This is just a safety check added because ext_csd has some W/E_P or >> W/C_P registers which gets reset if any HW reset happens to the card. >> So this will check for those cases if any other vendor is doing reset as >> part of suspend and compare a subset of those W/E_P and W/C_P registers >> and if they are changed then we will bail out of this partial init >> feature and go for full initialization. >> We are also fine with removing this function but just added for the >> above mentioned case. > > In that case, I would rather remove it as I think it's superfluous. > > More precisely, I would expect that we fail to wake up the card with a > CMD5 (get an error response for the CMD) if there has been a HW reset > somewhere done before. > > Another reason to *not* read the ext_csd would be to further improve > the resume time, as reading it takes time too. I would be curious to > know how much though. :-) > > [...] > > Kind regards > Uffe Hi ulf, Sorry for the delay but we are seeing some stability issues when testing this feature with HS400 cards which I am debugging and may take some time and will come back. Note: This feature is working perfectly fine with HS400ES cards.