From: poza@codeaurora.org
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
bhelgaas@google.com, linux-pci-owner@vger.kernel.org
Subject: Re: [PATCH] PCI/AER: Enable SERR# forwarding in non ACPI flow
Date: Fri, 13 Jul 2018 10:44:38 +0530 [thread overview]
Message-ID: <b5ba83a0fd8694905528f740a186b891@codeaurora.org> (raw)
In-Reply-To: <1531406719-18606-1-git-send-email-bharat.kumar.gogada@xilinx.com>
On 2018-07-12 20:15, Bharat Kumar Gogada wrote:
> Currently PCI_BRIDGE_CTL_SERR is being enabled only in
> ACPI flow.
> This bit is required for forwarding errors reported
> by EP devices to upstream device.
> This patch enables SERR# for Type-1 PCI device.
>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
> ---
> drivers/pci/pcie/aer.c | 23 +++++++++++++++++++++++
> 1 files changed, 23 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index a2e8838..943e084 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -343,6 +343,19 @@ int pci_enable_pcie_error_reporting(struct pci_dev
> *dev)
> if (!dev->aer_cap)
> return -EIO;
>
> + if (!IS_ENABLED(CONFIG_ACPI) &&
> + dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
> + u16 control;
> +
> + /*
> + * A Type-1 PCI bridge will not forward ERR_ messages coming
> + * from an endpoint if SERR# forwarding is not enabled.
> + */
> + pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &control);
> + control |= PCI_BRIDGE_CTL_SERR;
> + pci_write_config_word(dev, PCI_BRIDGE_CONTROL, control);
> + }
> +
> return pcie_capability_set_word(dev, PCI_EXP_DEVCTL,
> PCI_EXP_AER_FLAGS);
> }
> EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
> @@ -352,6 +365,16 @@ int pci_disable_pcie_error_reporting(struct
> pci_dev *dev)
> if (pcie_aer_get_firmware_first(dev))
> return -EIO;
>
> + if (!IS_ENABLED(CONFIG_ACPI) &&
> + dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
> + u16 control;
> +
> + /* Clear SERR Forwarding */
> + pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &control);
> + control &= ~PCI_BRIDGE_CTL_SERR;
> + pci_write_config_word(dev, PCI_BRIDGE_CONTROL, control);
> + }
> +
> return pcie_capability_clear_word(dev, PCI_EXP_DEVCTL,
> PCI_EXP_AER_FLAGS);
> }
Should this configuration no be set by Firmware ? why should Linux
dictate it ?
Regards,
Oza.
next prev parent reply other threads:[~2018-07-13 5:14 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-12 14:45 [PATCH] PCI/AER: Enable SERR# forwarding in non ACPI flow Bharat Kumar Gogada
2018-07-13 5:14 ` poza [this message]
2018-07-13 13:55 ` Bharat Kumar Gogada
2018-07-14 7:15 ` poza
2018-07-18 13:34 ` Bharat Kumar Gogada
2018-07-23 8:11 ` poza
2018-07-23 8:49 ` [RFC] SERR# handling by Linux poza
2018-07-26 13:18 ` [PATCH] PCI/AER: Enable SERR# forwarding in non ACPI flow Bharat Kumar Gogada
2018-07-31 22:47 ` Bjorn Helgaas
2018-08-01 16:07 ` Bharat Kumar Gogada
2018-08-02 6:23 ` poza
2018-08-02 6:26 ` poza
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