From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Yu Tu <yu.tu@amlogic.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Neil Armstrong <narmstrong@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: Re: [PATCH 1/3] dt-bindings: clk: meson: add S4 SoC clock controller bindings
Date: Tue, 12 Jul 2022 11:40:33 +0200 [thread overview]
Message-ID: <b7a33482-9bce-7ab1-43cb-3c93a5282490@linaro.org> (raw)
In-Reply-To: <20220708062757.3662-2-yu.tu@amlogic.com>
On 08/07/2022 08:27, Yu Tu wrote:
> Add new clock controller compatible and dt-bindings header for the
> Everything-Else domain of the S4 SoC.
>
> Signed-off-by: Yu Tu <yu.tu@amlogic.com>
> ---
> .../bindings/clock/amlogic,gxbb-clkc.txt | 1 +
> MAINTAINERS | 1 +
> include/dt-bindings/clock/s4-clkc.h | 354 ++++++++++++++++++
> 3 files changed, 356 insertions(+)
> create mode 100644 include/dt-bindings/clock/s4-clkc.h
>
> diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
> index 7ccecd5c02c1..301b43dea912 100644
> --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
> +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
> @@ -12,6 +12,7 @@ Required Properties:
> "amlogic,g12a-clkc" for G12A SoC.
> "amlogic,g12b-clkc" for G12B SoC.
> "amlogic,sm1-clkc" for SM1 SoC.
> + "amlogic,s4-clkc" for S4 SoC.
> - clocks : list of clock phandle, one for each entry clock-names.
> - clock-names : should contain the following:
> * "xtal": the platform xtal
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c1abc53f9e91..e4ca46c5c8a1 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1775,6 +1775,7 @@ F: Documentation/devicetree/bindings/clock/amlogic*
> F: drivers/clk/meson/
> F: include/dt-bindings/clock/gxbb*
> F: include/dt-bindings/clock/meson*
> +F: include/dt-bindings/clock/s*
>
> ARM/Amlogic Meson SoC Crypto Drivers
> M: Corentin Labbe <clabbe@baylibre.com>
> diff --git a/include/dt-bindings/clock/s4-clkc.h b/include/dt-bindings/clock/s4-clkc.h
> new file mode 100644
> index 000000000000..8b46d54d79fe
> --- /dev/null
> +++ b/include/dt-bindings/clock/s4-clkc.h
> @@ -0,0 +1,354 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
> +/*
> + * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
> + * Author: Yu Tu <yu.tu@amlogic.com>
> + */
> +
> +#ifndef __S4_CLKC_H
> +#define __S4_CLKC_H
Use header guards mathcing paths. See other files for examples.
> +
> +/*
> + * CLKID index values
> + */
> +
> +#define CLKID_PLL_BASE 0
> +#define CLKID_FIXED_PLL_DCO (CLKID_PLL_BASE + 0)
Drop CLKID_PLL_BASE
> +#define CLKID_FIXED_PLL (CLKID_PLL_BASE + 1)
ditto... and so on.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-07-12 9:40 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-08 6:27 [PATCH 0/3] Add S4 SoC clock controller driver Yu Tu
2022-07-08 6:27 ` [PATCH 1/3] dt-bindings: clk: meson: add S4 SoC clock controller bindings Yu Tu
2022-07-11 12:25 ` Jerome Brunet
2022-07-19 5:30 ` Yu Tu
2022-07-12 9:40 ` Krzysztof Kozlowski [this message]
2022-07-19 5:55 ` Yu Tu
2022-07-08 6:27 ` [PATCH 2/3] arm64: dts: meson: add S4 Soc clock controller in DT Yu Tu
2022-07-12 9:41 ` Krzysztof Kozlowski
2022-07-19 5:57 ` Yu Tu
2022-07-08 6:27 ` [PATCH 3/3] clk: meson: s4: add s4 SoC clock controller driver Yu Tu
2022-07-11 12:22 ` Jerome Brunet
2022-07-19 5:53 ` Yu Tu
2022-07-12 9:44 ` Krzysztof Kozlowski
2022-07-19 6:02 ` Yu Tu
2022-07-19 6:29 ` Krzysztof Kozlowski
2022-07-19 6:58 ` Yu Tu
2022-07-19 7:29 ` Krzysztof Kozlowski
2022-07-19 7:33 ` Yu Tu
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