From: Liang Yang <liang.yang@amlogic.com>
To: Boris Brezillon <boris.brezillon@bootlin.com>,
Jianxin Pan <jianxin.pan@amlogic.com>
Cc: <linux-mtd@lists.infradead.org>,
Yixun Lan <yixun.lan@amlogic.com>,
David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Marek Vasut <marek.vasut@gmail.com>,
Richard Weinberger <richard@nod.at>,
Jerome Brunet <jbrunet@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Carlo Caione <carlo@caione.org>,
Kevin Hilman <khilman@baylibre.com>,
Rob Herring <robh@kernel.org>, Jian Hu <jian.hu@amlogic.com>,
Hanjie Lin <hanjie.lin@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
<linux-amlogic@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 2/2] mtd: rawnand: meson: add support for Amlogic NAND flash controller
Date: Fri, 19 Oct 2018 16:04:09 +0800 [thread overview]
Message-ID: <b80f2e72-7ad5-9f37-a059-87b1d8344e7b@amlogic.com> (raw)
In-Reply-To: <20181018223943.145e5497@bbrezillon>
On 2018/10/19 4:39, Boris Brezillon wrote:
> On Thu, 18 Oct 2018 13:09:05 +0800
> Jianxin Pan <jianxin.pan@amlogic.com> wrote:
>
>> +static int meson_nfc_calc_set_timing(struct meson_nfc *nfc,
>> + const struct nand_sdr_timings *timings)
>> +{
>> + struct nand_timing *timing = &nfc->timing;
>> + int div, bt_min, bt_max, bus_timing;
>> + int ret;
>> +
>> + div = DIV_ROUND_UP((timings->tRC_min / 1000), NFC_CLK_CYCLE);
>> + ret = clk_set_rate(nfc->device_clk, 1000000000 / div);
>> + if (ret) {
>> + dev_err(nfc->dev, "failed to set nand clock rate\n");
>> + return ret;
>> + }
>> +
>> + timing->twb = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tWB_max),
>> + div * NFC_CLK_CYCLE);
>> + timing->tadl = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tADL_min),
>> + div * NFC_CLK_CYCLE);
>> + timing->twhr = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tWHR_min),
>> + div * NFC_CLK_CYCLE);
>> +
>> + bt_min = (timings->tREA_max + NFC_DEFAULT_DELAY) / div;
>> + bt_max = (NFC_DEFAULT_DELAY + timings->tRHOH_min
>> + + timings->tRC_min / 2) / div;
>> +
>> + bt_min = DIV_ROUND_UP(bt_min, 1000);
>> + bt_max = DIV_ROUND_UP(bt_max, 1000);
>> +
>> + if (bt_max < bt_min)
>> + return -EINVAL;
>> +
>> + bus_timing = (bt_min + bt_max) / 2 + 1;
>> +
>> + writel((1 << 21), nfc->reg_base + NFC_REG_CFG);
>> + writel((NFC_CLK_CYCLE - 1) | (bus_timing << 5),
>> + nfc->reg_base + NFC_REG_CFG);
>> +
>> + writel((1 << 31), nfc->reg_base + NFC_REG_CMD);
>> +
>> + return 0;
>> +}
>> +
>> +static int
>> +meson_nfc_setup_data_interface(struct nand_chip *nand, int csline,
>> + const struct nand_data_interface *conf)
>> +{
>> + struct meson_nfc *nfc = nand_get_controller_data(nand);
>> + const struct nand_sdr_timings *timings;
>> +
>> + timings = nand_get_sdr_timings(conf);
>> + if (IS_ERR(timings))
>> + return -ENOTSUPP;
>> +
>> + if (csline == NAND_DATA_IFACE_CHECK_ONLY)
>> + return 0;
>
> Hm, before saying you supporting the requested timing, you should make
> sure they are actually supported. I'd recommend splitting this in 2
> steps:
>
> 1/ calc timings
> 2/ store the timings in the chip priv struct so that they can be
> applied next time ->select_chip() is called.
>
ok, i will try to split.
>> +
>> + meson_nfc_calc_set_timing(nfc, timings);
> > You should not set the timing from ->setup_data_interface(), just
> calculate them, make sure they are supported and store the state in the
> private chip struct. Applying those timings should be done in
> ->select_chip(), so that you can support 2 chips with different timings.
>
em, i will fix it.
>> + return 0;
>> +}
>
> .
>
next prev parent reply other threads:[~2018-10-19 8:04 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-18 5:09 [PATCH v5 0/2] mtd: rawnand: meson: add Amlogic NAND driver support Jianxin Pan
2018-10-18 5:09 ` [PATCH v5 1/2] dt-bindings: nand: meson: add Amlogic NAND controller driver Jianxin Pan
2018-10-18 16:48 ` Rob Herring
2018-10-18 5:09 ` [PATCH v5 2/2] mtd: rawnand: meson: add support for Amlogic NAND flash controller Jianxin Pan
2018-10-18 14:24 ` Boris Brezillon
2018-10-19 7:29 ` Liang Yang
2018-10-18 19:33 ` Boris Brezillon
2018-10-19 7:29 ` Liang Yang
2018-10-19 8:10 ` Boris Brezillon
2018-10-19 8:30 ` Liang Yang
2018-10-18 20:34 ` Boris Brezillon
2018-10-18 20:39 ` Boris Brezillon
2018-10-19 8:04 ` Liang Yang [this message]
2018-10-18 20:50 ` Boris Brezillon
2018-10-19 8:29 ` Liang Yang
2018-10-19 8:42 ` Boris Brezillon
2018-10-19 9:01 ` Liang Yang
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