From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Rob Herring" <robh+dt@kernel.org>,
"Andreas Färber" <afaerber@suse.de>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 10/13] arm: dts: owl-s500: Add SIRQ controller
Date: Tue, 29 Dec 2020 23:17:25 +0200 [thread overview]
Message-ID: <b900425518af75a2ba60d0923c52d261e0aeff98.1609263738.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1609263738.git.cristian.ciocaltea@gmail.com>
Add SIRQ controller node for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 55f8b8c2e149..cd635f222d26 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -233,6 +233,16 @@ i2c3: i2c@b017c000 {
status = "disabled";
};
+ sirq: interrupt-controller@b01b0200 {
+ compatible = "actions,s500-sirq";
+ reg = <0xb01b0200 0x4>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ0 */
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ1 */
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; /* SIRQ2 */
+ };
+
timer: timer@b0168000 {
compatible = "actions,s500-timer";
reg = <0xb0168000 0x8000>;
--
2.30.0
next prev parent reply other threads:[~2020-12-29 21:19 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-29 21:17 [PATCH v3 00/13] Add CMU/RMU/DMA/MMC/I2C support for Actions Semi Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 01/13] arm: dts: owl-s500: Add Clock Management Unit Cristian Ciocaltea
[not found] ` <50c0be54-bcce-5c59-4749-a47d69271e6a@castello.eng.br>
2021-01-09 16:32 ` Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 02/13] arm: dts: owl-s500: Set CMU clocks for UARTs Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 03/13] arm: dts: owl-s500: Add Reset controller Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 04/13] dt-bindings: dma: owl: Add compatible string for Actions Semi S500 SoC Cristian Ciocaltea
2021-01-06 6:22 ` Vinod Koul
2020-12-29 21:17 ` [PATCH v3 05/13] dmaengine: owl: Add compatible for the Actions Semi S500 DMA controller Cristian Ciocaltea
2021-01-06 6:22 ` Vinod Koul
2020-12-29 21:17 ` [PATCH v3 06/13] arm: dts: owl-s500: Add " Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 07/13] arm: dts: owl-s500: Add pinctrl & GPIO support Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 08/13] arm: dts: owl-s500: Add MMC support Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 09/13] arm: dts: owl-s500: Add I2C support Cristian Ciocaltea
2020-12-29 21:17 ` Cristian Ciocaltea [this message]
2020-12-29 21:17 ` [PATCH v3 11/13] arm: dts: owl-s500-roseapplepi: Add uSD support Cristian Ciocaltea
2020-12-31 7:27 ` Manivannan Sadhasivam
2020-12-31 9:05 ` Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 12/13] arm: dts: owl-s500-roseapplepi: Add I2C pinctrl configuration Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 13/13] MAINTAINERS: Add linux-actions ML for Actions Semi Arch Cristian Ciocaltea
2020-12-31 7:54 ` [PATCH v3 00/13] Add CMU/RMU/DMA/MMC/I2C support for Actions Semi Manivannan Sadhasivam
2020-12-31 9:12 ` Cristian Ciocaltea
2020-12-31 17:12 ` Manivannan Sadhasivam
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