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Wed, 23 Jan 2019 17:54:26 -0800 (PST) Subject: Re: [PATCH v7 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings To: Mason Yang , broonie@kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, bbrezillon@kernel.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , sergei.shtylyov@cogentembedded.com Cc: juliensu@mxic.com.tw, Simon Horman , zhengxunli@mxic.com.tw References: <1548227352-14910-1-git-send-email-masonccyang@mxic.com.tw> <1548227352-14910-3-git-send-email-masonccyang@mxic.com.tw> From: Marek Vasut Openpgp: preference=signencrypt Message-ID: Date: Thu, 24 Jan 2019 02:53:06 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: <1548227352-14910-3-git-send-email-masonccyang@mxic.com.tw> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/23/19 8:09 AM, Mason Yang wrote: > Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. > > Signed-off-by: Mason Yang > --- > .../devicetree/bindings/spi/spi-renesas-rpc.txt | 46 ++++++++++++++++++++++ > 1 file changed, 46 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > > diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > new file mode 100644 > index 0000000..305bd10 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > @@ -0,0 +1,46 @@ > +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings > +-------------------------------------------------------------------- > + > +Required properties: > +- compatible: should be an SoC-specific compatible value, followed by > + "renesas,rcar-gen3-rpc" as a fallback, i.e., > + "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc". > + "renesas,r8a7795-rpc" (R-Car H3) > + "renesas,r8a7796-rpc" (R-Car M3-W) > + "renesas,r8a77965-rpc" (R-Car M3-N) > + "renesas,r8a77970-rpc" (R-Car V3M) > + "renesas,r8a77980-rpc" (R-Car V3H) > + "renesas,r8a77990-rpc" (R-Car E3) > + "renesas,r8a77995-rpc" (R-Car D3) Was it tested on all of those SoCs and do we already handle all the quirks of those ? > +- reg: should contain three register areas: > + first for the base address of rpc-if registers, > + second for the direct mapping read mode and > + third for the write buffer area. > +- reg-names: should contain "regs", "dirmap" and "wbuf" > +- clocks: should contain 1 entries for the module's clock > +- clock-names: should contain "rpc" > +- #address-cells: should be 1 > +- #size-cells: should be 0 > + > +Example: > + > + rpc: rpc@ee200000 { > + compatible = "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc"; > + reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x4000000>, > + <0 0xee208000 0 0x100>; > + reg-names = "regs", "dirmap", "wbuf"; > + clocks = <&cpg CPG_MOD 917>; > + clock-names = "rpc"; > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > + resets = <&cpg 917>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <40000000>; > + spi-tx-bus-width = <1>; > + spi-rx-bus-width = <1>; Is the bus width really 1 or is it 4 on the D3 ? > + }; > + }; > -- Best regards, Marek Vasut