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* [PATCH v2] mmc:sdhci-pci: Add Support of O2Mirco/BayHubTech SD Host
@ 2013-10-16  7:26 Peter Guo
  2013-10-16  8:15 ` Adam Lee
  0 siblings, 1 reply; 6+ messages in thread
From: Peter Guo @ 2013-10-16  7:26 UTC (permalink / raw)
  To: Chris Ball, Adrian Hunter, Greg Kroah-Hartman, Bill Pemberton,
	Guennadi Liakhovetski, linux-mmc, linux-kernel
  Cc: adam.lee, Samuel Guan, Xiaoguang Yu, Shirley Her, Yuxiang Wan

Add O2Micro/BayHubTech SD Host DeviceId 8520 support and specified Init.
Apply SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 for SD Host Controller.
Apply SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC for SD Host Controller.

Signed-off-by: peter.guo <peter.guo@bayhubtech.com>
---
 drivers/mmc/host/sdhci-pci.c |  208 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 208 insertions(+)

diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index d7d6bc8..b0611f0 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -364,11 +364,155 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
 #define O2_SD_ADMA1		0xE2
 #define O2_SD_ADMA2		0xE7
 #define O2_SD_INF_MOD		0xF1
+#define	O2_SD_PLL_SETTING	0x304
+#define	O2_SD_CLK_SETTING	0x328
+#define	O2_SD_UHS1_CAP_SETTING	0x33C
+#define	O2_SD_VENDOR_SETTING 0x110
+
+#define PCI_DEVICE_ID_FUJIN2		0x8520
+
+static void o2_host_pci_init(struct sdhci_pci_chip *chip)
+{
+	u32 scratch_32;
+	int ret;
+	/* Improve write performance for SD3.0 */
+	ret = pci_read_config_dword(chip->pdev, 0x88, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~((1 << 12) | (1 << 13) | (1 << 14));
+	pci_write_config_dword(chip->pdev, 0x88, scratch_32);
+
+
+	/* Enable Link abnormal reset generating Reset */
+	ret = pci_read_config_dword(chip->pdev, 0x64, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~((1 << 19) | (1 << 11));
+	scratch_32 |= (1 << 10);
+	pci_write_config_dword(chip->pdev, 0x64, scratch_32);
+
+	/* set card power over current protection	*/
+	ret = pci_read_config_dword(chip->pdev, 0xd4, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 |= (1 << 4);
+	pci_write_config_dword(chip->pdev, 0xd4, scratch_32);
+
+	/* Set timeout CLK */
+	ret = pci_read_config_dword(chip->pdev,
+				O2_SD_CLK_SETTING, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0xFF00);
+	scratch_32 |= 0x07E0C800;
+	pci_write_config_dword(chip->pdev,
+				O2_SD_CLK_SETTING, scratch_32);
+
+	/* adjust the output delay for SD mode */
+	pci_write_config_dword(chip->pdev, 0x350, 0x00002492);
+
+	/* Set the output voltage setting of Aux 1.2v LDO */
+	ret = pci_read_config_dword(chip->pdev,
+				0x68, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(3 << 12);
+	pci_write_config_dword(chip->pdev,
+				0x68, scratch_32);
+
+	/* Set Max power supply capability of SD host */
+	ret = pci_read_config_dword(chip->pdev,
+				0x334, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0x01FE);
+	scratch_32 |= 0x00CC;
+	pci_write_config_dword(chip->pdev,
+				0x334, scratch_32);
+	/* Set DLL Tuning Window */
+	ret = pci_read_config_dword(chip->pdev,
+				0x300, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0x000000FF);
+	scratch_32 |= 0x00000066;
+	pci_write_config_dword(chip->pdev,
+				0x300, scratch_32);
+
+	/* Set UHS2 T_EIDLE */
+	ret = pci_read_config_dword(chip->pdev,
+				0x35C, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0x000000FC);
+	scratch_32 |= 0x00000084;
+	pci_write_config_dword(chip->pdev,
+				0x35C, scratch_32);
+
+	/* Set UHS2 Termination */
+	ret = pci_read_config_dword(chip->pdev,
+				0x3E0, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~((1 << 21) | (1 << 30));
+
+	/* Set RTD3 function disabled */
+	scratch_32 |= ((1 << 29) | (1 << 28));
+	pci_write_config_dword(chip->pdev,
+				0x3E0, scratch_32);
+
+	/* Set L1 Entrance Timer */
+	ret = pci_read_config_dword(chip->pdev,
+				O2_SD_CAPS, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0xf0000000);
+	scratch_32 |= 0x30000000;
+	pci_write_config_dword(chip->pdev,
+				O2_SD_CAPS, scratch_32);
+
+	ret = pci_read_config_dword(chip->pdev,
+				0xfc, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0x000f0000);
+	scratch_32 |= 0x00080000;
+	pci_write_config_dword(chip->pdev,
+				0xfc, scratch_32);
+}
+
+static int o2_probe_slot(struct sdhci_pci_slot *slot)
+{
+	struct sdhci_pci_chip	*chip;
+	struct sdhci_host	*host;
+	u32			reg;
+
+	chip = slot->chip;
+	host = slot->host;
+	switch (chip->pdev->device) {
+	case PCI_DEVICE_ID_FUJIN2:
+		reg = sdhci_readl(host, O2_SD_VENDOR_SETTING);
+		if (reg & 0x1)
+			host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
+
+		/* set dll watch dog timer	*/
+		reg = sdhci_readl(host, 0x1C8);
+		reg |= (1 << 12);
+		sdhci_writel(host, reg, 0x1C8);
+
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
 
 static int o2_probe(struct sdhci_pci_chip *chip)
 {
 	int ret;
 	u8 scratch;
+	u32 scratch_32;
 
 	switch (chip->pdev->device) {
 	case PCI_DEVICE_ID_O2_8220:
@@ -419,6 +563,52 @@ static int o2_probe(struct sdhci_pci_chip *chip)
 			return ret;
 		scratch |= 0x80;
 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+		break;
+
+	case PCI_DEVICE_ID_FUJIN2:
+	    /* UnLock WP */
+		ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
+		if (ret)
+			return ret;
+		scratch &= 0x7f;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+
+		ret = pci_read_config_dword(chip->pdev,
+				O2_SD_PLL_SETTING, &scratch_32);
+		if (ret)
+			return ret;
+		scratch_32 &= ~(0x1F3F070E);
+		scratch_32 |= 0x18270106;
+		pci_write_config_dword(chip->pdev,
+				O2_SD_PLL_SETTING, scratch_32);
+
+		o2_host_pci_init(chip);
+
+
+		/* Disable ADMA1/ADMA2/ADMA3*/
+		ret = pci_read_config_dword(chip->pdev, 0x330, &scratch_32);
+		if (ret)
+			return ret;
+		scratch_32 &= ~(0xE6);
+		pci_write_config_dword(chip->pdev, 0x330, scratch_32);
+
+		ret = pci_read_config_dword(chip->pdev,
+				O2_SD_CLKREQ, &scratch_32);
+		if (ret)
+			return ret;
+		scratch_32 |= 0x3;
+		pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32);
+
+
+		/* Lock WP */
+		ret = pci_read_config_byte(chip->pdev,
+				O2_SD_LOCK_WP, &scratch);
+		if (ret)
+			return ret;
+		scratch |= 0x80;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+
+		break;
 	}
 
 	return 0;
@@ -613,8 +803,18 @@ static int jmicron_resume(struct sdhci_pci_chip *chip)
 	return 0;
 }
 
+static int o2_resume(struct sdhci_pci_chip *chip)
+{
+	o2_probe(chip);
+	return 0;
+}
+
+
 static const struct sdhci_pci_fixes sdhci_o2 = {
 	.probe		= o2_probe,
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.probe_slot = o2_probe_slot,
+	.resume		= o2_resume,
 };
 
 static const struct sdhci_pci_fixes sdhci_jmicron = {
@@ -979,6 +1179,14 @@ static const struct pci_device_id pci_ids[] = {
 		.driver_data	= (kernel_ulong_t)&sdhci_o2,
 	},
 
+	{
+		.vendor		= PCI_VENDOR_ID_O2,
+		.device		= PCI_DEVICE_ID_FUJIN2,
+		.subvendor	= PCI_ANY_ID,
+		.subdevice	= PCI_ANY_ID,
+		.driver_data	= (kernel_ulong_t)&sdhci_o2,
+	},
+
 	{	/* Generic SD host controller */
 		PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
 	},
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] mmc:sdhci-pci: Add Support of O2Mirco/BayHubTech SD Host
  2013-10-16  7:26 [PATCH v2] mmc:sdhci-pci: Add Support of O2Mirco/BayHubTech SD Host Peter Guo
@ 2013-10-16  8:15 ` Adam Lee
  2013-10-23  3:49   ` Peter Guo
                     ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Adam Lee @ 2013-10-16  8:15 UTC (permalink / raw)
  To: Peter Guo, Chris Ball
  Cc: Adrian Hunter, Greg Kroah-Hartman, Bill Pemberton,
	Guennadi Liakhovetski, linux-mmc, linux-kernel, Samuel Guan,
	Xiaoguang Yu, Shirley Her, Yuxiang Wan

On Wed, Oct 16, 2013 at 07:26:23AM +0000, Peter Guo wrote:
> Add O2Micro/BayHubTech SD Host DeviceId 8520 support and specified Init.
> Apply SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 for SD Host Controller.
> Apply SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC for SD Host Controller.
> 
> Signed-off-by: peter.guo <peter.guo@bayhubtech.com>
> ---
>  drivers/mmc/host/sdhci-pci.c |  208 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 208 insertions(+)

I'm enabling "O2 Micro, Inc. Device [1217:8520]" on some laptops, it
works after this patch applied.

Chris, please take a look? Thanks.

Tested-by: Adam Lee <adam.lee@canonical.com>

-- 
Adam Lee

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH v2] mmc:sdhci-pci: Add Support of O2Mirco/BayHubTech SD Host
  2013-10-16  8:15 ` Adam Lee
@ 2013-10-23  3:49   ` Peter Guo
  2013-10-27 13:02     ` Chris Ball
  2013-10-29 10:56   ` [PATCH] mmc:sdhci fix 2 tuning issues in sdchi_exectuing_tuning Peter Guo
  2013-11-06 11:14   ` Peter Guo
  2 siblings, 1 reply; 6+ messages in thread
From: Peter Guo @ 2013-10-23  3:49 UTC (permalink / raw)
  To: Chris Ball
  Cc: Adrian Hunter, Greg Kroah-Hartman, Bill Pemberton,
	Guennadi Liakhovetski, linux-mmc, linux-kernel, Samuel Guan,
	Xiaoguang Yu, Shirley Her, Yuxiang Wan, Adam Lee

Hi Chris,

Do you have any comments on this patch?

Thanks,
Peter.Guo

-----Original Message-----
From: Adam Lee [mailto:adam.lee@canonical.com] 
Sent: Wednesday, October 16, 2013 4:16 PM
To: Peter Guo; Chris Ball
Cc: Adrian Hunter; Greg Kroah-Hartman; Bill Pemberton; Guennadi Liakhovetski; linux-mmc@vger.kernel.org; linux-kernel@vger.kernel.org; Samuel Guan; Xiaoguang Yu; Shirley Her; Yuxiang Wan
Subject: Re: [PATCH v2] mmc:sdhci-pci: Add Support of O2Mirco/BayHubTech SD Host

On Wed, Oct 16, 2013 at 07:26:23AM +0000, Peter Guo wrote:
> Add O2Micro/BayHubTech SD Host DeviceId 8520 support and specified Init.
> Apply SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 for SD Host Controller.
> Apply SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC for SD Host Controller.
> 
> Signed-off-by: peter.guo <peter.guo@bayhubtech.com>
> ---
>  drivers/mmc/host/sdhci-pci.c |  208 
> ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 208 insertions(+)

I'm enabling "O2 Micro, Inc. Device [1217:8520]" on some laptops, it works after this patch applied.

Chris, please take a look? Thanks.

Tested-by: Adam Lee <adam.lee@canonical.com>

--
Adam Lee

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] mmc:sdhci-pci: Add Support of O2Mirco/BayHubTech SD Host
  2013-10-23  3:49   ` Peter Guo
@ 2013-10-27 13:02     ` Chris Ball
  0 siblings, 0 replies; 6+ messages in thread
From: Chris Ball @ 2013-10-27 13:02 UTC (permalink / raw)
  To: Peter Guo
  Cc: Adrian Hunter, Greg Kroah-Hartman, Bill Pemberton,
	Guennadi Liakhovetski, linux-mmc, linux-kernel, Samuel Guan,
	Xiaoguang Yu, Shirley Her, Yuxiang Wan, Adam Lee

Hi Peter,

On Wed, Oct 23 2013, Peter Guo wrote:
> Do you have any comments on this patch?

It would be nice if there were fewer magic constants in the patch, and
adding another 200 lines to sdhci-pci seems to suggest that it might
be time to split it out into sdhci-pci-o2micro.c.

Thanks,

- Chris.
-- 
Chris Ball   <cjb@laptop.org>   <http://printf.net/>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH] mmc:sdhci fix 2 tuning issues in sdchi_exectuing_tuning
  2013-10-16  8:15 ` Adam Lee
  2013-10-23  3:49   ` Peter Guo
@ 2013-10-29 10:56   ` Peter Guo
  2013-11-06 11:14   ` Peter Guo
  2 siblings, 0 replies; 6+ messages in thread
From: Peter Guo @ 2013-10-29 10:56 UTC (permalink / raw)
  To: Chris Ball, linux-mmc, linux-kernel
  Cc: Samuel Guan, Xiaoguang Yu, Shirley Her, Yuxiang Wan, Adam Lee


1. Tuning success at 40th time should be ok, but current code take this as
   failed.
2. tuning_count equals to 0 means disable retuning function, but current
   code still do retuning.

Signed-off-by: peter.guo <peter.guo@bayhubtech.com>
---
 drivers/mmc/host/sdhci.c |    7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 68b3cac..9a35a5e 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1900,7 +1900,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 	 * Issue CMD19 repeatedly till Execute Tuning is set to 0 or the number
 	 * of loops reaches 40 times or a timeout of 150ms occurs.
 	 */
-	timeout = jiffies + msecs_to_jiffies(150);
+z	timeout = jiffies + msecs_to_jiffies(150);
 	do {
 		struct mmc_command cmd = {0};
 		struct mmc_request mrq = {NULL};
@@ -1983,7 +1983,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 	 * The Host Driver has exhausted the maximum number of loops allowed,
 	 * so use fixed sampling frequency.
 	 */
-	if (!tuning_loop_counter || time_after(jiffies, timeout)) {
+	if ((tuning_loop_counter < 0) || time_after(jiffies, timeout)) {
 		ctrl &= ~SDHCI_CTRL_TUNED_CLK;
 		sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
 		err = -EIO;
@@ -2013,7 +2013,8 @@ out:
 	} else {
 		host->flags &= ~SDHCI_NEEDS_RETUNING;
 		/* Reload the new initial value for timeout workqueue */
-		if (host->tuning_mode == SDHCI_TUNING_MODE_1)
+		if ((host->tuning_mode == SDHCI_TUNING_MODE_1) &&
+				(host->tuning_count))
 			schedule_delayed_work(&host->tuning_timeout_work,
 				host->tuning_count * HZ);
 	}
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* RE: [PATCH] mmc:sdhci fix 2 tuning issues in sdchi_exectuing_tuning
  2013-10-16  8:15 ` Adam Lee
  2013-10-23  3:49   ` Peter Guo
  2013-10-29 10:56   ` [PATCH] mmc:sdhci fix 2 tuning issues in sdchi_exectuing_tuning Peter Guo
@ 2013-11-06 11:14   ` Peter Guo
  2 siblings, 0 replies; 6+ messages in thread
From: Peter Guo @ 2013-11-06 11:14 UTC (permalink / raw)
  To: Chris Ball
  Cc: Samuel Guan, Xiaoguang Yu, Shirley Her, Yuxiang Wan, Adam Lee,
	linux-mmc, linux-kernel

Hi Chris,

Do you have any comments on this patch?

Thanks,
Peter.Guo

-----Original Message-----
From: Peter Guo 
Sent: Tuesday, October 29, 2013 6:55 PM
To: 'Chris Ball'; 'linux-mmc@vger.kernel.org'; 'linux-kernel@vger.kernel.org'
Cc: Samuel Guan; Xiaoguang Yu; Shirley Her; Yuxiang Wan; 'Adam Lee'
Subject: [PATCH] mmc:sdhci fix 2 tuning issues in sdchi_exectuing_tuning


1. Tuning success at 40th time should be ok, but current code take this as
   failed.
2. tuning_count equals to 0 means disable retuning function, but current
   code still do retuning.

Signed-off-by: peter.guo <peter.guo@bayhubtech.com>
---


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2013-11-06 11:14 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-10-16  7:26 [PATCH v2] mmc:sdhci-pci: Add Support of O2Mirco/BayHubTech SD Host Peter Guo
2013-10-16  8:15 ` Adam Lee
2013-10-23  3:49   ` Peter Guo
2013-10-27 13:02     ` Chris Ball
2013-10-29 10:56   ` [PATCH] mmc:sdhci fix 2 tuning issues in sdchi_exectuing_tuning Peter Guo
2013-11-06 11:14   ` Peter Guo

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