* [PATCH v3 01/24] powerpc/32: Add ioremap_wt() and ioremap_coherent()
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-15 4:01 ` [v3,01/24] " Michael Ellerman
2018-10-09 13:51 ` [PATCH v3 02/24] drivers/video/fbdev: use ioremap_wc/wt() instead of __ioremap() Christophe Leroy
` (22 subsequent siblings)
23 siblings, 1 reply; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Other arches have ioremap_wt() to map IO areas write-through.
Implement it on PPC as well in order to avoid drivers using
__ioremap(_PAGE_WRITETHRU)
Also implement ioremap_coherent() to avoid drivers using
__ioremap(_PAGE_COHERENT)
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/io.h | 9 +++++++++
arch/powerpc/mm/pgtable_32.c | 16 ++++++++++++++++
arch/powerpc/mm/pgtable_64.c | 10 ++++++++++
3 files changed, 35 insertions(+)
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index e0331e754568..cdccab3938db 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -3,6 +3,9 @@
#ifdef __KERNEL__
#define ARCH_HAS_IOREMAP_WC
+#ifdef CONFIG_PPC32
+#define ARCH_HAS_IOREMAP_WT
+#endif
/*
* This program is free software; you can redistribute it and/or
@@ -746,6 +749,10 @@ static inline void iosync(void)
*
* * ioremap_wc enables write combining
*
+ * * ioremap_wt enables write through
+ *
+ * * ioremap_coherent maps coherent cached memory
+ *
* * iounmap undoes such a mapping and can be hooked
*
* * __ioremap_at (and the pending __iounmap_at) are low level functions to
@@ -767,6 +774,8 @@ extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size,
unsigned long flags);
extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size);
+void __iomem *ioremap_wt(phys_addr_t address, unsigned long size);
+void __iomem *ioremap_coherent(phys_addr_t address, unsigned long size);
#define ioremap_nocache(addr, size) ioremap((addr), (size))
#define ioremap_uc(addr, size) ioremap((addr), (size))
#define ioremap_cache(addr, size) \
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 120a49bfb9c6..4c3adde09d95 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -90,6 +90,22 @@ ioremap_wc(phys_addr_t addr, unsigned long size)
EXPORT_SYMBOL(ioremap_wc);
void __iomem *
+ioremap_wt(phys_addr_t addr, unsigned long size)
+{
+ return __ioremap_caller(addr, size, _PAGE_WRITETHRU,
+ __builtin_return_address(0));
+}
+EXPORT_SYMBOL(ioremap_wt);
+
+void __iomem *
+ioremap_coherent(phys_addr_t addr, unsigned long size)
+{
+ return __ioremap_caller(addr, size, _PAGE_COHERENT,
+ __builtin_return_address(0));
+}
+EXPORT_SYMBOL(ioremap_coherent);
+
+void __iomem *
ioremap_prot(phys_addr_t addr, unsigned long size, unsigned long flags)
{
/* writeable implies dirty for kernel addresses */
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index e15e63079ba8..c0f356d9b135 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -222,6 +222,16 @@ void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
return __ioremap_caller(addr, size, flags, caller);
}
+void __iomem *ioremap_coherent(phys_addr_t addr, unsigned long size)
+{
+ unsigned long flags = pgprot_val(pgprot_cached(__pgprot(0)));
+ void *caller = __builtin_return_address(0);
+
+ if (ppc_md.ioremap)
+ return ppc_md.ioremap(addr, size, flags, caller);
+ return __ioremap_caller(addr, size, flags, caller);
+}
+
void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
unsigned long flags)
{
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [v3,01/24] powerpc/32: Add ioremap_wt() and ioremap_coherent()
2018-10-09 13:51 ` [PATCH v3 01/24] powerpc/32: Add ioremap_wt() and ioremap_coherent() Christophe Leroy
@ 2018-10-15 4:01 ` Michael Ellerman
0 siblings, 0 replies; 42+ messages in thread
From: Michael Ellerman @ 2018-10-15 4:01 UTC (permalink / raw)
To: Christophe Leroy, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-fbdev, linux-kernel, dri-devel, linux-block, linuxppc-dev,
linux-arm-kernel
On Tue, 2018-10-09 at 13:51:33 UTC, Christophe Leroy wrote:
> Other arches have ioremap_wt() to map IO areas write-through.
> Implement it on PPC as well in order to avoid drivers using
> __ioremap(_PAGE_WRITETHRU)
>
> Also implement ioremap_coherent() to avoid drivers using
> __ioremap(_PAGE_COHERENT)
>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/86c391bd5f47101acf1f3e0abd9fe0
cheers
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 02/24] drivers/video/fbdev: use ioremap_wc/wt() instead of __ioremap()
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 01/24] powerpc/32: Add ioremap_wt() and ioremap_coherent() Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-11 14:07 ` Christophe LEROY
2018-10-09 13:51 ` [PATCH v3 03/24] drivers/block/z2ram: use ioremap_wt() instead of __ioremap(_PAGE_WRITETHRU) Christophe Leroy
` (21 subsequent siblings)
23 siblings, 1 reply; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
_PAGE_NO_CACHE is a platform specific flag. In addition, this flag
is misleading because one would think it requests a noncached page
whereas a noncached page is _PAGE_NO_CACHE | _PAGE_GUARDED
_PAGE_NO_CACHE alone means write combined noncached page, so lets
use ioremap_wc() instead.
_PAGE_WRITETHRU is also platform specific flag. Use ioremap_wt()
instead.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
drivers/video/fbdev/chipsfb.c | 3 +--
drivers/video/fbdev/controlfb.c | 5 +----
drivers/video/fbdev/platinumfb.c | 5 +----
drivers/video/fbdev/valkyriefb.c | 12 ++++++------
4 files changed, 9 insertions(+), 16 deletions(-)
diff --git a/drivers/video/fbdev/chipsfb.c b/drivers/video/fbdev/chipsfb.c
index f103665cad43..40182ed85648 100644
--- a/drivers/video/fbdev/chipsfb.c
+++ b/drivers/video/fbdev/chipsfb.c
@@ -27,7 +27,6 @@
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/console.h>
-#include <asm/io.h>
#ifdef CONFIG_PMAC_BACKLIGHT
#include <asm/backlight.h>
@@ -401,7 +400,7 @@ static int chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent)
#endif /* CONFIG_PMAC_BACKLIGHT */
#ifdef CONFIG_PPC
- p->screen_base = __ioremap(addr, 0x200000, _PAGE_NO_CACHE);
+ p->screen_base = ioremap_wc(addr, 0x200000);
#else
p->screen_base = ioremap(addr, 0x200000);
#endif
diff --git a/drivers/video/fbdev/controlfb.c b/drivers/video/fbdev/controlfb.c
index 8d14b29aafea..9cb0ef7ac29e 100644
--- a/drivers/video/fbdev/controlfb.c
+++ b/drivers/video/fbdev/controlfb.c
@@ -48,9 +48,7 @@
#include <linux/nvram.h>
#include <linux/adb.h>
#include <linux/cuda.h>
-#include <asm/io.h>
#include <asm/prom.h>
-#include <asm/pgtable.h>
#include <asm/btext.h>
#include "macmodes.h"
@@ -715,8 +713,7 @@ static int __init control_of_init(struct device_node *dp)
goto error_out;
}
/* map at most 8MB for the frame buffer */
- p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000,
- _PAGE_WRITETHRU);
+ p->frame_buffer = ioremap_wt(p->frame_buffer_phys, 0x800000);
if (!p->control_regs_phys ||
!request_mem_region(p->control_regs_phys, p->control_regs_size,
diff --git a/drivers/video/fbdev/platinumfb.c b/drivers/video/fbdev/platinumfb.c
index 377d3399a3ad..bf6b7fb83cf4 100644
--- a/drivers/video/fbdev/platinumfb.c
+++ b/drivers/video/fbdev/platinumfb.c
@@ -32,9 +32,7 @@
#include <linux/nvram.h>
#include <linux/of_device.h>
#include <linux/of_platform.h>
-#include <asm/io.h>
#include <asm/prom.h>
-#include <asm/pgtable.h>
#include "macmodes.h"
#include "platinumfb.h"
@@ -577,8 +575,7 @@ static int platinumfb_probe(struct platform_device* odev)
/* frame buffer - map only 4MB */
pinfo->frame_buffer_phys = pinfo->rsrc_fb.start;
- pinfo->frame_buffer = __ioremap(pinfo->rsrc_fb.start, 0x400000,
- _PAGE_WRITETHRU);
+ pinfo->frame_buffer = ioremap_wt(pinfo->rsrc_fb.start, 0x400000);
pinfo->base_frame_buffer = pinfo->frame_buffer;
/* registers */
diff --git a/drivers/video/fbdev/valkyriefb.c b/drivers/video/fbdev/valkyriefb.c
index 275fb98236d3..d51c3a8009cb 100644
--- a/drivers/video/fbdev/valkyriefb.c
+++ b/drivers/video/fbdev/valkyriefb.c
@@ -54,13 +54,11 @@
#include <linux/nvram.h>
#include <linux/adb.h>
#include <linux/cuda.h>
-#include <asm/io.h>
#ifdef CONFIG_MAC
#include <asm/macintosh.h>
#else
#include <asm/prom.h>
#endif
-#include <asm/pgtable.h>
#include "macmodes.h"
#include "valkyriefb.h"
@@ -318,7 +316,7 @@ static void __init valkyrie_choose_mode(struct fb_info_valkyrie *p)
int __init valkyriefb_init(void)
{
struct fb_info_valkyrie *p;
- unsigned long frame_buffer_phys, cmap_regs_phys, flags;
+ unsigned long frame_buffer_phys, cmap_regs_phys;
int err;
char *option = NULL;
@@ -337,7 +335,6 @@ int __init valkyriefb_init(void)
/* Hardcoded addresses... welcome to 68k Macintosh country :-) */
frame_buffer_phys = 0xf9000000;
cmap_regs_phys = 0x50f24000;
- flags = IOMAP_NOCACHE_SER; /* IOMAP_WRITETHROUGH?? */
#else /* ppc (!CONFIG_MAC) */
{
struct device_node *dp;
@@ -354,7 +351,6 @@ int __init valkyriefb_init(void)
frame_buffer_phys = r.start;
cmap_regs_phys = r.start + 0x304000;
- flags = _PAGE_WRITETHRU;
}
#endif /* ppc (!CONFIG_MAC) */
@@ -369,7 +365,11 @@ int __init valkyriefb_init(void)
}
p->total_vram = 0x100000;
p->frame_buffer_phys = frame_buffer_phys;
- p->frame_buffer = __ioremap(frame_buffer_phys, p->total_vram, flags);
+#ifdef CONFIG_MAC
+ p->frame_buffer = ioremap_nocache(frame_buffer_phys, p->total_vram);
+#else
+ p->frame_buffer = ioremap_wt(frame_buffer_phys, p->total_vram);
+#endif
p->cmap_regs_phys = cmap_regs_phys;
p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
p->valkyrie_regs_phys = cmap_regs_phys+0x6000;
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [PATCH v3 02/24] drivers/video/fbdev: use ioremap_wc/wt() instead of __ioremap()
2018-10-09 13:51 ` [PATCH v3 02/24] drivers/video/fbdev: use ioremap_wc/wt() instead of __ioremap() Christophe Leroy
@ 2018-10-11 14:07 ` Christophe LEROY
0 siblings, 0 replies; 42+ messages in thread
From: Christophe LEROY @ 2018-10-11 14:07 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-fbdev, linux-kernel, dri-devel, linux-block, linuxppc-dev,
linux-arm-kernel
Le 09/10/2018 à 15:51, Christophe Leroy a écrit :
> _PAGE_NO_CACHE is a platform specific flag. In addition, this flag
> is misleading because one would think it requests a noncached page
> whereas a noncached page is _PAGE_NO_CACHE | _PAGE_GUARDED
>
> _PAGE_NO_CACHE alone means write combined noncached page, so lets
> use ioremap_wc() instead.
>
> _PAGE_WRITETHRU is also platform specific flag. Use ioremap_wt()
> instead.
>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Forgot to add back the acked-by: tags.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thanks
Christophe
> ---
> drivers/video/fbdev/chipsfb.c | 3 +--
> drivers/video/fbdev/controlfb.c | 5 +----
> drivers/video/fbdev/platinumfb.c | 5 +----
> drivers/video/fbdev/valkyriefb.c | 12 ++++++------
> 4 files changed, 9 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/video/fbdev/chipsfb.c b/drivers/video/fbdev/chipsfb.c
> index f103665cad43..40182ed85648 100644
> --- a/drivers/video/fbdev/chipsfb.c
> +++ b/drivers/video/fbdev/chipsfb.c
> @@ -27,7 +27,6 @@
> #include <linux/init.h>
> #include <linux/pci.h>
> #include <linux/console.h>
> -#include <asm/io.h>
>
> #ifdef CONFIG_PMAC_BACKLIGHT
> #include <asm/backlight.h>
> @@ -401,7 +400,7 @@ static int chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent)
> #endif /* CONFIG_PMAC_BACKLIGHT */
>
> #ifdef CONFIG_PPC
> - p->screen_base = __ioremap(addr, 0x200000, _PAGE_NO_CACHE);
> + p->screen_base = ioremap_wc(addr, 0x200000);
> #else
> p->screen_base = ioremap(addr, 0x200000);
> #endif
> diff --git a/drivers/video/fbdev/controlfb.c b/drivers/video/fbdev/controlfb.c
> index 8d14b29aafea..9cb0ef7ac29e 100644
> --- a/drivers/video/fbdev/controlfb.c
> +++ b/drivers/video/fbdev/controlfb.c
> @@ -48,9 +48,7 @@
> #include <linux/nvram.h>
> #include <linux/adb.h>
> #include <linux/cuda.h>
> -#include <asm/io.h>
> #include <asm/prom.h>
> -#include <asm/pgtable.h>
> #include <asm/btext.h>
>
> #include "macmodes.h"
> @@ -715,8 +713,7 @@ static int __init control_of_init(struct device_node *dp)
> goto error_out;
> }
> /* map at most 8MB for the frame buffer */
> - p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000,
> - _PAGE_WRITETHRU);
> + p->frame_buffer = ioremap_wt(p->frame_buffer_phys, 0x800000);
>
> if (!p->control_regs_phys ||
> !request_mem_region(p->control_regs_phys, p->control_regs_size,
> diff --git a/drivers/video/fbdev/platinumfb.c b/drivers/video/fbdev/platinumfb.c
> index 377d3399a3ad..bf6b7fb83cf4 100644
> --- a/drivers/video/fbdev/platinumfb.c
> +++ b/drivers/video/fbdev/platinumfb.c
> @@ -32,9 +32,7 @@
> #include <linux/nvram.h>
> #include <linux/of_device.h>
> #include <linux/of_platform.h>
> -#include <asm/io.h>
> #include <asm/prom.h>
> -#include <asm/pgtable.h>
>
> #include "macmodes.h"
> #include "platinumfb.h"
> @@ -577,8 +575,7 @@ static int platinumfb_probe(struct platform_device* odev)
>
> /* frame buffer - map only 4MB */
> pinfo->frame_buffer_phys = pinfo->rsrc_fb.start;
> - pinfo->frame_buffer = __ioremap(pinfo->rsrc_fb.start, 0x400000,
> - _PAGE_WRITETHRU);
> + pinfo->frame_buffer = ioremap_wt(pinfo->rsrc_fb.start, 0x400000);
> pinfo->base_frame_buffer = pinfo->frame_buffer;
>
> /* registers */
> diff --git a/drivers/video/fbdev/valkyriefb.c b/drivers/video/fbdev/valkyriefb.c
> index 275fb98236d3..d51c3a8009cb 100644
> --- a/drivers/video/fbdev/valkyriefb.c
> +++ b/drivers/video/fbdev/valkyriefb.c
> @@ -54,13 +54,11 @@
> #include <linux/nvram.h>
> #include <linux/adb.h>
> #include <linux/cuda.h>
> -#include <asm/io.h>
> #ifdef CONFIG_MAC
> #include <asm/macintosh.h>
> #else
> #include <asm/prom.h>
> #endif
> -#include <asm/pgtable.h>
>
> #include "macmodes.h"
> #include "valkyriefb.h"
> @@ -318,7 +316,7 @@ static void __init valkyrie_choose_mode(struct fb_info_valkyrie *p)
> int __init valkyriefb_init(void)
> {
> struct fb_info_valkyrie *p;
> - unsigned long frame_buffer_phys, cmap_regs_phys, flags;
> + unsigned long frame_buffer_phys, cmap_regs_phys;
> int err;
> char *option = NULL;
>
> @@ -337,7 +335,6 @@ int __init valkyriefb_init(void)
> /* Hardcoded addresses... welcome to 68k Macintosh country :-) */
> frame_buffer_phys = 0xf9000000;
> cmap_regs_phys = 0x50f24000;
> - flags = IOMAP_NOCACHE_SER; /* IOMAP_WRITETHROUGH?? */
> #else /* ppc (!CONFIG_MAC) */
> {
> struct device_node *dp;
> @@ -354,7 +351,6 @@ int __init valkyriefb_init(void)
>
> frame_buffer_phys = r.start;
> cmap_regs_phys = r.start + 0x304000;
> - flags = _PAGE_WRITETHRU;
> }
> #endif /* ppc (!CONFIG_MAC) */
>
> @@ -369,7 +365,11 @@ int __init valkyriefb_init(void)
> }
> p->total_vram = 0x100000;
> p->frame_buffer_phys = frame_buffer_phys;
> - p->frame_buffer = __ioremap(frame_buffer_phys, p->total_vram, flags);
> +#ifdef CONFIG_MAC
> + p->frame_buffer = ioremap_nocache(frame_buffer_phys, p->total_vram);
> +#else
> + p->frame_buffer = ioremap_wt(frame_buffer_phys, p->total_vram);
> +#endif
> p->cmap_regs_phys = cmap_regs_phys;
> p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
> p->valkyrie_regs_phys = cmap_regs_phys+0x6000;
>
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 03/24] drivers/block/z2ram: use ioremap_wt() instead of __ioremap(_PAGE_WRITETHRU)
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 01/24] powerpc/32: Add ioremap_wt() and ioremap_coherent() Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 02/24] drivers/video/fbdev: use ioremap_wc/wt() instead of __ioremap() Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 14:59 ` Bart Van Assche
2018-10-09 13:51 ` [PATCH v3 04/24] soc/fsl/qbman: use ioremap_cache() instead of ioremap_prot(0) Christophe Leroy
` (20 subsequent siblings)
23 siblings, 1 reply; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
_PAGE_WRITETHRU is a target specific flag. Prefer generic functions.
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
drivers/block/z2ram.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/block/z2ram.c b/drivers/block/z2ram.c
index d0c5bc4e0703..cfbd70520eeb 100644
--- a/drivers/block/z2ram.c
+++ b/drivers/block/z2ram.c
@@ -190,8 +190,7 @@ static int z2_open(struct block_device *bdev, fmode_t mode)
vfree(vmalloc (size));
}
- vaddr = (unsigned long) __ioremap (paddr, size,
- _PAGE_WRITETHRU);
+ vaddr = (unsigned long)ioremap_wt(paddr, size);
#else
vaddr = (unsigned long)z_remap_nocache_nonser(paddr, size);
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [PATCH v3 03/24] drivers/block/z2ram: use ioremap_wt() instead of __ioremap(_PAGE_WRITETHRU)
2018-10-09 13:51 ` [PATCH v3 03/24] drivers/block/z2ram: use ioremap_wt() instead of __ioremap(_PAGE_WRITETHRU) Christophe Leroy
@ 2018-10-09 14:59 ` Bart Van Assche
2018-10-09 15:13 ` Geert Uytterhoeven
0 siblings, 1 reply; 42+ messages in thread
From: Bart Van Assche @ 2018-10-09 14:59 UTC (permalink / raw)
To: Christophe Leroy, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Michael Ellerman,
Nicholas Piggin, Paul Mackerras, Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
On Tue, 2018-10-09 at 13:51 +0000, Christophe Leroy wrote:
> _PAGE_WRITETHRU is a target specific flag. Prefer generic functions.
>
> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Hi Geert,
All patches that have been applied to this driver since 2005 are API refactoring
patches. I haven't found any patches in the history of this driver that seem to
have been submitted by a user of this driver. Do you perhaps know whether anyone
is using this driver?
Thanks,
Bart.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 03/24] drivers/block/z2ram: use ioremap_wt() instead of __ioremap(_PAGE_WRITETHRU)
2018-10-09 14:59 ` Bart Van Assche
@ 2018-10-09 15:13 ` Geert Uytterhoeven
0 siblings, 0 replies; 42+ messages in thread
From: Geert Uytterhoeven @ 2018-10-09 15:13 UTC (permalink / raw)
To: Bart Van Assche
Cc: Christophe Leroy, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Leo Li, Michael Ellerman,
Nicholas Piggin, Paul Mackerras, Scott Wood, Aneesh Kumar K.V,
Linux Fbdev development list, Linux Kernel Mailing List,
DRI Development, linux-block, linuxppc-dev, Linux ARM,
Debian m68k, linux-m68k
Hi Bart,
CC debian-68k, linux-m68k
On Tue, Oct 9, 2018 at 5:00 PM Bart Van Assche <bvanassche@acm.org> wrote:
> On Tue, 2018-10-09 at 13:51 +0000, Christophe Leroy wrote:
> > _PAGE_WRITETHRU is a target specific flag. Prefer generic functions.
> >
> > Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>
> Hi Geert,
>
> All patches that have been applied to this driver since 2005 are API refactoring
> patches. I haven't found any patches in the history of this driver that seem to
> have been submitted by a user of this driver. Do you perhaps know whether anyone
> is using this driver?
The z2ram is a very simple driver, used to configure (slower) Zorro II RAM as
a swap device. So I'm not so surprised no one submitted functional patches.
I believe it's still being used.
Probably it could be modified to use mtdram.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 04/24] soc/fsl/qbman: use ioremap_cache() instead of ioremap_prot(0)
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (2 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 03/24] drivers/block/z2ram: use ioremap_wt() instead of __ioremap(_PAGE_WRITETHRU) Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 05/24] powerpc: don't use ioremap_prot() nor __ioremap() unless really needed Christophe Leroy
` (19 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
ioremap_prot() with flag set to 0 relies on a hack in
__ioremap_caller() which adds PAGE_KERNEL flags when the
handed flags don't look like a valid set of flags
(ie don't include _PAGE_PRESENT)
The intention being to map cached memory, use ioremap_cache() instead.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
drivers/soc/fsl/qbman/qman_ccsr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/qbman/qman_ccsr.c b/drivers/soc/fsl/qbman/qman_ccsr.c
index 79cba58387a5..0fbb201346c7 100644
--- a/drivers/soc/fsl/qbman/qman_ccsr.c
+++ b/drivers/soc/fsl/qbman/qman_ccsr.c
@@ -418,7 +418,7 @@ static size_t fqd_sz, pfdr_sz;
static int zero_priv_mem(phys_addr_t addr, size_t sz)
{
/* map as cacheable, non-guarded */
- void __iomem *tmpp = ioremap_prot(addr, sz, 0);
+ void __iomem *tmpp = ioremap_cache(addr, sz);
if (!tmpp)
return -ENOMEM;
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 05/24] powerpc: don't use ioremap_prot() nor __ioremap() unless really needed.
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (3 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 04/24] soc/fsl/qbman: use ioremap_cache() instead of ioremap_prot(0) Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap() Christophe Leroy
` (18 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
In many places, ioremap_prot() and __ioremap() can be replaced with
higher level functions like ioremap(), ioremap_coherent(),
ioremap_cache(), ioremap_wc() ...
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/kernel/btext.c | 2 +-
arch/powerpc/kernel/crash_dump.c | 2 +-
arch/powerpc/platforms/85xx/smp.c | 4 ++--
arch/powerpc/platforms/pasemi/dma_lib.c | 2 +-
arch/powerpc/platforms/ps3/spu.c | 3 +--
arch/powerpc/sysdev/fsl_85xx_cache_sram.c | 8 ++++----
6 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index b2072d5bbf2b..b4241ed1456e 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -163,7 +163,7 @@ void btext_map(void)
offset = ((unsigned long) dispDeviceBase) - base;
size = dispDeviceRowBytes * dispDeviceRect[3] + offset
+ dispDeviceRect[0];
- vbase = __ioremap(base, size, pgprot_val(pgprot_noncached_wc(__pgprot(0))));
+ vbase = ioremap_wc(base, size);
if (!vbase)
return;
logicalDisplayBase = vbase + offset;
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index d10ad258d41a..bbdc4706c159 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -110,7 +110,7 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
vaddr = __va(paddr);
csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
} else {
- vaddr = __ioremap(paddr, PAGE_SIZE, 0);
+ vaddr = ioremap_cache(paddr, PAGE_SIZE);
csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
iounmap(vaddr);
}
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 7e966f4cf19a..fff72425727a 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -216,8 +216,8 @@ static int smp_85xx_start_cpu(int cpu)
/* Map the spin table */
if (ioremappable)
- spin_table = ioremap_prot(*cpu_rel_addr,
- sizeof(struct epapr_spin_table), _PAGE_COHERENT);
+ spin_table = ioremap_coherent(*cpu_rel_addr,
+ sizeof(struct epapr_spin_table));
else
spin_table = phys_to_virt(*cpu_rel_addr);
diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c
index c80f72c370ae..53384eb42a76 100644
--- a/arch/powerpc/platforms/pasemi/dma_lib.c
+++ b/arch/powerpc/platforms/pasemi/dma_lib.c
@@ -576,7 +576,7 @@ int pasemi_dma_init(void)
res.start = 0xfd800000;
res.end = res.start + 0x1000;
}
- dma_status = __ioremap(res.start, resource_size(&res), 0);
+ dma_status = ioremap_cache(res.start, resource_size(&res));
pci_dev_put(iob_pdev);
for (i = 0; i < MAX_TXCH; i++)
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c
index b54850845466..7746c2a3c509 100644
--- a/arch/powerpc/platforms/ps3/spu.c
+++ b/arch/powerpc/platforms/ps3/spu.c
@@ -215,8 +215,7 @@ static int __init setup_areas(struct spu *spu)
goto fail_ioremap;
}
- spu->local_store = (__force void *)ioremap_prot(spu->local_store_phys,
- LS_SIZE, pgprot_val(pgprot_noncached_wc(__pgprot(0))));
+ spu->local_store = (__force void *)ioremap_wc(spu->local_store_phys, LS_SIZE);
if (!spu->local_store) {
pr_debug("%s:%d: ioremap local_store failed\n",
diff --git a/arch/powerpc/sysdev/fsl_85xx_cache_sram.c b/arch/powerpc/sysdev/fsl_85xx_cache_sram.c
index 00ccf3e4fcb4..15cbdd4fde06 100644
--- a/arch/powerpc/sysdev/fsl_85xx_cache_sram.c
+++ b/arch/powerpc/sysdev/fsl_85xx_cache_sram.c
@@ -107,11 +107,11 @@ int __init instantiate_cache_sram(struct platform_device *dev,
goto out_free;
}
- cache_sram->base_virt = ioremap_prot(cache_sram->base_phys,
- cache_sram->size, _PAGE_COHERENT | PAGE_KERNEL);
+ cache_sram->base_virt = ioremap_coherent(cache_sram->base_phys,
+ cache_sram->size);
if (!cache_sram->base_virt) {
- dev_err(&dev->dev, "%pOF: ioremap_prot failed\n",
- dev->dev.of_node);
+ dev_err(&dev->dev, "%pOF: ioremap_coherent failed\n",
+ dev->dev.of_node);
ret = -ENOMEM;
goto out_release;
}
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (4 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 05/24] powerpc: don't use ioremap_prot() nor __ioremap() unless really needed Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-14 3:32 ` Michael Ellerman
2018-10-09 13:51 ` [PATCH v3 07/24] powerpc: handover page flags with a pgprot_t parameter Christophe Leroy
` (17 subsequent siblings)
23 siblings, 1 reply; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Set PAGE_KERNEL directly in the caller and do not rely on a
hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
As already done for PPC64, use pgprot_cache() helpers instead of
_PAGE_XXX flags in PPC32 ioremap() derived functions.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/pgtable.h | 2 ++
arch/powerpc/kernel/isa-bridge.c | 6 +++---
arch/powerpc/kernel/pci_64.c | 2 +-
arch/powerpc/mm/pgtable_32.c | 28 ++++++++++++----------------
arch/powerpc/mm/pgtable_64.c | 10 +++-------
arch/powerpc/platforms/4xx/ocm.c | 7 ++-----
drivers/pcmcia/electra_cf.c | 2 +-
7 files changed, 24 insertions(+), 33 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index b321c82b3624..5b82e44c4231 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -197,6 +197,8 @@ extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long addre
#if _PAGE_WRITETHRU != 0
#define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
_PAGE_COHERENT | _PAGE_WRITETHRU))
+#else
+#define pgprot_cached_wthru(prot) pgprot_noncached(prot)
#endif
#define pgprot_cached_noncoherent(prot) \
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index 1df6c74aa731..072e384f8c86 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -110,14 +110,14 @@ static void pci_process_ISA_OF_ranges(struct device_node *isa_node,
size = 0x10000;
__ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
- size, pgprot_val(pgprot_noncached(__pgprot(0))));
+ size, pgprot_val(pgprot_noncached(PAGE_KERNEL)));
return;
inval_range:
printk(KERN_ERR "no ISA IO ranges or unexpected isa range, "
"mapping 64k\n");
__ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
- 0x10000, pgprot_val(pgprot_noncached(__pgprot(0))));
+ 0x10000, pgprot_val(pgprot_noncached(PAGE_KERNEL)));
}
@@ -253,7 +253,7 @@ void __init isa_bridge_init_non_pci(struct device_node *np)
*/
isa_io_base = ISA_IO_BASE;
__ioremap_at(pbase, (void *)ISA_IO_BASE,
- size, pgprot_val(pgprot_noncached(__pgprot(0))));
+ size, pgprot_val(pgprot_noncached(PAGE_KERNEL)));
pr_debug("ISA: Non-PCI bridge is %pOF\n", np);
}
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index dff28f903512..64bb4dd2b8f1 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -159,7 +159,7 @@ static int pcibios_map_phb_io_space(struct pci_controller *hose)
/* Establish the mapping */
if (__ioremap_at(phys_page, area->addr, size_page,
- pgprot_val(pgprot_noncached(__pgprot(0)))) == NULL)
+ pgprot_val(pgprot_noncached(PAGE_KERNEL))) == NULL)
return -ENOMEM;
/* Fixup hose IO resource */
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 4c3adde09d95..6a81a2446c47 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -76,32 +76,36 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
void __iomem *
ioremap(phys_addr_t addr, unsigned long size)
{
- return __ioremap_caller(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED,
- __builtin_return_address(0));
+ unsigned long flags = pgprot_val(pgprot_noncached(PAGE_KERNEL));
+
+ return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap);
void __iomem *
ioremap_wc(phys_addr_t addr, unsigned long size)
{
- return __ioremap_caller(addr, size, _PAGE_NO_CACHE,
- __builtin_return_address(0));
+ unsigned long flags = pgprot_val(pgprot_noncached_wc(PAGE_KERNEL));
+
+ return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_wc);
void __iomem *
ioremap_wt(phys_addr_t addr, unsigned long size)
{
- return __ioremap_caller(addr, size, _PAGE_WRITETHRU,
- __builtin_return_address(0));
+ unsigned long flags = pgprot_val(pgprot_cached_wthru(PAGE_KERNEL));
+
+ return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_wt);
void __iomem *
ioremap_coherent(phys_addr_t addr, unsigned long size)
{
- return __ioremap_caller(addr, size, _PAGE_COHERENT,
- __builtin_return_address(0));
+ unsigned long flags = pgprot_val(pgprot_cached(PAGE_KERNEL));
+
+ return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_coherent);
@@ -134,14 +138,6 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
phys_addr_t p;
int err;
- /* Make sure we have the base flags */
- if ((flags & _PAGE_PRESENT) == 0)
- flags |= pgprot_val(PAGE_KERNEL);
-
- /* Non-cacheable page cannot be coherent */
- if (flags & _PAGE_NO_CACHE)
- flags &= ~_PAGE_COHERENT;
-
/*
* Choose an address to map it to.
* Once the vmalloc system is running, we use it.
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index c0f356d9b135..1f1bb40555a8 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -118,10 +118,6 @@ void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
{
unsigned long i;
- /* Make sure we have the base flags */
- if ((flags & _PAGE_PRESENT) == 0)
- flags |= pgprot_val(PAGE_KERNEL);
-
/* We don't support the 4K PFN hack with ioremap */
if (flags & H_PAGE_4K_PFN)
return NULL;
@@ -204,7 +200,7 @@ void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
void __iomem * ioremap(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_noncached(__pgprot(0)));
+ unsigned long flags = pgprot_val(pgprot_noncached(PAGE_KERNEL));
void *caller = __builtin_return_address(0);
if (ppc_md.ioremap)
@@ -214,7 +210,7 @@ void __iomem * ioremap(phys_addr_t addr, unsigned long size)
void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_noncached_wc(__pgprot(0)));
+ unsigned long flags = pgprot_val(pgprot_noncached_wc(PAGE_KERNEL));
void *caller = __builtin_return_address(0);
if (ppc_md.ioremap)
@@ -224,7 +220,7 @@ void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
void __iomem *ioremap_coherent(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_cached(__pgprot(0)));
+ unsigned long flags = pgprot_val(pgprot_cached(PAGE_KERNEL));
void *caller = __builtin_return_address(0);
if (ppc_md.ioremap)
diff --git a/arch/powerpc/platforms/4xx/ocm.c b/arch/powerpc/platforms/4xx/ocm.c
index 69d9f60d9fe5..f5bbd4563342 100644
--- a/arch/powerpc/platforms/4xx/ocm.c
+++ b/arch/powerpc/platforms/4xx/ocm.c
@@ -113,7 +113,6 @@ static void __init ocm_init_node(int count, struct device_node *node)
int len;
struct resource rsrc;
- int ioflags;
ocm = ocm_get_node(count);
@@ -179,9 +178,8 @@ static void __init ocm_init_node(int count, struct device_node *node)
/* ioremap the non-cached region */
if (ocm->nc.memtotal) {
- ioflags = _PAGE_NO_CACHE | _PAGE_GUARDED | _PAGE_EXEC;
ocm->nc.virt = __ioremap(ocm->nc.phys, ocm->nc.memtotal,
- ioflags);
+ _PAGE_EXEC | PAGE_KERNEL_NCG);
if (!ocm->nc.virt) {
printk(KERN_ERR
@@ -195,9 +193,8 @@ static void __init ocm_init_node(int count, struct device_node *node)
/* ioremap the cached region */
if (ocm->c.memtotal) {
- ioflags = _PAGE_EXEC;
ocm->c.virt = __ioremap(ocm->c.phys, ocm->c.memtotal,
- ioflags);
+ _PAGE_EXEC | PAGE_KERNEL);
if (!ocm->c.virt) {
printk(KERN_ERR
diff --git a/drivers/pcmcia/electra_cf.c b/drivers/pcmcia/electra_cf.c
index 9671ded549f0..34d6c1a0971e 100644
--- a/drivers/pcmcia/electra_cf.c
+++ b/drivers/pcmcia/electra_cf.c
@@ -230,7 +230,7 @@ static int electra_cf_probe(struct platform_device *ofdev)
if (!cf->mem_base || !cf->io_virt || !cf->gpio_base ||
(__ioremap_at(io.start, cf->io_virt, cf->io_size,
- pgprot_val(pgprot_noncached(__pgprot(0)))) == NULL)) {
+ pgprot_val(pgprot_noncached(PAGE_KERNEL))) == NULL)) {
dev_err(device, "can't ioremap ranges\n");
status = -ENOMEM;
goto fail1;
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
2018-10-09 13:51 ` [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap() Christophe Leroy
@ 2018-10-14 3:32 ` Michael Ellerman
2018-10-14 7:02 ` Michael Ellerman
2018-10-14 7:39 ` LEROY Christophe
0 siblings, 2 replies; 42+ messages in thread
From: Michael Ellerman @ 2018-10-14 3:32 UTC (permalink / raw)
To: Christophe Leroy, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Christophe Leroy <christophe.leroy@c-s.fr> writes:
> Set PAGE_KERNEL directly in the caller and do not rely on a
> hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
>
> As already done for PPC64, use pgprot_cache() helpers instead of
> _PAGE_XXX flags in PPC32 ioremap() derived functions.
>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Something in here is breaking my p5020ds (both 32-bit and 64-bit):
# first bad commit: [cb9220cc18345a2a1ec287752e576a2c88fa4a2b] powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
64-bit:
io scheduler mq-deadline registered
io scheduler kyber registered
pcieport 0000:00:00.0: AER enabled with IRQ 482
pcieport 2000:00:00.0: AER enabled with IRQ 480
Unable to handle kernel paging request for data at address 0x8000080080080000
Faulting instruction address: 0xc0000000000152e4
Oops: Kernel access of bad area, sig: 11 [#1]
BE SMP NR_CPUS=32 CoreNet Generic
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc3-gcc-7.3.1-00135-gcb9220cc1834 #16
NIP: c0000000000152e4 LR: c0000000005173b8 CTR: 0000000000100000
REGS: c0000000f30eb420 TRAP: 0300 Not tainted (4.19.0-rc3-gcc-7.3.1-00135-gcb9220cc1834)
MSR: 0000000080029000 <CE,EE,ME> CR: 24000224 XER: 00000000
DEAR: 8000080080080000 ESR: 0000000000800000 IRQMASK: 0
GPR00: c0000000005173a0 c0000000f30eb6a0 c000000000f86e00 8000080080080000
GPR04: 0000000000000000 0000000000400000 00000ffbff000004 0000000000000008
GPR08: 0000000000000000 0000000000100000 0000000000000000 0000000000000080
GPR12: 0000000084000422 c00000003ffff7c0 c00000000000263c 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR24: c000000000dbe0a0 c000000000d41bf8 8000080080080000 c0000000ffff89a8
GPR28: c0000000f3492400 c0000000f3492410 0000000000400000 c000000000ff0a18
NIP [c0000000000152e4] ._memset_io+0x6c/0x9c
LR [c0000000005173b8] .fsl_qman_probe+0x188/0x918
Call Trace:
[c0000000f30eb6a0] [c0000000005173a0] .fsl_qman_probe+0x170/0x918 (unreliable)
[c0000000f30eb740] [c0000000005797dc] .platform_drv_probe+0x58/0xac
[c0000000f30eb7c0] [c0000000005772b0] .really_probe+0x2a8/0x380
[c0000000f30eb860] [c0000000005776f0] .__driver_attach+0x138/0x13c
[c0000000f30eb8f0] [c000000000574550] .bus_for_each_dev+0x9c/0x110
[c0000000f30eb9a0] [c000000000576a18] .driver_attach+0x24/0x38
[c0000000f30eba10] [c0000000005761ec] .bus_add_driver+0x16c/0x2ac
[c0000000f30ebab0] [c000000000578194] .driver_register+0x88/0x178
[c0000000f30ebb30] [c000000000579770] .__platform_driver_register+0x48/0x5c
[c0000000f30ebba0] [c000000000d85744] .fsl_qman_driver_init+0x1c/0x30
[c0000000f30ebc10] [c000000000002374] .do_one_initcall+0x70/0x258
[c0000000f30ebcf0] [c000000000d4a244] .kernel_init_freeable+0x340/0x43c
[c0000000f30ebdb0] [c000000000002658] .kernel_init+0x1c/0x130
[c0000000f30ebe30] [c0000000000009e4] .ret_from_kernel_thread+0x58/0x74
Instruction dump:
4e800020 2ba50003 40dd003c 3925fffc 5488402e 7929f082 7d082378 39290001
550a801e 7d2903a6 7d4a4378 794a0020 <91430000> 38630004 4200fff8 70a50003
---[ end trace 372a57fd67efb6fe ]---
32 bit:
[ 1.076133] pcieport 2000:02:00.0: AER enabled with IRQ 480
[ 1.082106] Unable to handle kernel paging request for data at address 0xf1100000
[ 1.089488] Faulting instruction address: 0xc0011c80
[ 1.094437] Oops: Kernel access of bad area, sig: 11 [#1]
[ 1.099816] BE SMP NR_CPUS=24 CoreNet Generic
[ 1.104157] Modules linked in:
[ 1.107197] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc3-gcc7x-g8f0c636b0542 #1
[ 1.115181] NIP: c0011c80 LR: c058f970 CTR: 00100000
[ 1.120216] REGS: e8107c80 TRAP: 0300 Not tainted (4.19.0-rc3-gcc7x-g8f0c636b0542)
[ 1.128026] MSR: 00029002 <CE,EE,ME> CR: 24000284 XER: 00000000
[ 1.134190] DEAR: f1100000 ESR: 00800000
[ 1.134190] GPR00: c058f958 e8107d30 e8108000 f1100000 00000000 00400000 e8107cd8 e8107d0c
[ 1.134190] GPR08: 00000000 00100000 00000000 ff000000 24000282 00000000 c0003340 00000000
[ 1.134190] GPR16: 00000000 00000000 00000000 00000000 c0d64410 c0edb34c c0ec6700 00000007
[ 1.134190] GPR24: c0ef0000 f1100000 efffcab8 c0ef0000 e8231c00 e8231c10 0040003f c101d290
[ 1.171519] NIP [c0011c80] _memset_io+0x90/0xd0
[ 1.176030] LR [c058f970] fsl_qman_probe+0x190/0x8c0
[ 1.180975] Call Trace:
[ 1.183410] [e8107d30] [c001f6c0] ioremap_prot+0x40/0x50 (unreliable)
[ 1.189830] [e8107d40] [c058f958] fsl_qman_probe+0x178/0x8c0
[ 1.195475] [e8107d70] [c0600894] platform_drv_probe+0x54/0xb0
[ 1.201287] [e8107d90] [c05fe15c] really_probe+0x28c/0x350
[ 1.206756] [e8107dc0] [c05fe73c] __driver_attach+0x12c/0x130
[ 1.212485] [e8107de0] [c05fb5a8] bus_for_each_dev+0x98/0x110
[ 1.218213] [e8107e10] [c05fd048] bus_add_driver+0x158/0x2b0
[ 1.223855] [e8107e40] [c05ff1c4] driver_register+0x94/0x180
[ 1.229498] [e8107e60] [c0002fc4] do_one_initcall+0x54/0x2d0
[ 1.235144] [e8107ed0] [c0d650e8] kernel_init_freeable+0x2e8/0x3bc
[ 1.241302] [e8107f20] [c0003364] kernel_init+0x24/0x130
[ 1.246599] [e8107f40] [c0015298] ret_from_kernel_thread+0x14/0x1c
[ 1.252758] Instruction dump:
[ 1.255711] 2b850003 40dd0040 5488402e 3925fffc 7d082378 5529f0be 550a801e 39290001
[ 1.263435] 7d4a4378 7d2903a6 60000000 60000000 <91430000> 38630004 4200fff8 70a50003
[ 1.271337] ---[ end trace f6eb249464967cf7 ]---
[ 1.275934]
[ 2.277413] BUG: sleeping function called from invalid context at ./include/linux/percpu-rwsem.h:34
[ 2.286358] in_atomic(): 0, irqs_disabled(): 1, pid: 1, name: swapper/0
[ 2.292956] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G D 4.19.0-rc3-gcc7x-g8f0c636b0542 #1
[ 2.302328] Call Trace:
[ 2.304762] [e8107b80] [c0aa3774] dump_stack+0x88/0xc4 (unreliable)
[ 2.311011] [e8107ba0] [c0074e10] ___might_sleep+0xe0/0x130
[ 2.316567] [e8107bb0] [c0055410] exit_signals+0x50/0x2d0
[ 2.321949] [e8107bf0] [c00434dc] do_exit+0xcc/0xad0
[ 2.326897] [e8107c40] [c000ee98] die+0x228/0x390
[ 2.331582] [e8107c70] [c00153f4] handle_page_fault+0x34/0x38
[ 2.337311] --- interrupt: 300 at _memset_io+0x90/0xd0
[ 2.337311] LR = fsl_qman_probe+0x190/0x8c0
[ 2.346945] [e8107d30] [c001f6c0] ioremap_prot+0x40/0x50 (unreliable)
[ 2.353368] [e8107d40] [c058f958] fsl_qman_probe+0x178/0x8c0
[ 2.359010] [e8107d70] [c0600894] platform_drv_probe+0x54/0xb0
[ 2.364825] [e8107d90] [c05fe15c] really_probe+0x28c/0x350
[ 2.370294] [e8107dc0] [c05fe73c] __driver_attach+0x12c/0x130
[ 2.376023] [e8107de0] [c05fb5a8] bus_for_each_dev+0x98/0x110
[ 2.381751] [e8107e10] [c05fd048] bus_add_driver+0x158/0x2b0
[ 2.387394] [e8107e40] [c05ff1c4] driver_register+0x94/0x180
[ 2.393035] [e8107e60] [c0002fc4] do_one_initcall+0x54/0x2d0
[ 2.398678] [e8107ed0] [c0d650e8] kernel_init_freeable+0x2e8/0x3bc
[ 2.404840] [e8107f20] [c0003364] kernel_init+0x24/0x130
[ 2.410135] [e8107f40] [c0015298] ret_from_kernel_thread+0x14/0x1c
[ 2.416312] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
cheers
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
2018-10-14 3:32 ` Michael Ellerman
@ 2018-10-14 7:02 ` Michael Ellerman
2018-10-14 9:58 ` LEROY Christophe
2018-10-14 7:39 ` LEROY Christophe
1 sibling, 1 reply; 42+ messages in thread
From: Michael Ellerman @ 2018-10-14 7:02 UTC (permalink / raw)
To: Christophe Leroy, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Michael Ellerman <mpe@ellerman.id.au> writes:
> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>
>> Set PAGE_KERNEL directly in the caller and do not rely on a
>> hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
>>
>> As already done for PPC64, use pgprot_cache() helpers instead of
>> _PAGE_XXX flags in PPC32 ioremap() derived functions.
>>
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>
> Something in here is breaking my p5020ds (both 32-bit and 64-bit):
Oh duh.
That's because I didn't take patch 4.
It didn't have any acks, but I guess I'll just merge it rather than
breaking things.
cheers
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
2018-10-14 7:02 ` Michael Ellerman
@ 2018-10-14 9:58 ` LEROY Christophe
2018-10-15 9:25 ` Michael Ellerman
0 siblings, 1 reply; 42+ messages in thread
From: LEROY Christophe @ 2018-10-14 9:58 UTC (permalink / raw)
To: Michael Ellerman
Cc: dri-devel, linuxppc-dev, linux-kernel, linux-fbdev, linux-block,
linux-arm-kernel, aneesh.kumar, Scott Wood, Paul Mackerras,
Nicholas Piggin, Li Yang, Kumar Gala, Jens Axboe, Geoff Levand,
Dominik Brodowski, Benjamin Herrenschmidt,
Bartlomiej Zolnierkiewicz
Michael Ellerman <mpe@ellerman.id.au> a écrit :
> Michael Ellerman <mpe@ellerman.id.au> writes:
>
>> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>>
>>> Set PAGE_KERNEL directly in the caller and do not rely on a
>>> hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
>>>
>>> As already done for PPC64, use pgprot_cache() helpers instead of
>>> _PAGE_XXX flags in PPC32 ioremap() derived functions.
>>>
>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>
>> Something in here is breaking my p5020ds (both 32-bit and 64-bit):
>
> Oh duh.
>
> That's because I didn't take patch 4.
>
> It didn't have any acks, but I guess I'll just merge it rather than
> breaking things.
Yes indeed. Maybe should I have followed it more carrefully to ensure
it gets an ack.
Thanks
Christophe
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
2018-10-14 9:58 ` LEROY Christophe
@ 2018-10-15 9:25 ` Michael Ellerman
0 siblings, 0 replies; 42+ messages in thread
From: Michael Ellerman @ 2018-10-15 9:25 UTC (permalink / raw)
To: LEROY Christophe
Cc: dri-devel, linuxppc-dev, linux-kernel, linux-fbdev, linux-block,
linux-arm-kernel, aneesh.kumar, Scott Wood, Paul Mackerras,
Nicholas Piggin, Li Yang, Kumar Gala, Jens Axboe, Geoff Levand,
Dominik Brodowski, Benjamin Herrenschmidt,
Bartlomiej Zolnierkiewicz
LEROY Christophe <christophe.leroy@c-s.fr> writes:
> Michael Ellerman <mpe@ellerman.id.au> a écrit :
>> Michael Ellerman <mpe@ellerman.id.au> writes:
>>> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>>>
>>>> Set PAGE_KERNEL directly in the caller and do not rely on a
>>>> hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
>>>>
>>>> As already done for PPC64, use pgprot_cache() helpers instead of
>>>> _PAGE_XXX flags in PPC32 ioremap() derived functions.
>>>>
>>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>>
>>> Something in here is breaking my p5020ds (both 32-bit and 64-bit):
>>
>> Oh duh.
>>
>> That's because I didn't take patch 4.
>>
>> It didn't have any acks, but I guess I'll just merge it rather than
>> breaking things.
>
> Yes indeed. Maybe should I have followed it more carrefully to ensure
> it gets an ack.
That's OK, I should have paid more attention to what it was actually
doing, I thought it was just a cleanup.
cheers
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
2018-10-14 3:32 ` Michael Ellerman
2018-10-14 7:02 ` Michael Ellerman
@ 2018-10-14 7:39 ` LEROY Christophe
2018-10-14 10:05 ` LEROY Christophe
1 sibling, 1 reply; 42+ messages in thread
From: LEROY Christophe @ 2018-10-14 7:39 UTC (permalink / raw)
To: Michael Ellerman
Cc: dri-devel, linuxppc-dev, linux-kernel, linux-fbdev, linux-block,
linux-arm-kernel, aneesh.kumar, Scott Wood, Paul Mackerras,
Nicholas Piggin, Li Yang, Kumar Gala, Jens Axboe, Geoff Levand,
Dominik Brodowski, Benjamin Herrenschmidt,
Bartlomiej Zolnierkiewicz
Michael Ellerman <mpe@ellerman.id.au> a écrit :
> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>
>> Set PAGE_KERNEL directly in the caller and do not rely on a
>> hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
>>
>> As already done for PPC64, use pgprot_cache() helpers instead of
>> _PAGE_XXX flags in PPC32 ioremap() derived functions.
>>
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>
> Something in here is breaking my p5020ds (both 32-bit and 64-bit):
>
> # first bad commit: [cb9220cc18345a2a1ec287752e576a2c88fa4a2b]
> powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
Strange, it is calling ioremap_prot(), it should have been calling
ioremap_cache() hence ioremap() since patch 4 of the serie. Did patch
4 apply correctly ?
Christophe
>
> 64-bit:
>
> io scheduler mq-deadline registered
> io scheduler kyber registered
> pcieport 0000:00:00.0: AER enabled with IRQ 482
> pcieport 2000:00:00.0: AER enabled with IRQ 480
> Unable to handle kernel paging request for data at address
> 0x8000080080080000
> Faulting instruction address: 0xc0000000000152e4
> Oops: Kernel access of bad area, sig: 11 [#1]
> BE SMP NR_CPUS=32 CoreNet Generic
> Modules linked in:
> CPU: 1 PID: 1 Comm: swapper/0 Not tainted
> 4.19.0-rc3-gcc-7.3.1-00135-gcb9220cc1834 #16
> NIP: c0000000000152e4 LR: c0000000005173b8 CTR: 0000000000100000
> REGS: c0000000f30eb420 TRAP: 0300 Not tainted
> (4.19.0-rc3-gcc-7.3.1-00135-gcb9220cc1834)
> MSR: 0000000080029000 <CE,EE,ME> CR: 24000224 XER: 00000000
> DEAR: 8000080080080000 ESR: 0000000000800000 IRQMASK: 0
> GPR00: c0000000005173a0 c0000000f30eb6a0 c000000000f86e00 8000080080080000
> GPR04: 0000000000000000 0000000000400000 00000ffbff000004 0000000000000008
> GPR08: 0000000000000000 0000000000100000 0000000000000000 0000000000000080
> GPR12: 0000000084000422 c00000003ffff7c0 c00000000000263c 0000000000000000
> GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> GPR24: c000000000dbe0a0 c000000000d41bf8 8000080080080000 c0000000ffff89a8
> GPR28: c0000000f3492400 c0000000f3492410 0000000000400000 c000000000ff0a18
> NIP [c0000000000152e4] ._memset_io+0x6c/0x9c
> LR [c0000000005173b8] .fsl_qman_probe+0x188/0x918
> Call Trace:
> [c0000000f30eb6a0] [c0000000005173a0] .fsl_qman_probe+0x170/0x918
> (unreliable)
> [c0000000f30eb740] [c0000000005797dc] .platform_drv_probe+0x58/0xac
> [c0000000f30eb7c0] [c0000000005772b0] .really_probe+0x2a8/0x380
> [c0000000f30eb860] [c0000000005776f0] .__driver_attach+0x138/0x13c
> [c0000000f30eb8f0] [c000000000574550] .bus_for_each_dev+0x9c/0x110
> [c0000000f30eb9a0] [c000000000576a18] .driver_attach+0x24/0x38
> [c0000000f30eba10] [c0000000005761ec] .bus_add_driver+0x16c/0x2ac
> [c0000000f30ebab0] [c000000000578194] .driver_register+0x88/0x178
> [c0000000f30ebb30] [c000000000579770] .__platform_driver_register+0x48/0x5c
> [c0000000f30ebba0] [c000000000d85744] .fsl_qman_driver_init+0x1c/0x30
> [c0000000f30ebc10] [c000000000002374] .do_one_initcall+0x70/0x258
> [c0000000f30ebcf0] [c000000000d4a244] .kernel_init_freeable+0x340/0x43c
> [c0000000f30ebdb0] [c000000000002658] .kernel_init+0x1c/0x130
> [c0000000f30ebe30] [c0000000000009e4] .ret_from_kernel_thread+0x58/0x74
> Instruction dump:
> 4e800020 2ba50003 40dd003c 3925fffc 5488402e 7929f082 7d082378 39290001
> 550a801e 7d2903a6 7d4a4378 794a0020 <91430000> 38630004 4200fff8 70a50003
> ---[ end trace 372a57fd67efb6fe ]---
>
> 32 bit:
>
> [ 1.076133] pcieport 2000:02:00.0: AER enabled with IRQ 480
> [ 1.082106] Unable to handle kernel paging request for data at
> address 0xf1100000
> [ 1.089488] Faulting instruction address: 0xc0011c80
> [ 1.094437] Oops: Kernel access of bad area, sig: 11 [#1]
> [ 1.099816] BE SMP NR_CPUS=24 CoreNet Generic
> [ 1.104157] Modules linked in:
> [ 1.107197] CPU: 0 PID: 1 Comm: swapper/0 Not tainted
> 4.19.0-rc3-gcc7x-g8f0c636b0542 #1
> [ 1.115181] NIP: c0011c80 LR: c058f970 CTR: 00100000
> [ 1.120216] REGS: e8107c80 TRAP: 0300 Not tainted
> (4.19.0-rc3-gcc7x-g8f0c636b0542)
> [ 1.128026] MSR: 00029002 <CE,EE,ME> CR: 24000284 XER: 00000000
> [ 1.134190] DEAR: f1100000 ESR: 00800000
> [ 1.134190] GPR00: c058f958 e8107d30 e8108000 f1100000 00000000
> 00400000 e8107cd8 e8107d0c
> [ 1.134190] GPR08: 00000000 00100000 00000000 ff000000 24000282
> 00000000 c0003340 00000000
> [ 1.134190] GPR16: 00000000 00000000 00000000 00000000 c0d64410
> c0edb34c c0ec6700 00000007
> [ 1.134190] GPR24: c0ef0000 f1100000 efffcab8 c0ef0000 e8231c00
> e8231c10 0040003f c101d290
> [ 1.171519] NIP [c0011c80] _memset_io+0x90/0xd0
> [ 1.176030] LR [c058f970] fsl_qman_probe+0x190/0x8c0
> [ 1.180975] Call Trace:
> [ 1.183410] [e8107d30] [c001f6c0] ioremap_prot+0x40/0x50 (unreliable)
> [ 1.189830] [e8107d40] [c058f958] fsl_qman_probe+0x178/0x8c0
> [ 1.195475] [e8107d70] [c0600894] platform_drv_probe+0x54/0xb0
> [ 1.201287] [e8107d90] [c05fe15c] really_probe+0x28c/0x350
> [ 1.206756] [e8107dc0] [c05fe73c] __driver_attach+0x12c/0x130
> [ 1.212485] [e8107de0] [c05fb5a8] bus_for_each_dev+0x98/0x110
> [ 1.218213] [e8107e10] [c05fd048] bus_add_driver+0x158/0x2b0
> [ 1.223855] [e8107e40] [c05ff1c4] driver_register+0x94/0x180
> [ 1.229498] [e8107e60] [c0002fc4] do_one_initcall+0x54/0x2d0
> [ 1.235144] [e8107ed0] [c0d650e8] kernel_init_freeable+0x2e8/0x3bc
> [ 1.241302] [e8107f20] [c0003364] kernel_init+0x24/0x130
> [ 1.246599] [e8107f40] [c0015298] ret_from_kernel_thread+0x14/0x1c
> [ 1.252758] Instruction dump:
> [ 1.255711] 2b850003 40dd0040 5488402e 3925fffc 7d082378
> 5529f0be 550a801e 39290001
> [ 1.263435] 7d4a4378 7d2903a6 60000000 60000000 <91430000>
> 38630004 4200fff8 70a50003
> [ 1.271337] ---[ end trace f6eb249464967cf7 ]---
> [ 1.275934]
> [ 2.277413] BUG: sleeping function called from invalid context
> at ./include/linux/percpu-rwsem.h:34
> [ 2.286358] in_atomic(): 0, irqs_disabled(): 1, pid: 1, name: swapper/0
> [ 2.292956] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G D
> 4.19.0-rc3-gcc7x-g8f0c636b0542 #1
> [ 2.302328] Call Trace:
> [ 2.304762] [e8107b80] [c0aa3774] dump_stack+0x88/0xc4 (unreliable)
> [ 2.311011] [e8107ba0] [c0074e10] ___might_sleep+0xe0/0x130
> [ 2.316567] [e8107bb0] [c0055410] exit_signals+0x50/0x2d0
> [ 2.321949] [e8107bf0] [c00434dc] do_exit+0xcc/0xad0
> [ 2.326897] [e8107c40] [c000ee98] die+0x228/0x390
> [ 2.331582] [e8107c70] [c00153f4] handle_page_fault+0x34/0x38
> [ 2.337311] --- interrupt: 300 at _memset_io+0x90/0xd0
> [ 2.337311] LR = fsl_qman_probe+0x190/0x8c0
> [ 2.346945] [e8107d30] [c001f6c0] ioremap_prot+0x40/0x50 (unreliable)
> [ 2.353368] [e8107d40] [c058f958] fsl_qman_probe+0x178/0x8c0
> [ 2.359010] [e8107d70] [c0600894] platform_drv_probe+0x54/0xb0
> [ 2.364825] [e8107d90] [c05fe15c] really_probe+0x28c/0x350
> [ 2.370294] [e8107dc0] [c05fe73c] __driver_attach+0x12c/0x130
> [ 2.376023] [e8107de0] [c05fb5a8] bus_for_each_dev+0x98/0x110
> [ 2.381751] [e8107e10] [c05fd048] bus_add_driver+0x158/0x2b0
> [ 2.387394] [e8107e40] [c05ff1c4] driver_register+0x94/0x180
> [ 2.393035] [e8107e60] [c0002fc4] do_one_initcall+0x54/0x2d0
> [ 2.398678] [e8107ed0] [c0d650e8] kernel_init_freeable+0x2e8/0x3bc
> [ 2.404840] [e8107f20] [c0003364] kernel_init+0x24/0x130
> [ 2.410135] [e8107f40] [c0015298] ret_from_kernel_thread+0x14/0x1c
> [ 2.416312] Kernel panic - not syncing: Attempted to kill init!
> exitcode=0x0000000b
>
> cheers
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
2018-10-14 7:39 ` LEROY Christophe
@ 2018-10-14 10:05 ` LEROY Christophe
0 siblings, 0 replies; 42+ messages in thread
From: LEROY Christophe @ 2018-10-14 10:05 UTC (permalink / raw)
To: Michael Ellerman
Cc: linux-arm-kernel, linuxppc-dev, aneesh.kumar, Paul Mackerras,
linux-block, Li Yang, dri-devel, linux-kernel, Nicholas Piggin,
Geoff Levand, Bartlomiej Zolnierkiewicz, Dominik Brodowski,
linux-fbdev, Scott Wood, Jens Axboe
LEROY Christophe <christophe.leroy@c-s.fr> a écrit :
> Michael Ellerman <mpe@ellerman.id.au> a écrit :
>
>> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>>
>>> Set PAGE_KERNEL directly in the caller and do not rely on a
>>> hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
>>>
>>> As already done for PPC64, use pgprot_cache() helpers instead of
>>> _PAGE_XXX flags in PPC32 ioremap() derived functions.
>>>
>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>
>> Something in here is breaking my p5020ds (both 32-bit and 64-bit):
>>
>> # first bad commit: [cb9220cc18345a2a1ec287752e576a2c88fa4a2b]
>> powerpc/mm: properly set PAGE_KERNEL flags in ioremap()
>
> Strange, it is calling ioremap_prot(), it should have been calling
> ioremap_cache() hence ioremap() since patch 4 of the serie. Did
> patch 4 apply correctly ?
Oops, forget that stupid comment. ioremap_cache() uses ioremap_prot()
but with the correct flags instead of 0
So patch 4 is needed anyway, because using 0 as flags will now not
anymore implicitely imply PAGE_KERNEL
Christophe
>
> Christophe
>
>>
>> 64-bit:
>>
>> io scheduler mq-deadline registered
>> io scheduler kyber registered
>> pcieport 0000:00:00.0: AER enabled with IRQ 482
>> pcieport 2000:00:00.0: AER enabled with IRQ 480
>> Unable to handle kernel paging request for data at address
>> 0x8000080080080000
>> Faulting instruction address: 0xc0000000000152e4
>> Oops: Kernel access of bad area, sig: 11 [#1]
>> BE SMP NR_CPUS=32 CoreNet Generic
>> Modules linked in:
>> CPU: 1 PID: 1 Comm: swapper/0 Not tainted
>> 4.19.0-rc3-gcc-7.3.1-00135-gcb9220cc1834 #16
>> NIP: c0000000000152e4 LR: c0000000005173b8 CTR: 0000000000100000
>> REGS: c0000000f30eb420 TRAP: 0300 Not tainted
>> (4.19.0-rc3-gcc-7.3.1-00135-gcb9220cc1834)
>> MSR: 0000000080029000 <CE,EE,ME> CR: 24000224 XER: 00000000
>> DEAR: 8000080080080000 ESR: 0000000000800000 IRQMASK: 0
>> GPR00: c0000000005173a0 c0000000f30eb6a0 c000000000f86e00 8000080080080000
>> GPR04: 0000000000000000 0000000000400000 00000ffbff000004 0000000000000008
>> GPR08: 0000000000000000 0000000000100000 0000000000000000 0000000000000080
>> GPR12: 0000000084000422 c00000003ffff7c0 c00000000000263c 0000000000000000
>> GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
>> GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
>> GPR24: c000000000dbe0a0 c000000000d41bf8 8000080080080000 c0000000ffff89a8
>> GPR28: c0000000f3492400 c0000000f3492410 0000000000400000 c000000000ff0a18
>> NIP [c0000000000152e4] ._memset_io+0x6c/0x9c
>> LR [c0000000005173b8] .fsl_qman_probe+0x188/0x918
>> Call Trace:
>> [c0000000f30eb6a0] [c0000000005173a0] .fsl_qman_probe+0x170/0x918
>> (unreliable)
>> [c0000000f30eb740] [c0000000005797dc] .platform_drv_probe+0x58/0xac
>> [c0000000f30eb7c0] [c0000000005772b0] .really_probe+0x2a8/0x380
>> [c0000000f30eb860] [c0000000005776f0] .__driver_attach+0x138/0x13c
>> [c0000000f30eb8f0] [c000000000574550] .bus_for_each_dev+0x9c/0x110
>> [c0000000f30eb9a0] [c000000000576a18] .driver_attach+0x24/0x38
>> [c0000000f30eba10] [c0000000005761ec] .bus_add_driver+0x16c/0x2ac
>> [c0000000f30ebab0] [c000000000578194] .driver_register+0x88/0x178
>> [c0000000f30ebb30] [c000000000579770] .__platform_driver_register+0x48/0x5c
>> [c0000000f30ebba0] [c000000000d85744] .fsl_qman_driver_init+0x1c/0x30
>> [c0000000f30ebc10] [c000000000002374] .do_one_initcall+0x70/0x258
>> [c0000000f30ebcf0] [c000000000d4a244] .kernel_init_freeable+0x340/0x43c
>> [c0000000f30ebdb0] [c000000000002658] .kernel_init+0x1c/0x130
>> [c0000000f30ebe30] [c0000000000009e4] .ret_from_kernel_thread+0x58/0x74
>> Instruction dump:
>> 4e800020 2ba50003 40dd003c 3925fffc 5488402e 7929f082 7d082378 39290001
>> 550a801e 7d2903a6 7d4a4378 794a0020 <91430000> 38630004 4200fff8 70a50003
>> ---[ end trace 372a57fd67efb6fe ]---
>>
>> 32 bit:
>>
>> [ 1.076133] pcieport 2000:02:00.0: AER enabled with IRQ 480
>> [ 1.082106] Unable to handle kernel paging request for data at
>> address 0xf1100000
>> [ 1.089488] Faulting instruction address: 0xc0011c80
>> [ 1.094437] Oops: Kernel access of bad area, sig: 11 [#1]
>> [ 1.099816] BE SMP NR_CPUS=24 CoreNet Generic
>> [ 1.104157] Modules linked in:
>> [ 1.107197] CPU: 0 PID: 1 Comm: swapper/0 Not tainted
>> 4.19.0-rc3-gcc7x-g8f0c636b0542 #1
>> [ 1.115181] NIP: c0011c80 LR: c058f970 CTR: 00100000
>> [ 1.120216] REGS: e8107c80 TRAP: 0300 Not tainted
>> (4.19.0-rc3-gcc7x-g8f0c636b0542)
>> [ 1.128026] MSR: 00029002 <CE,EE,ME> CR: 24000284 XER: 00000000
>> [ 1.134190] DEAR: f1100000 ESR: 00800000
>> [ 1.134190] GPR00: c058f958 e8107d30 e8108000 f1100000 00000000
>> 00400000 e8107cd8 e8107d0c
>> [ 1.134190] GPR08: 00000000 00100000 00000000 ff000000 24000282
>> 00000000 c0003340 00000000
>> [ 1.134190] GPR16: 00000000 00000000 00000000 00000000 c0d64410
>> c0edb34c c0ec6700 00000007
>> [ 1.134190] GPR24: c0ef0000 f1100000 efffcab8 c0ef0000 e8231c00
>> e8231c10 0040003f c101d290
>> [ 1.171519] NIP [c0011c80] _memset_io+0x90/0xd0
>> [ 1.176030] LR [c058f970] fsl_qman_probe+0x190/0x8c0
>> [ 1.180975] Call Trace:
>> [ 1.183410] [e8107d30] [c001f6c0] ioremap_prot+0x40/0x50 (unreliable)
>> [ 1.189830] [e8107d40] [c058f958] fsl_qman_probe+0x178/0x8c0
>> [ 1.195475] [e8107d70] [c0600894] platform_drv_probe+0x54/0xb0
>> [ 1.201287] [e8107d90] [c05fe15c] really_probe+0x28c/0x350
>> [ 1.206756] [e8107dc0] [c05fe73c] __driver_attach+0x12c/0x130
>> [ 1.212485] [e8107de0] [c05fb5a8] bus_for_each_dev+0x98/0x110
>> [ 1.218213] [e8107e10] [c05fd048] bus_add_driver+0x158/0x2b0
>> [ 1.223855] [e8107e40] [c05ff1c4] driver_register+0x94/0x180
>> [ 1.229498] [e8107e60] [c0002fc4] do_one_initcall+0x54/0x2d0
>> [ 1.235144] [e8107ed0] [c0d650e8] kernel_init_freeable+0x2e8/0x3bc
>> [ 1.241302] [e8107f20] [c0003364] kernel_init+0x24/0x130
>> [ 1.246599] [e8107f40] [c0015298] ret_from_kernel_thread+0x14/0x1c
>> [ 1.252758] Instruction dump:
>> [ 1.255711] 2b850003 40dd0040 5488402e 3925fffc 7d082378
>> 5529f0be 550a801e 39290001
>> [ 1.263435] 7d4a4378 7d2903a6 60000000 60000000 <91430000>
>> 38630004 4200fff8 70a50003
>> [ 1.271337] ---[ end trace f6eb249464967cf7 ]---
>> [ 1.275934]
>> [ 2.277413] BUG: sleeping function called from invalid context
>> at ./include/linux/percpu-rwsem.h:34
>> [ 2.286358] in_atomic(): 0, irqs_disabled(): 1, pid: 1, name: swapper/0
>> [ 2.292956] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G D
>> 4.19.0-rc3-gcc7x-g8f0c636b0542 #1
>> [ 2.302328] Call Trace:
>> [ 2.304762] [e8107b80] [c0aa3774] dump_stack+0x88/0xc4 (unreliable)
>> [ 2.311011] [e8107ba0] [c0074e10] ___might_sleep+0xe0/0x130
>> [ 2.316567] [e8107bb0] [c0055410] exit_signals+0x50/0x2d0
>> [ 2.321949] [e8107bf0] [c00434dc] do_exit+0xcc/0xad0
>> [ 2.326897] [e8107c40] [c000ee98] die+0x228/0x390
>> [ 2.331582] [e8107c70] [c00153f4] handle_page_fault+0x34/0x38
>> [ 2.337311] --- interrupt: 300 at _memset_io+0x90/0xd0
>> [ 2.337311] LR = fsl_qman_probe+0x190/0x8c0
>> [ 2.346945] [e8107d30] [c001f6c0] ioremap_prot+0x40/0x50 (unreliable)
>> [ 2.353368] [e8107d40] [c058f958] fsl_qman_probe+0x178/0x8c0
>> [ 2.359010] [e8107d70] [c0600894] platform_drv_probe+0x54/0xb0
>> [ 2.364825] [e8107d90] [c05fe15c] really_probe+0x28c/0x350
>> [ 2.370294] [e8107dc0] [c05fe73c] __driver_attach+0x12c/0x130
>> [ 2.376023] [e8107de0] [c05fb5a8] bus_for_each_dev+0x98/0x110
>> [ 2.381751] [e8107e10] [c05fd048] bus_add_driver+0x158/0x2b0
>> [ 2.387394] [e8107e40] [c05ff1c4] driver_register+0x94/0x180
>> [ 2.393035] [e8107e60] [c0002fc4] do_one_initcall+0x54/0x2d0
>> [ 2.398678] [e8107ed0] [c0d650e8] kernel_init_freeable+0x2e8/0x3bc
>> [ 2.404840] [e8107f20] [c0003364] kernel_init+0x24/0x130
>> [ 2.410135] [e8107f40] [c0015298] ret_from_kernel_thread+0x14/0x1c
>> [ 2.416312] Kernel panic - not syncing: Attempted to kill init!
>> exitcode=0x0000000b
>>
>> cheers
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 07/24] powerpc: handover page flags with a pgprot_t parameter
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (5 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 06/24] powerpc/mm: properly set PAGE_KERNEL flags in ioremap() Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 08/24] powerpc/mm: don't use _PAGE_EXEC in book3s/32 Christophe Leroy
` (16 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
In order to avoid multiple conversions, handover directly a
pgprot_t to map_kernel_page() as already done for radix.
Do the same for __ioremap_caller() and __ioremap_at().
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 2 +-
arch/powerpc/include/asm/book3s/64/hash.h | 3 +--
arch/powerpc/include/asm/book3s/64/pgtable.h | 7 +++---
arch/powerpc/include/asm/fixmap.h | 2 +-
arch/powerpc/include/asm/io.h | 4 +--
arch/powerpc/include/asm/machdep.h | 2 +-
arch/powerpc/include/asm/nohash/32/pgtable.h | 2 +-
arch/powerpc/include/asm/nohash/64/pgtable.h | 3 +--
arch/powerpc/kernel/io-workarounds.c | 4 +--
arch/powerpc/kernel/isa-bridge.c | 6 ++---
arch/powerpc/kernel/pci_64.c | 2 +-
arch/powerpc/lib/code-patching.c | 3 +--
arch/powerpc/mm/8xx_mmu.c | 3 +--
arch/powerpc/mm/dma-noncoherent.c | 2 +-
arch/powerpc/mm/mem.c | 4 +--
arch/powerpc/mm/pgtable-book3e.c | 9 +++----
arch/powerpc/mm/pgtable-hash64.c | 7 +++---
arch/powerpc/mm/pgtable_32.c | 37 +++++++++++++---------------
arch/powerpc/mm/pgtable_64.c | 37 ++++++++++++++--------------
drivers/pcmcia/electra_cf.c | 2 +-
20 files changed, 64 insertions(+), 77 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index 751cf931bb3f..7a9f0ed599ff 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -292,7 +292,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 3 })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 3 })
-int map_kernel_page(unsigned long va, phys_addr_t pa, int flags);
+int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
/* Generic accessors to PTE bits */
static inline int pte_write(pte_t pte) { return !!(pte_val(pte) & _PAGE_RW);}
diff --git a/arch/powerpc/include/asm/book3s/64/hash.h b/arch/powerpc/include/asm/book3s/64/hash.h
index fcf8b10a209f..247aff9cc6ba 100644
--- a/arch/powerpc/include/asm/book3s/64/hash.h
+++ b/arch/powerpc/include/asm/book3s/64/hash.h
@@ -201,8 +201,7 @@ static inline void hpte_do_hugepage_flush(struct mm_struct *mm,
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
-extern int hash__map_kernel_page(unsigned long ea, unsigned long pa,
- unsigned long flags);
+int hash__map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
extern int __meminit hash__vmemmap_create_mapping(unsigned long start,
unsigned long page_size,
unsigned long phys);
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index f108e2ce7f64..d4327f494371 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -1030,17 +1030,16 @@ extern struct page *pgd_page(pgd_t pgd);
#define pgd_ERROR(e) \
pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
-static inline int map_kernel_page(unsigned long ea, unsigned long pa,
- unsigned long flags)
+static inline int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot)
{
if (radix_enabled()) {
#if defined(CONFIG_PPC_RADIX_MMU) && defined(DEBUG_VM)
unsigned long page_size = 1 << mmu_psize_defs[mmu_io_psize].shift;
WARN((page_size != PAGE_SIZE), "I/O page size != PAGE_SIZE");
#endif
- return radix__map_kernel_page(ea, pa, __pgprot(flags), PAGE_SIZE);
+ return radix__map_kernel_page(ea, pa, prot, PAGE_SIZE);
}
- return hash__map_kernel_page(ea, pa, flags);
+ return hash__map_kernel_page(ea, pa, prot);
}
static inline int __meminit vmemmap_create_mapping(unsigned long start,
diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h
index 41cc15c14eee..b9fbed84ddca 100644
--- a/arch/powerpc/include/asm/fixmap.h
+++ b/arch/powerpc/include/asm/fixmap.h
@@ -72,7 +72,7 @@ enum fixed_addresses {
static inline void __set_fixmap(enum fixed_addresses idx,
phys_addr_t phys, pgprot_t flags)
{
- map_kernel_page(fix_to_virt(idx), phys, pgprot_val(flags));
+ map_kernel_page(fix_to_virt(idx), phys, flags);
}
#endif /* !__ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index cdccab3938db..0a034519957d 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -786,12 +786,12 @@ extern void iounmap(volatile void __iomem *addr);
extern void __iomem *__ioremap(phys_addr_t, unsigned long size,
unsigned long flags);
extern void __iomem *__ioremap_caller(phys_addr_t, unsigned long size,
- unsigned long flags, void *caller);
+ pgprot_t prot, void *caller);
extern void __iounmap(volatile void __iomem *addr);
extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea,
- unsigned long size, unsigned long flags);
+ unsigned long size, pgprot_t prot);
extern void __iounmap_at(void *ea, unsigned long size);
/*
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index b4831f1338db..8311869005fa 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -35,7 +35,7 @@ struct machdep_calls {
char *name;
#ifdef CONFIG_PPC64
void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size,
- unsigned long flags, void *caller);
+ pgprot_t prot, void *caller);
void (*iounmap)(volatile void __iomem *token);
#ifdef CONFIG_PM
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index a507a65b0866..a7f44498ab6f 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -323,7 +323,7 @@ static inline int pte_young(pte_t pte)
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 3 })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 3 })
-int map_kernel_page(unsigned long va, phys_addr_t pa, int flags);
+int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
#endif /* !__ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h
index 7cd6809f4d33..513b6e9e62c6 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable.h
@@ -327,8 +327,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
#define __swp_entry_to_pte(x) __pte((x).val)
-extern int map_kernel_page(unsigned long ea, unsigned long pa,
- unsigned long flags);
+int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
extern int __meminit vmemmap_create_mapping(unsigned long start,
unsigned long page_size,
unsigned long phys);
diff --git a/arch/powerpc/kernel/io-workarounds.c b/arch/powerpc/kernel/io-workarounds.c
index aa9f1b8261db..7e89d02a84e1 100644
--- a/arch/powerpc/kernel/io-workarounds.c
+++ b/arch/powerpc/kernel/io-workarounds.c
@@ -153,10 +153,10 @@ static const struct ppc_pci_io iowa_pci_io = {
#ifdef CONFIG_PPC_INDIRECT_MMIO
static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,
- unsigned long flags, void *caller)
+ pgprot_t prot, void *caller)
{
struct iowa_bus *bus;
- void __iomem *res = __ioremap_caller(addr, size, flags, caller);
+ void __iomem *res = __ioremap_caller(addr, size, prot, caller);
int busno;
bus = iowa_pci_find(0, (unsigned long)addr);
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index 072e384f8c86..fda3ae48480c 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -110,14 +110,14 @@ static void pci_process_ISA_OF_ranges(struct device_node *isa_node,
size = 0x10000;
__ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
- size, pgprot_val(pgprot_noncached(PAGE_KERNEL)));
+ size, pgprot_noncached(PAGE_KERNEL));
return;
inval_range:
printk(KERN_ERR "no ISA IO ranges or unexpected isa range, "
"mapping 64k\n");
__ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
- 0x10000, pgprot_val(pgprot_noncached(PAGE_KERNEL)));
+ 0x10000, pgprot_noncached(PAGE_KERNEL));
}
@@ -253,7 +253,7 @@ void __init isa_bridge_init_non_pci(struct device_node *np)
*/
isa_io_base = ISA_IO_BASE;
__ioremap_at(pbase, (void *)ISA_IO_BASE,
- size, pgprot_val(pgprot_noncached(PAGE_KERNEL)));
+ size, pgprot_noncached(PAGE_KERNEL));
pr_debug("ISA: Non-PCI bridge is %pOF\n", np);
}
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 64bb4dd2b8f1..9d8c10d55407 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -159,7 +159,7 @@ static int pcibios_map_phb_io_space(struct pci_controller *hose)
/* Establish the mapping */
if (__ioremap_at(phys_page, area->addr, size_page,
- pgprot_val(pgprot_noncached(PAGE_KERNEL))) == NULL)
+ pgprot_noncached(PAGE_KERNEL)) == NULL)
return -ENOMEM;
/* Fixup hose IO resource */
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index 5ffee298745f..89502cbccb1b 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -98,8 +98,7 @@ static int map_patch_area(void *addr, unsigned long text_poke_addr)
else
pfn = __pa_symbol(addr) >> PAGE_SHIFT;
- err = map_kernel_page(text_poke_addr, (pfn << PAGE_SHIFT),
- pgprot_val(PAGE_KERNEL));
+ err = map_kernel_page(text_poke_addr, (pfn << PAGE_SHIFT), PAGE_KERNEL);
pr_devel("Mapped addr %lx with pfn %lx:%d\n", text_poke_addr, pfn, err);
if (err)
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index cf77d755246d..9137361d687d 100644
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -91,11 +91,10 @@ static void __init mmu_mapin_immr(void)
{
unsigned long p = PHYS_IMMR_BASE;
unsigned long v = VIRT_IMMR_BASE;
- unsigned long f = pgprot_val(PAGE_KERNEL_NCG);
int offset;
for (offset = 0; offset < IMMR_SIZE; offset += PAGE_SIZE)
- map_kernel_page(v + offset, p + offset, f);
+ map_kernel_page(v + offset, p + offset, PAGE_KERNEL_NCG);
}
/* Address of instructions to patch */
diff --git a/arch/powerpc/mm/dma-noncoherent.c b/arch/powerpc/mm/dma-noncoherent.c
index 382528475433..b6e7b5952ab5 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -228,7 +228,7 @@ __dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t
do {
SetPageReserved(page);
map_kernel_page(vaddr, page_to_phys(page),
- pgprot_val(pgprot_noncached(PAGE_KERNEL)));
+ pgprot_noncached(PAGE_KERNEL));
page++;
vaddr += PAGE_SIZE;
} while (size -= PAGE_SIZE);
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 04ccb274a620..cb421aeb7674 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -309,11 +309,11 @@ void __init paging_init(void)
unsigned long end = __fix_to_virt(FIX_HOLE);
for (; v < end; v += PAGE_SIZE)
- map_kernel_page(v, 0, 0); /* XXX gross */
+ map_kernel_page(v, 0, __pgprot(0)); /* XXX gross */
#endif
#ifdef CONFIG_HIGHMEM
- map_kernel_page(PKMAP_BASE, 0, 0); /* XXX gross */
+ map_kernel_page(PKMAP_BASE, 0, __pgprot(0)); /* XXX gross */
pkmap_page_table = virt_to_kpte(PKMAP_BASE);
kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN));
diff --git a/arch/powerpc/mm/pgtable-book3e.c b/arch/powerpc/mm/pgtable-book3e.c
index a2298930f990..e0ccf36714b2 100644
--- a/arch/powerpc/mm/pgtable-book3e.c
+++ b/arch/powerpc/mm/pgtable-book3e.c
@@ -42,7 +42,7 @@ int __meminit vmemmap_create_mapping(unsigned long start,
* thus must have the low bits clear
*/
for (i = 0; i < page_size; i += PAGE_SIZE)
- BUG_ON(map_kernel_page(start + i, phys, flags));
+ BUG_ON(map_kernel_page(start + i, phys, __pgprot(flags)));
return 0;
}
@@ -70,7 +70,7 @@ static __ref void *early_alloc_pgtable(unsigned long size)
* map_kernel_page adds an entry to the ioremap page table
* and adds an entry to the HPT, possibly bolting it
*/
-int map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flags)
+int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot)
{
pgd_t *pgdp;
pud_t *pudp;
@@ -89,8 +89,6 @@ int map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flags)
ptep = pte_alloc_kernel(pmdp, ea);
if (!ptep)
return -ENOMEM;
- set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
- __pgprot(flags)));
} else {
pgdp = pgd_offset_k(ea);
#ifndef __PAGETABLE_PUD_FOLDED
@@ -113,9 +111,8 @@ int map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flags)
pmd_populate_kernel(&init_mm, pmdp, ptep);
}
ptep = pte_offset_kernel(pmdp, ea);
- set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
- __pgprot(flags)));
}
+ set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT, prot));
smp_wmb();
return 0;
diff --git a/arch/powerpc/mm/pgtable-hash64.c b/arch/powerpc/mm/pgtable-hash64.c
index 692bfc9e372c..c08d49046a96 100644
--- a/arch/powerpc/mm/pgtable-hash64.c
+++ b/arch/powerpc/mm/pgtable-hash64.c
@@ -142,7 +142,7 @@ void hash__vmemmap_remove_mapping(unsigned long start,
* map_kernel_page adds an entry to the ioremap page table
* and adds an entry to the HPT, possibly bolting it
*/
-int hash__map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flags)
+int hash__map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot)
{
pgd_t *pgdp;
pud_t *pudp;
@@ -161,8 +161,7 @@ int hash__map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flag
ptep = pte_alloc_kernel(pmdp, ea);
if (!ptep)
return -ENOMEM;
- set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
- __pgprot(flags)));
+ set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT, prot));
} else {
/*
* If the mm subsystem is not fully up, we cannot create a
@@ -170,7 +169,7 @@ int hash__map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flag
* entry in the hardware page table.
*
*/
- if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
+ if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, pgprot_val(prot),
mmu_io_psize, mmu_kernel_ssize)) {
printk(KERN_ERR "Failed to do bolted mapping IO "
"memory at %016lx !\n", pa);
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 6a81a2446c47..0bbc7b7d8a05 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -76,36 +76,36 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
void __iomem *
ioremap(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_noncached(PAGE_KERNEL));
+ pgprot_t prot = pgprot_noncached(PAGE_KERNEL);
- return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+ return __ioremap_caller(addr, size, prot, __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap);
void __iomem *
ioremap_wc(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_noncached_wc(PAGE_KERNEL));
+ pgprot_t prot = pgprot_noncached_wc(PAGE_KERNEL);
- return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+ return __ioremap_caller(addr, size, prot, __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_wc);
void __iomem *
ioremap_wt(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_cached_wthru(PAGE_KERNEL));
+ pgprot_t prot = pgprot_cached_wthru(PAGE_KERNEL);
- return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+ return __ioremap_caller(addr, size, prot, __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_wt);
void __iomem *
ioremap_coherent(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_cached(PAGE_KERNEL));
+ pgprot_t prot = pgprot_cached(PAGE_KERNEL);
- return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+ return __ioremap_caller(addr, size, prot, __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_coherent);
@@ -120,19 +120,18 @@ ioremap_prot(phys_addr_t addr, unsigned long size, unsigned long flags)
flags &= ~(_PAGE_USER | _PAGE_EXEC);
flags |= _PAGE_PRIVILEGED;
- return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+ return __ioremap_caller(addr, size, __pgprot(flags), __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_prot);
void __iomem *
__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
{
- return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+ return __ioremap_caller(addr, size, __pgprot(flags), __builtin_return_address(0));
}
void __iomem *
-__ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
- void *caller)
+__ioremap_caller(phys_addr_t addr, unsigned long size, pgprot_t prot, void *caller)
{
unsigned long v, i;
phys_addr_t p;
@@ -195,7 +194,7 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
err = 0;
for (i = 0; i < size && err == 0; i += PAGE_SIZE)
- err = map_kernel_page(v+i, p+i, flags);
+ err = map_kernel_page(v + i, p + i, prot);
if (err) {
if (slab_is_available())
vunmap((void *)v);
@@ -221,7 +220,7 @@ void iounmap(volatile void __iomem *addr)
}
EXPORT_SYMBOL(iounmap);
-int map_kernel_page(unsigned long va, phys_addr_t pa, int flags)
+int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot)
{
pmd_t *pd;
pte_t *pg;
@@ -237,9 +236,8 @@ int map_kernel_page(unsigned long va, phys_addr_t pa, int flags)
* hash table
*/
BUG_ON((pte_val(*pg) & (_PAGE_PRESENT | _PAGE_HASHPTE)) &&
- flags);
- set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT,
- __pgprot(flags)));
+ pgprot_val(prot));
+ set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT, prot));
}
smp_wmb();
return err;
@@ -250,7 +248,7 @@ int map_kernel_page(unsigned long va, phys_addr_t pa, int flags)
*/
static void __init __mapin_ram_chunk(unsigned long offset, unsigned long top)
{
- unsigned long v, s, f;
+ unsigned long v, s;
phys_addr_t p;
int ktext;
@@ -260,8 +258,7 @@ static void __init __mapin_ram_chunk(unsigned long offset, unsigned long top)
for (; s < top; s += PAGE_SIZE) {
ktext = ((char *)v >= _stext && (char *)v < etext) ||
((char *)v >= _sinittext && (char *)v < _einittext);
- f = ktext ? pgprot_val(PAGE_KERNEL_TEXT) : pgprot_val(PAGE_KERNEL);
- map_kernel_page(v, p, f);
+ map_kernel_page(v, p, ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL);
#ifdef CONFIG_PPC_STD_MMU_32
if (ktext)
hash_preload(&init_mm, v, 0, 0x300);
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 1f1bb40555a8..b0f4a4b4f62b 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -113,13 +113,12 @@ unsigned long ioremap_bot = IOREMAP_BASE;
* __ioremap_at - Low level function to establish the page tables
* for an IO mapping
*/
-void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
- unsigned long flags)
+void __iomem *__ioremap_at(phys_addr_t pa, void *ea, unsigned long size, pgprot_t prot)
{
unsigned long i;
/* We don't support the 4K PFN hack with ioremap */
- if (flags & H_PAGE_4K_PFN)
+ if (pgprot_val(prot) & H_PAGE_4K_PFN)
return NULL;
WARN_ON(pa & ~PAGE_MASK);
@@ -127,7 +126,7 @@ void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
WARN_ON(size & ~PAGE_MASK);
for (i = 0; i < size; i += PAGE_SIZE)
- if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
+ if (map_kernel_page((unsigned long)ea + i, pa + i, prot))
return NULL;
return (void __iomem *)ea;
@@ -148,7 +147,7 @@ void __iounmap_at(void *ea, unsigned long size)
}
void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
- unsigned long flags, void *caller)
+ pgprot_t prot, void *caller)
{
phys_addr_t paligned;
void __iomem *ret;
@@ -178,11 +177,11 @@ void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
return NULL;
area->phys_addr = paligned;
- ret = __ioremap_at(paligned, area->addr, size, flags);
+ ret = __ioremap_at(paligned, area->addr, size, prot);
if (!ret)
vunmap(area->addr);
} else {
- ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
+ ret = __ioremap_at(paligned, (void *)ioremap_bot, size, prot);
if (ret)
ioremap_bot += size;
}
@@ -195,37 +194,37 @@ void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
unsigned long flags)
{
- return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+ return __ioremap_caller(addr, size, __pgprot(flags), __builtin_return_address(0));
}
void __iomem * ioremap(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_noncached(PAGE_KERNEL));
+ pgprot_t prot = pgprot_noncached(PAGE_KERNEL);
void *caller = __builtin_return_address(0);
if (ppc_md.ioremap)
- return ppc_md.ioremap(addr, size, flags, caller);
- return __ioremap_caller(addr, size, flags, caller);
+ return ppc_md.ioremap(addr, size, prot, caller);
+ return __ioremap_caller(addr, size, prot, caller);
}
void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_noncached_wc(PAGE_KERNEL));
+ pgprot_t prot = pgprot_noncached_wc(PAGE_KERNEL);
void *caller = __builtin_return_address(0);
if (ppc_md.ioremap)
- return ppc_md.ioremap(addr, size, flags, caller);
- return __ioremap_caller(addr, size, flags, caller);
+ return ppc_md.ioremap(addr, size, prot, caller);
+ return __ioremap_caller(addr, size, prot, caller);
}
void __iomem *ioremap_coherent(phys_addr_t addr, unsigned long size)
{
- unsigned long flags = pgprot_val(pgprot_cached(PAGE_KERNEL));
+ pgprot_t prot = pgprot_cached(PAGE_KERNEL);
void *caller = __builtin_return_address(0);
if (ppc_md.ioremap)
- return ppc_md.ioremap(addr, size, flags, caller);
- return __ioremap_caller(addr, size, flags, caller);
+ return ppc_md.ioremap(addr, size, prot, caller);
+ return __ioremap_caller(addr, size, prot, caller);
}
void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
@@ -246,8 +245,8 @@ void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
flags |= _PAGE_PRIVILEGED;
if (ppc_md.ioremap)
- return ppc_md.ioremap(addr, size, flags, caller);
- return __ioremap_caller(addr, size, flags, caller);
+ return ppc_md.ioremap(addr, size, __pgprot(flags), caller);
+ return __ioremap_caller(addr, size, __pgprot(flags), caller);
}
diff --git a/drivers/pcmcia/electra_cf.c b/drivers/pcmcia/electra_cf.c
index 34d6c1a0971e..b31abe35ed2c 100644
--- a/drivers/pcmcia/electra_cf.c
+++ b/drivers/pcmcia/electra_cf.c
@@ -230,7 +230,7 @@ static int electra_cf_probe(struct platform_device *ofdev)
if (!cf->mem_base || !cf->io_virt || !cf->gpio_base ||
(__ioremap_at(io.start, cf->io_virt, cf->io_size,
- pgprot_val(pgprot_noncached(PAGE_KERNEL))) == NULL)) {
+ pgprot_noncached(PAGE_KERNEL)) == NULL)) {
dev_err(device, "can't ioremap ranges\n");
status = -ENOMEM;
goto fail1;
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 08/24] powerpc/mm: don't use _PAGE_EXEC in book3s/32
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (6 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 07/24] powerpc: handover page flags with a pgprot_t parameter Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 09/24] powerpc/mm: move some nohash pte helpers in nohash/[32:64]/pgtable.h Christophe Leroy
` (15 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
book3s/32 doesn't define _PAGE_EXEC, so no need to use it.
All other platforms define _PAGE_EXEC so no need to check
it is not NUL when not book3s/32.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 2 +-
arch/powerpc/mm/pgtable.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index 7a9f0ed599ff..3127cc529aa1 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -234,7 +234,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
int psize)
{
unsigned long set = pte_val(entry) &
- (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
+ (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW);
unsigned long clr = ~pte_val(entry) & _PAGE_RO;
pte_update(ptep, clr, set);
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index aee04b209b51..f97d9c3760e3 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -73,7 +73,7 @@ static struct page *maybe_pte_to_page(pte_t pte)
return page;
}
-#if defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0
+#ifdef CONFIG_PPC_BOOK3S
/* Server-style MMU handles coherency when hashing if HW exec permission
* is supposed per page (currently 64-bit only). If not, then, we always
@@ -106,7 +106,7 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
return pte;
}
-#else /* defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0 */
+#else /* CONFIG_PPC_BOOK3S */
/* Embedded type MMU with HW exec support. This is a bit more complicated
* as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
@@ -179,7 +179,7 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
return __pte(pte_val(pte) | _PAGE_EXEC);
}
-#endif /* !(defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0) */
+#endif /* CONFIG_PPC_BOOK3S */
/*
* set_pte stores a linux PTE into the linux page table.
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 09/24] powerpc/mm: move some nohash pte helpers in nohash/[32:64]/pgtable.h
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (7 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 08/24] powerpc/mm: don't use _PAGE_EXEC in book3s/32 Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 10/24] powerpc/mm: add pte helpers to query and change pte flags Christophe Leroy
` (14 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
In order to allow their use in nohash/32/pgtable.h, we have to move the
following helpers in nohash/[32:64]/pgtable.h:
- pte_mkwrite()
- pte_mkdirty()
- pte_mkyoung()
- pte_wrprotect()
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/32/pgtable.h | 28 ++++++++++++++++++++++++++++
arch/powerpc/include/asm/nohash/64/pgtable.h | 20 ++++++++++++++++++++
arch/powerpc/include/asm/nohash/pgtable.h | 28 ----------------------------
3 files changed, 48 insertions(+), 28 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index a7f44498ab6f..4373f8c44b6d 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -136,6 +136,34 @@ extern int icache_44x_need_flush;
#define pte_clear(mm, addr, ptep) \
do { pte_update(ptep, ~0, 0); } while (0)
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+ pte_basic_t ptev;
+
+ ptev = pte_val(pte) & ~_PAGE_RO;
+ ptev |= _PAGE_RW;
+ return __pte(ptev);
+}
+
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_DIRTY);
+}
+
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_ACCESSED);
+}
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+ pte_basic_t ptev;
+
+ ptev = pte_val(pte) & ~(_PAGE_RW | _PAGE_HWWRITE);
+ ptev |= _PAGE_RO;
+ return __pte(ptev);
+}
+
#define pmd_none(pmd) (!pmd_val(pmd))
#define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD)
#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK)
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h
index 513b6e9e62c6..72dac522aa66 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable.h
@@ -94,6 +94,26 @@
#ifndef __ASSEMBLY__
/* pte_clear moved to later in this file */
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_RW);
+}
+
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_DIRTY);
+}
+
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_ACCESSED);
+}
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~_PAGE_RW);
+}
+
#define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
#define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index 5b82e44c4231..c746e9e784cd 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -77,15 +77,6 @@ static inline unsigned long pte_pfn(pte_t pte) {
return pte_val(pte) >> PTE_RPN_SHIFT; }
/* Generic modifiers for PTE bits */
-static inline pte_t pte_wrprotect(pte_t pte)
-{
- pte_basic_t ptev;
-
- ptev = pte_val(pte) & ~(_PAGE_RW | _PAGE_HWWRITE);
- ptev |= _PAGE_RO;
- return __pte(ptev);
-}
-
static inline pte_t pte_mkclean(pte_t pte)
{
return __pte(pte_val(pte) & ~(_PAGE_DIRTY | _PAGE_HWWRITE));
@@ -96,25 +87,6 @@ static inline pte_t pte_mkold(pte_t pte)
return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
}
-static inline pte_t pte_mkwrite(pte_t pte)
-{
- pte_basic_t ptev;
-
- ptev = pte_val(pte) & ~_PAGE_RO;
- ptev |= _PAGE_RW;
- return __pte(ptev);
-}
-
-static inline pte_t pte_mkdirty(pte_t pte)
-{
- return __pte(pte_val(pte) | _PAGE_DIRTY);
-}
-
-static inline pte_t pte_mkyoung(pte_t pte)
-{
- return __pte(pte_val(pte) | _PAGE_ACCESSED);
-}
-
static inline pte_t pte_mkspecial(pte_t pte)
{
return __pte(pte_val(pte) | _PAGE_SPECIAL);
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 10/24] powerpc/mm: add pte helpers to query and change pte flags
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (8 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 09/24] powerpc/mm: move some nohash pte helpers in nohash/[32:64]/pgtable.h Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 11/24] powerpc/mm: don't use _PAGE_EXEC for calling hash_preload() Christophe Leroy
` (13 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
In order to avoid using generic _PAGE_XXX flags in powerpc
core functions, define helpers for all needed flags:
- pte_mkuser() and pte_mkprivileged() to set/unset and/or
unset/set _PAGE_USER and/or _PAGE_PRIVILEGED
- pte_hashpte() to check if _PAGE_HASHPTE is set.
- pte_ci() check if cache is inhibited (already existing on book3s/64)
- pte_exprotect() to protect against execution
- pte_exec() and pte_mkexec() to query and set page execution
- pte_mkpte() to set _PAGE_PTE flag.
- pte_hw_valid() to check _PAGE_PRESENT since pte_present does
something different on book3s/64.
On book3s/32 there is no exec protection, so pte_mkexec() and
pte_exprotect() are nops and pte_exec() returns always true.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 41 ++++++++++++++++++++++++++++
arch/powerpc/include/asm/book3s/64/pgtable.h | 35 ++++++++++++++++++++++++
arch/powerpc/include/asm/nohash/32/pgtable.h | 5 ++++
arch/powerpc/include/asm/nohash/64/pgtable.h | 5 ++++
arch/powerpc/include/asm/nohash/pgtable.h | 28 +++++++++++++++++++
5 files changed, 114 insertions(+)
diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index 3127cc529aa1..a6ca799e0eb5 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -301,6 +301,7 @@ static inline int pte_dirty(pte_t pte) { return !!(pte_val(pte) & _PAGE_DIRTY);
static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSED); }
static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); }
static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
+static inline bool pte_exec(pte_t pte) { return true; }
static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
static inline int pte_present(pte_t pte)
@@ -308,6 +309,21 @@ static inline int pte_present(pte_t pte)
return pte_val(pte) & _PAGE_PRESENT;
}
+static inline bool pte_hw_valid(pte_t pte)
+{
+ return pte_val(pte) & _PAGE_PRESENT;
+}
+
+static inline bool pte_hashpte(pte_t pte)
+{
+ return !!(pte_val(pte) & _PAGE_HASHPTE);
+}
+
+static inline bool pte_ci(pte_t pte)
+{
+ return !!(pte_val(pte) & _PAGE_NO_CACHE);
+}
+
/*
* We only find page table entry in the last level
* Hence no need for other accessors
@@ -354,6 +370,11 @@ static inline pte_t pte_wrprotect(pte_t pte)
return __pte(pte_val(pte) & ~_PAGE_RW);
}
+static inline pte_t pte_exprotect(pte_t pte)
+{
+ return pte;
+}
+
static inline pte_t pte_mkclean(pte_t pte)
{
return __pte(pte_val(pte) & ~_PAGE_DIRTY);
@@ -364,6 +385,16 @@ static inline pte_t pte_mkold(pte_t pte)
return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
}
+static inline pte_t pte_mkexec(pte_t pte)
+{
+ return pte;
+}
+
+static inline pte_t pte_mkpte(pte_t pte)
+{
+ return pte;
+}
+
static inline pte_t pte_mkwrite(pte_t pte)
{
return __pte(pte_val(pte) | _PAGE_RW);
@@ -389,6 +420,16 @@ static inline pte_t pte_mkhuge(pte_t pte)
return pte;
}
+static inline pte_t pte_mkprivileged(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~_PAGE_USER);
+}
+
+static inline pte_t pte_mkuser(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_USER);
+}
+
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index d4327f494371..c8564762b6f0 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -519,6 +519,11 @@ static inline int pte_special(pte_t pte)
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SPECIAL));
}
+static inline bool pte_exec(pte_t pte)
+{
+ return !!(pte_raw(pte) & cpu_to_be64(_PAGE_EXEC));
+}
+
static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
@@ -587,6 +592,11 @@ static inline int pte_present(pte_t pte)
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_INVALID));
}
+static inline bool pte_hw_valid(pte_t pte)
+{
+ return !!(pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT));
+}
+
#ifdef CONFIG_PPC_MEM_KEYS
extern bool arch_pte_access_permitted(u64 pte, bool write, bool execute);
#else
@@ -646,6 +656,11 @@ static inline pte_t pte_wrprotect(pte_t pte)
return __pte(pte_val(pte) & ~_PAGE_WRITE);
}
+static inline pte_t pte_exprotect(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~_PAGE_EXEC);
+}
+
static inline pte_t pte_mkclean(pte_t pte)
{
return __pte(pte_val(pte) & ~_PAGE_DIRTY);
@@ -656,6 +671,16 @@ static inline pte_t pte_mkold(pte_t pte)
return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
}
+static inline pte_t pte_mkexec(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_EXEC);
+}
+
+static inline pte_t pte_mkpte(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_PTE);
+}
+
static inline pte_t pte_mkwrite(pte_t pte)
{
/*
@@ -689,6 +714,16 @@ static inline pte_t pte_mkdevmap(pte_t pte)
return __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP);
}
+static inline pte_t pte_mkprivileged(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_PRIVILEGED);
+}
+
+static inline pte_t pte_mkuser(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);
+}
+
/*
* This is potentially called with a pmd as the argument, in which case it's not
* safe to check _PAGE_DEVMAP unless we also confirm that _PAGE_PTE is set.
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index 4373f8c44b6d..6fecfd7854f5 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -164,6 +164,11 @@ static inline pte_t pte_wrprotect(pte_t pte)
return __pte(ptev);
}
+static inline pte_t pte_mkexec(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_EXEC);
+}
+
#define pmd_none(pmd) (!pmd_val(pmd))
#define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD)
#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK)
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h
index 72dac522aa66..b7d65d4b61be 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable.h
@@ -114,6 +114,11 @@ static inline pte_t pte_wrprotect(pte_t pte)
return __pte(pte_val(pte) & ~_PAGE_RW);
}
+static inline pte_t pte_mkexec(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_EXEC);
+}
+
#define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
#define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index c746e9e784cd..b256e38a047c 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -19,6 +19,9 @@ static inline int pte_read(pte_t pte) { return 1; }
static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
+static inline bool pte_hashpte(pte_t pte) { return false; }
+static inline bool pte_ci(pte_t pte) { return pte_val(pte) & _PAGE_NO_CACHE; }
+static inline bool pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; }
static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
#ifdef CONFIG_NUMA_BALANCING
@@ -44,6 +47,11 @@ static inline int pte_present(pte_t pte)
return pte_val(pte) & _PAGE_PRESENT;
}
+static inline bool pte_hw_valid(pte_t pte)
+{
+ return pte_val(pte) & _PAGE_PRESENT;
+}
+
/*
* We only find page table entry in the last level
* Hence no need for other accessors
@@ -77,6 +85,11 @@ static inline unsigned long pte_pfn(pte_t pte) {
return pte_val(pte) >> PTE_RPN_SHIFT; }
/* Generic modifiers for PTE bits */
+static inline pte_t pte_exprotect(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~_PAGE_EXEC);
+}
+
static inline pte_t pte_mkclean(pte_t pte)
{
return __pte(pte_val(pte) & ~(_PAGE_DIRTY | _PAGE_HWWRITE));
@@ -87,6 +100,11 @@ static inline pte_t pte_mkold(pte_t pte)
return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
}
+static inline pte_t pte_mkpte(pte_t pte)
+{
+ return pte;
+}
+
static inline pte_t pte_mkspecial(pte_t pte)
{
return __pte(pte_val(pte) | _PAGE_SPECIAL);
@@ -97,6 +115,16 @@ static inline pte_t pte_mkhuge(pte_t pte)
return __pte(pte_val(pte) | _PAGE_HUGE);
}
+static inline pte_t pte_mkprivileged(pte_t pte)
+{
+ return __pte((pte_val(pte) & ~_PAGE_USER) | _PAGE_PRIVILEGED);
+}
+
+static inline pte_t pte_mkuser(pte_t pte)
+{
+ return __pte((pte_val(pte) & ~_PAGE_PRIVILEGED) | _PAGE_USER);
+}
+
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 11/24] powerpc/mm: don't use _PAGE_EXEC for calling hash_preload()
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (9 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 10/24] powerpc/mm: add pte helpers to query and change pte flags Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 13:51 ` [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code Christophe Leroy
` (12 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
The 'access' parameter of hash_preload() is either 0 or _PAGE_EXEC.
Among the two versions of hash_preload(), only the PPC64 one is
doing something with this 'access' parameter.
In order to remove the use of _PAGE_EXEC outside platform code,
'access' parameter is replaced by 'is_exec' which will be either
true of false, and the PPC64 version of hash_preload() creates
the access flag based on 'is_exec'.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/mm/hash_utils_64.c | 3 ++-
arch/powerpc/mm/mem.c | 9 +++++----
arch/powerpc/mm/mmu_decl.h | 2 +-
arch/powerpc/mm/pgtable_32.c | 2 +-
arch/powerpc/mm/ppc_mmu_32.c | 2 +-
5 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 8ff03c7205a0..854edc3722e0 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -1482,7 +1482,7 @@ static bool should_hash_preload(struct mm_struct *mm, unsigned long ea)
#endif
void hash_preload(struct mm_struct *mm, unsigned long ea,
- unsigned long access, unsigned long trap)
+ bool is_exec, unsigned long trap)
{
int hugepage_shift;
unsigned long vsid;
@@ -1490,6 +1490,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
pte_t *ptep;
unsigned long flags;
int rc, ssize, update_flags = 0;
+ unsigned long access = _PAGE_PRESENT | _PAGE_READ | (is_exec ? _PAGE_EXEC : 0);
BUG_ON(REGION_ID(ea) != USER_REGION_ID);
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index cb421aeb7674..dd949d6649a2 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -509,7 +509,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
* We don't need to worry about _PAGE_PRESENT here because we are
* called with either mm->page_table_lock held or ptl lock held
*/
- unsigned long access, trap;
+ unsigned long trap;
+ bool is_exec;
if (radix_enabled()) {
prefetch((void *)address);
@@ -531,16 +532,16 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
trap = current->thread.regs ? TRAP(current->thread.regs) : 0UL;
switch (trap) {
case 0x300:
- access = 0UL;
+ is_exec = false;
break;
case 0x400:
- access = _PAGE_EXEC;
+ is_exec = true;
break;
default:
return;
}
- hash_preload(vma->vm_mm, address, access, trap);
+ hash_preload(vma->vm_mm, address, is_exec, trap);
#endif /* CONFIG_PPC_STD_MMU */
#if (defined(CONFIG_PPC_BOOK3E_64) || defined(CONFIG_PPC_FSL_BOOK3E)) \
&& defined(CONFIG_HUGETLB_PAGE)
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index e5d779eed181..dd7f9b951d25 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -82,7 +82,7 @@ static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
#else /* CONFIG_PPC_MMU_NOHASH */
extern void hash_preload(struct mm_struct *mm, unsigned long ea,
- unsigned long access, unsigned long trap);
+ bool is_exec, unsigned long trap);
extern void _tlbie(unsigned long address);
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 0bbc7b7d8a05..01f348938328 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -261,7 +261,7 @@ static void __init __mapin_ram_chunk(unsigned long offset, unsigned long top)
map_kernel_page(v, p, ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL);
#ifdef CONFIG_PPC_STD_MMU_32
if (ktext)
- hash_preload(&init_mm, v, 0, 0x300);
+ hash_preload(&init_mm, v, false, 0x300);
#endif
v += PAGE_SIZE;
p += PAGE_SIZE;
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index bea6c544e38f..38a793bfca37 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -163,7 +163,7 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys,
* Preload a translation in the hash table
*/
void hash_preload(struct mm_struct *mm, unsigned long ea,
- unsigned long access, unsigned long trap)
+ bool is_exec, unsigned long trap)
{
pmd_t *pmd;
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (10 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 11/24] powerpc/mm: don't use _PAGE_EXEC for calling hash_preload() Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-17 0:59 ` Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code) Michael Ellerman
2018-10-09 13:51 ` [PATCH v3 13/24] powerpc/mm: Split dump_pagelinuxtables flag_array table Christophe Leroy
` (11 subsequent siblings)
23 siblings, 1 reply; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Get rid of platform specific _PAGE_XXXX in powerpc common code and
use helpers instead.
mm/dump_linuxpagetables.c will be handled separately
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 9 +++------
arch/powerpc/include/asm/nohash/32/pgtable.h | 12 ++++++++----
arch/powerpc/include/asm/nohash/pgtable.h | 3 +--
arch/powerpc/mm/pgtable.c | 21 +++++++--------------
arch/powerpc/mm/pgtable_32.c | 15 ++++++++-------
arch/powerpc/mm/pgtable_64.c | 14 +++++++-------
arch/powerpc/xmon/xmon.c | 12 +++++++-----
7 files changed, 41 insertions(+), 45 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index a6ca799e0eb5..a0dc3a3eef33 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -331,17 +331,14 @@ static inline bool pte_ci(pte_t pte)
#define pte_access_permitted pte_access_permitted
static inline bool pte_access_permitted(pte_t pte, bool write)
{
- unsigned long pteval = pte_val(pte);
/*
* A read-only access is controlled by _PAGE_USER bit.
* We have _PAGE_READ set for WRITE and EXECUTE
*/
- unsigned long need_pte_bits = _PAGE_PRESENT | _PAGE_USER;
-
- if (write)
- need_pte_bits |= _PAGE_WRITE;
+ if (!pte_present(pte) || !pte_user(pte) || !pte_read(pte))
+ return false;
- if ((pteval & need_pte_bits) != need_pte_bits)
+ if (write && !pte_write(pte))
return false;
return true;
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index 6fecfd7854f5..a4156da4a7a4 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -277,7 +277,10 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
pte_t *ptep)
{
- pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), _PAGE_RO);
+ unsigned long clr = ~pte_val(pte_wrprotect(__pte(~0)));
+ unsigned long set = pte_val(pte_wrprotect(__pte(0)));
+
+ pte_update(ptep, clr, set);
}
static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
unsigned long addr, pte_t *ptep)
@@ -291,9 +294,10 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
unsigned long address,
int psize)
{
- unsigned long set = pte_val(entry) &
- (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
- unsigned long clr = ~pte_val(entry) & (_PAGE_RO | _PAGE_NA);
+ pte_t pte_set = pte_mkyoung(pte_mkdirty(pte_mkwrite(pte_mkexec(__pte(0)))));
+ pte_t pte_clr = pte_mkyoung(pte_mkdirty(pte_mkwrite(pte_mkexec(__pte(~0)))));
+ unsigned long set = pte_val(entry) & pte_val(pte_set);
+ unsigned long clr = ~pte_val(entry) & ~pte_val(pte_clr);
pte_update(ptep, clr, set);
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index b256e38a047c..062d96233673 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -32,8 +32,7 @@ static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PA
*/
static inline int pte_protnone(pte_t pte)
{
- return (pte_val(pte) &
- (_PAGE_PRESENT | _PAGE_USER)) == _PAGE_PRESENT;
+ return pte_present(pte) && !pte_user(pte);
}
static inline int pmd_protnone(pmd_t pmd)
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index f97d9c3760e3..ca4b1f7ac39d 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -44,20 +44,13 @@ static inline int is_exec_fault(void)
static inline int pte_looks_normal(pte_t pte)
{
-#if defined(CONFIG_PPC_BOOK3S_64)
- if ((pte_val(pte) & (_PAGE_PRESENT | _PAGE_SPECIAL)) == _PAGE_PRESENT) {
+ if (pte_present(pte) && !pte_special(pte)) {
if (pte_ci(pte))
return 0;
if (pte_user(pte))
return 1;
}
return 0;
-#else
- return (pte_val(pte) &
- (_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE | _PAGE_USER |
- _PAGE_PRIVILEGED)) ==
- (_PAGE_PRESENT | _PAGE_USER);
-#endif
}
static struct page *maybe_pte_to_page(pte_t pte)
@@ -117,7 +110,7 @@ static pte_t set_pte_filter(pte_t pte)
struct page *pg;
/* No exec permission in the first place, move on */
- if (!(pte_val(pte) & _PAGE_EXEC) || !pte_looks_normal(pte))
+ if (!pte_exec(pte) || !pte_looks_normal(pte))
return pte;
/* If you set _PAGE_EXEC on weird pages you're on your own */
@@ -137,7 +130,7 @@ static pte_t set_pte_filter(pte_t pte)
}
/* Else, we filter out _PAGE_EXEC */
- return __pte(pte_val(pte) & ~_PAGE_EXEC);
+ return pte_exprotect(pte);
}
static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
@@ -150,7 +143,7 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
* if necessary. Also if _PAGE_EXEC is already set, same deal,
* we just bail out
*/
- if (dirty || (pte_val(pte) & _PAGE_EXEC) || !is_exec_fault())
+ if (dirty || pte_exec(pte) || !is_exec_fault())
return pte;
#ifdef CONFIG_DEBUG_VM
@@ -176,7 +169,7 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
set_bit(PG_arch_1, &pg->flags);
bail:
- return __pte(pte_val(pte) | _PAGE_EXEC);
+ return pte_mkexec(pte);
}
#endif /* CONFIG_PPC_BOOK3S */
@@ -191,10 +184,10 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
* Make sure hardware valid bit is not set. We don't do
* tlb flush for this update.
*/
- VM_WARN_ON(pte_val(*ptep) & _PAGE_PRESENT);
+ VM_WARN_ON(pte_hw_valid(*ptep));
/* Add the pte bit when trying to set a pte */
- pte = __pte(pte_val(pte) | _PAGE_PTE);
+ pte = pte_mkpte(pte);
/* Note: mm->context.id might not yet have been assigned as
* this context might not have been activated yet when this
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 01f348938328..5877f5aa8f5d 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -112,15 +112,17 @@ EXPORT_SYMBOL(ioremap_coherent);
void __iomem *
ioremap_prot(phys_addr_t addr, unsigned long size, unsigned long flags)
{
+ pte_t pte = __pte(flags);
+
/* writeable implies dirty for kernel addresses */
- if ((flags & (_PAGE_RW | _PAGE_RO)) != _PAGE_RO)
- flags |= _PAGE_DIRTY | _PAGE_HWWRITE;
+ if (pte_write(pte))
+ pte = pte_mkdirty(pte);
/* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */
- flags &= ~(_PAGE_USER | _PAGE_EXEC);
- flags |= _PAGE_PRIVILEGED;
+ pte = pte_exprotect(pte);
+ pte = pte_mkprivileged(pte);
- return __ioremap_caller(addr, size, __pgprot(flags), __builtin_return_address(0));
+ return __ioremap_caller(addr, size, pte_pgprot(pte), __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_prot);
@@ -235,8 +237,7 @@ int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot)
/* The PTE should never be already set nor present in the
* hash table
*/
- BUG_ON((pte_val(*pg) & (_PAGE_PRESENT | _PAGE_HASHPTE)) &&
- pgprot_val(prot));
+ BUG_ON((pte_present(*pg) | pte_hashpte(*pg)) && pgprot_val(prot));
set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT, prot));
}
smp_wmb();
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index b0f4a4b4f62b..fb1375c07e8c 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -230,23 +230,23 @@ void __iomem *ioremap_coherent(phys_addr_t addr, unsigned long size)
void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
unsigned long flags)
{
+ pte_t pte = __pte(flags);
void *caller = __builtin_return_address(0);
/* writeable implies dirty for kernel addresses */
- if (flags & _PAGE_WRITE)
- flags |= _PAGE_DIRTY;
+ if (pte_write(pte))
+ pte = pte_mkdirty(pte);
/* we don't want to let _PAGE_EXEC leak out */
- flags &= ~_PAGE_EXEC;
+ pte = pte_exprotect(pte);
/*
* Force kernel mapping.
*/
- flags &= ~_PAGE_USER;
- flags |= _PAGE_PRIVILEGED;
+ pte = pte_mkprivileged(pte);
if (ppc_md.ioremap)
- return ppc_md.ioremap(addr, size, __pgprot(flags), caller);
- return __ioremap_caller(addr, size, __pgprot(flags), caller);
+ return ppc_md.ioremap(addr, size, pte_pgprot(pte), caller);
+ return __ioremap_caller(addr, size, pte_pgprot(pte), caller);
}
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index c70d17c9a6ba..167271c7a97c 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2993,15 +2993,17 @@ static void show_task(struct task_struct *tsk)
#ifdef CONFIG_PPC_BOOK3S_64
void format_pte(void *ptep, unsigned long pte)
{
+ pte_t entry = __pte(pte);
+
printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte);
printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK);
printf("Flags = %s%s%s%s%s\n",
- (pte & _PAGE_ACCESSED) ? "Accessed " : "",
- (pte & _PAGE_DIRTY) ? "Dirty " : "",
- (pte & _PAGE_READ) ? "Read " : "",
- (pte & _PAGE_WRITE) ? "Write " : "",
- (pte & _PAGE_EXEC) ? "Exec " : "");
+ pte_young(entry) ? "Accessed " : "",
+ pte_dirty(entry) ? "Dirty " : "",
+ pte_read(entry) ? "Read " : "",
+ pte_write(entry) ? "Write " : "",
+ pte_exec(entry) ? "Exec " : "");
}
static void show_pte(unsigned long addr)
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code)
2018-10-09 13:51 ` [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code Christophe Leroy
@ 2018-10-17 0:59 ` Michael Ellerman
2018-10-17 6:00 ` Christophe Leroy
0 siblings, 1 reply; 42+ messages in thread
From: Michael Ellerman @ 2018-10-17 0:59 UTC (permalink / raw)
To: Christophe Leroy, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar, benh
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Christophe Leroy <christophe.leroy@c-s.fr> writes:
> Get rid of platform specific _PAGE_XXXX in powerpc common code and
> use helpers instead.
>
> mm/dump_linuxpagetables.c will be handled separately
>
> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> ---
> arch/powerpc/include/asm/book3s/32/pgtable.h | 9 +++------
> arch/powerpc/include/asm/nohash/32/pgtable.h | 12 ++++++++----
> arch/powerpc/include/asm/nohash/pgtable.h | 3 +--
> arch/powerpc/mm/pgtable.c | 21 +++++++--------------
> arch/powerpc/mm/pgtable_32.c | 15 ++++++++-------
> arch/powerpc/mm/pgtable_64.c | 14 +++++++-------
> arch/powerpc/xmon/xmon.c | 12 +++++++-----
> 7 files changed, 41 insertions(+), 45 deletions(-)
So turns out this patch *also* breaks my p5020ds :)
Even with patch 4 merged, see next.
It's the same crash:
pcieport 2000:00:00.0: AER enabled with IRQ 480
Unable to handle kernel paging request for data at address 0x8000080080080000
Faulting instruction address: 0xc0000000000192cc
Oops: Kernel access of bad area, sig: 11 [#1]
BE SMP NR_CPUS=24 CoreNet Generic
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc3-gcc7x-g98c847323b3a #1
NIP: c0000000000192cc LR: c0000000005d0f9c CTR: 0000000000100000
REGS: c0000000f31bb400 TRAP: 0300 Not tainted (4.19.0-rc3-gcc7x-g98c847323b3a)
MSR: 0000000080029000 <CE,EE,ME> CR: 24000224 XER: 00000000
DEAR: 8000080080080000 ESR: 0000000000800000 IRQMASK: 0
GPR00: c0000000005d0f84 c0000000f31bb688 c00000000117dc00 8000080080080000
GPR04: 0000000000000000 0000000000400000 00000ffbff241010 c0000000f31b8000
GPR08: 0000000000000000 0000000000100000 0000000000000000 c0000000012d4710
GPR12: 0000000084000422 c0000000012ff000 c000000000002774 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR24: 0000000000000000 0000000000000000 8000080080080000 c0000000ffff89a8
GPR28: c0000000f3576400 c0000000f3576410 0000000000400000 c0000000012ecc98
NIP [c0000000000192cc] ._memset_io+0x6c/0x9c
LR [c0000000005d0f9c] .fsl_qman_probe+0x198/0x928
Call Trace:
[c0000000f31bb688] [c0000000005d0f84] .fsl_qman_probe+0x180/0x928 (unreliable)
[c0000000f31bb728] [c0000000006432ec] .platform_drv_probe+0x60/0xb4
[c0000000f31bb7a8] [c00000000064083c] .really_probe+0x294/0x35c
[c0000000f31bb848] [c000000000640d2c] .__driver_attach+0x148/0x14c
[c0000000f31bb8d8] [c00000000063d7dc] .bus_for_each_dev+0xb0/0x118
[c0000000f31bb988] [c00000000063ff28] .driver_attach+0x34/0x4c
[c0000000f31bba08] [c00000000063f648] .bus_add_driver+0x174/0x2bc
[c0000000f31bbaa8] [c0000000006418bc] .driver_register+0x90/0x180
[c0000000f31bbb28] [c000000000643270] .__platform_driver_register+0x60/0x7c
[c0000000f31bbba8] [c000000000ee2a70] .fsl_qman_driver_init+0x24/0x38
[c0000000f31bbc18] [c0000000000023fc] .do_one_initcall+0x64/0x2b8
[c0000000f31bbcf8] [c000000000e9f480] .kernel_init_freeable+0x3a8/0x494
[c0000000f31bbda8] [c000000000002798] .kernel_init+0x24/0x148
[c0000000f31bbe28] [c0000000000009e8] .ret_from_kernel_thread+0x58/0x70
Instruction dump:
4e800020 2ba50003 40dd003c 3925fffc 5488402e 7929f082 7d082378 39290001
550a801e 7d2903a6 7d4a4378 794a0020 <91430000> 38630004 4200fff8 70a50003
Comparing a working vs broken kernel, it seems to boil down to the fact
that we're filtering out more PTE bits now that we use pte_pgprot() in
ioremap_prot().
With the old code we get:
ioremap_prot: addr 0xff800000 flags 0x241215
ioremap_prot: addr 0xff800000 flags 0x241215
map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241215
And now we get:
ioremap_prot: addr 0xff800000 flags 0x241215 pte 0x241215
ioremap_prot: addr 0xff800000 pte 0x241215
ioremap_prot: addr 0xff800000 prot 0x241014
map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241014
So we're losing 0x201, which for nohash book3e is:
#define _PAGE_PRESENT 0x000001 /* software: pte contains a translation */
#define _PAGE_PSIZE_4K 0x000200
I haven't worked out if it's one or both of those that matter.
The question is what's the right way to fix it? Should pte_pgprot() not
be filtering those bits out on book3e?
cheers
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code)
2018-10-17 0:59 ` Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code) Michael Ellerman
@ 2018-10-17 6:00 ` Christophe Leroy
2018-10-17 9:39 ` Aneesh Kumar K.V
2018-10-17 10:32 ` Michael Ellerman
0 siblings, 2 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-17 6:00 UTC (permalink / raw)
To: Michael Ellerman, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
On 10/17/2018 12:59 AM, Michael Ellerman wrote:
> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>
>> Get rid of platform specific _PAGE_XXXX in powerpc common code and
>> use helpers instead.
>>
>> mm/dump_linuxpagetables.c will be handled separately
>>
>> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>> ---
>> arch/powerpc/include/asm/book3s/32/pgtable.h | 9 +++------
>> arch/powerpc/include/asm/nohash/32/pgtable.h | 12 ++++++++----
>> arch/powerpc/include/asm/nohash/pgtable.h | 3 +--
>> arch/powerpc/mm/pgtable.c | 21 +++++++--------------
>> arch/powerpc/mm/pgtable_32.c | 15 ++++++++-------
>> arch/powerpc/mm/pgtable_64.c | 14 +++++++-------
>> arch/powerpc/xmon/xmon.c | 12 +++++++-----
>> 7 files changed, 41 insertions(+), 45 deletions(-)
>
> So turns out this patch *also* breaks my p5020ds :)
>
> Even with patch 4 merged, see next.
>
> It's the same crash:
>
> pcieport 2000:00:00.0: AER enabled with IRQ 480
> Unable to handle kernel paging request for data at address 0x8000080080080000
> Faulting instruction address: 0xc0000000000192cc
> Oops: Kernel access of bad area, sig: 11 [#1]
> BE SMP NR_CPUS=24 CoreNet Generic
> Modules linked in:
> CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc3-gcc7x-g98c847323b3a #1
> NIP: c0000000000192cc LR: c0000000005d0f9c CTR: 0000000000100000
> REGS: c0000000f31bb400 TRAP: 0300 Not tainted (4.19.0-rc3-gcc7x-g98c847323b3a)
> MSR: 0000000080029000 <CE,EE,ME> CR: 24000224 XER: 00000000
> DEAR: 8000080080080000 ESR: 0000000000800000 IRQMASK: 0
> GPR00: c0000000005d0f84 c0000000f31bb688 c00000000117dc00 8000080080080000
> GPR04: 0000000000000000 0000000000400000 00000ffbff241010 c0000000f31b8000
> GPR08: 0000000000000000 0000000000100000 0000000000000000 c0000000012d4710
> GPR12: 0000000084000422 c0000000012ff000 c000000000002774 0000000000000000
> GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> GPR24: 0000000000000000 0000000000000000 8000080080080000 c0000000ffff89a8
> GPR28: c0000000f3576400 c0000000f3576410 0000000000400000 c0000000012ecc98
> NIP [c0000000000192cc] ._memset_io+0x6c/0x9c
> LR [c0000000005d0f9c] .fsl_qman_probe+0x198/0x928
> Call Trace:
> [c0000000f31bb688] [c0000000005d0f84] .fsl_qman_probe+0x180/0x928 (unreliable)
> [c0000000f31bb728] [c0000000006432ec] .platform_drv_probe+0x60/0xb4
> [c0000000f31bb7a8] [c00000000064083c] .really_probe+0x294/0x35c
> [c0000000f31bb848] [c000000000640d2c] .__driver_attach+0x148/0x14c
> [c0000000f31bb8d8] [c00000000063d7dc] .bus_for_each_dev+0xb0/0x118
> [c0000000f31bb988] [c00000000063ff28] .driver_attach+0x34/0x4c
> [c0000000f31bba08] [c00000000063f648] .bus_add_driver+0x174/0x2bc
> [c0000000f31bbaa8] [c0000000006418bc] .driver_register+0x90/0x180
> [c0000000f31bbb28] [c000000000643270] .__platform_driver_register+0x60/0x7c
> [c0000000f31bbba8] [c000000000ee2a70] .fsl_qman_driver_init+0x24/0x38
> [c0000000f31bbc18] [c0000000000023fc] .do_one_initcall+0x64/0x2b8
> [c0000000f31bbcf8] [c000000000e9f480] .kernel_init_freeable+0x3a8/0x494
> [c0000000f31bbda8] [c000000000002798] .kernel_init+0x24/0x148
> [c0000000f31bbe28] [c0000000000009e8] .ret_from_kernel_thread+0x58/0x70
> Instruction dump:
> 4e800020 2ba50003 40dd003c 3925fffc 5488402e 7929f082 7d082378 39290001
> 550a801e 7d2903a6 7d4a4378 794a0020 <91430000> 38630004 4200fff8 70a50003
>
>
> Comparing a working vs broken kernel, it seems to boil down to the fact
> that we're filtering out more PTE bits now that we use pte_pgprot() in
> ioremap_prot().
>
> With the old code we get:
> ioremap_prot: addr 0xff800000 flags 0x241215
> ioremap_prot: addr 0xff800000 flags 0x241215
> map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241215
>
>
> And now we get:
> ioremap_prot: addr 0xff800000 flags 0x241215 pte 0x241215
> ioremap_prot: addr 0xff800000 pte 0x241215
> ioremap_prot: addr 0xff800000 prot 0x241014
> map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241014
>
> So we're losing 0x201, which for nohash book3e is:
>
> #define _PAGE_PRESENT 0x000001 /* software: pte contains a translation */
> #define _PAGE_PSIZE_4K 0x000200
>
>
> I haven't worked out if it's one or both of those that matter.
At least missing _PAGE_PRESENT is an issue I believe.
>
> The question is what's the right way to fix it? Should pte_pgprot() not
> be filtering those bits out on book3e?
I think we should not use pte_pggrot() for that then. What about the
below fix ?
Christophe
From: Christophe Leroy <christophe.leroy@c-s.fr>
Date: Wed, 17 Oct 2018 05:56:25 +0000
Subject: [PATCH] powerpc/mm: don't use pte_pgprot() in ioremap_prot()
pte_pgprot() filters out some required flags like _PAGE_PRESENT.
This patch replaces pte_pgprot() by __pgprot(pte_val())
in ioremap_prot()
Fixes: 26973fa5ac0e ("powerpc/mm: use pte helpers in generic code")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/mm/pgtable_32.c | 3 ++-
arch/powerpc/mm/pgtable_64.c | 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 5877f5aa8f5d..a606e2f4937b 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -122,7 +122,8 @@ ioremap_prot(phys_addr_t addr, unsigned long size,
unsigned long flags)
pte = pte_exprotect(pte);
pte = pte_mkprivileged(pte);
- return __ioremap_caller(addr, size, pte_pgprot(pte),
__builtin_return_address(0));
+ return __ioremap_caller(addr, size, __pgprot(pte_val(pte)),
+ __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_prot);
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index fb1375c07e8c..836bf436cabb 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -245,8 +245,8 @@ void __iomem * ioremap_prot(phys_addr_t addr,
unsigned long size,
pte = pte_mkprivileged(pte);
if (ppc_md.ioremap)
- return ppc_md.ioremap(addr, size, pte_pgprot(pte), caller);
- return __ioremap_caller(addr, size, pte_pgprot(pte), caller);
+ return ppc_md.ioremap(addr, size, __pgprot(pte_val(pte)), caller);
+ return __ioremap_caller(addr, size, __pgprot(pte_val(pte)), caller);
}
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code)
2018-10-17 6:00 ` Christophe Leroy
@ 2018-10-17 9:39 ` Aneesh Kumar K.V
2018-10-17 9:55 ` Christophe LEROY
2018-10-17 10:32 ` Michael Ellerman
1 sibling, 1 reply; 42+ messages in thread
From: Aneesh Kumar K.V @ 2018-10-17 9:39 UTC (permalink / raw)
To: Christophe Leroy, Michael Ellerman, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Christophe Leroy <christophe.leroy@c-s.fr> writes:
> On 10/17/2018 12:59 AM, Michael Ellerman wrote:
>> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>>
>>> Get rid of platform specific _PAGE_XXXX in powerpc common code and
>>> use helpers instead.
>>>
>>> mm/dump_linuxpagetables.c will be handled separately
>>>
>>> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>> ---
>>> arch/powerpc/include/asm/book3s/32/pgtable.h | 9 +++------
>>> arch/powerpc/include/asm/nohash/32/pgtable.h | 12 ++++++++----
>>> arch/powerpc/include/asm/nohash/pgtable.h | 3 +--
>>> arch/powerpc/mm/pgtable.c | 21 +++++++--------------
>>> arch/powerpc/mm/pgtable_32.c | 15 ++++++++-------
>>> arch/powerpc/mm/pgtable_64.c | 14 +++++++-------
>>> arch/powerpc/xmon/xmon.c | 12 +++++++-----
>>> 7 files changed, 41 insertions(+), 45 deletions(-)
>>
>> So turns out this patch *also* breaks my p5020ds :)
>>
>> Even with patch 4 merged, see next.
>>
>> It's the same crash:
>>
>> pcieport 2000:00:00.0: AER enabled with IRQ 480
>> Unable to handle kernel paging request for data at address 0x8000080080080000
>> Faulting instruction address: 0xc0000000000192cc
>> Oops: Kernel access of bad area, sig: 11 [#1]
>> BE SMP NR_CPUS=24 CoreNet Generic
>> Modules linked in:
>> CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc3-gcc7x-g98c847323b3a #1
>> NIP: c0000000000192cc LR: c0000000005d0f9c CTR: 0000000000100000
>> REGS: c0000000f31bb400 TRAP: 0300 Not tainted (4.19.0-rc3-gcc7x-g98c847323b3a)
>> MSR: 0000000080029000 <CE,EE,ME> CR: 24000224 XER: 00000000
>> DEAR: 8000080080080000 ESR: 0000000000800000 IRQMASK: 0
>> GPR00: c0000000005d0f84 c0000000f31bb688 c00000000117dc00 8000080080080000
>> GPR04: 0000000000000000 0000000000400000 00000ffbff241010 c0000000f31b8000
>> GPR08: 0000000000000000 0000000000100000 0000000000000000 c0000000012d4710
>> GPR12: 0000000084000422 c0000000012ff000 c000000000002774 0000000000000000
>> GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
>> GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
>> GPR24: 0000000000000000 0000000000000000 8000080080080000 c0000000ffff89a8
>> GPR28: c0000000f3576400 c0000000f3576410 0000000000400000 c0000000012ecc98
>> NIP [c0000000000192cc] ._memset_io+0x6c/0x9c
>> LR [c0000000005d0f9c] .fsl_qman_probe+0x198/0x928
>> Call Trace:
>> [c0000000f31bb688] [c0000000005d0f84] .fsl_qman_probe+0x180/0x928 (unreliable)
>> [c0000000f31bb728] [c0000000006432ec] .platform_drv_probe+0x60/0xb4
>> [c0000000f31bb7a8] [c00000000064083c] .really_probe+0x294/0x35c
>> [c0000000f31bb848] [c000000000640d2c] .__driver_attach+0x148/0x14c
>> [c0000000f31bb8d8] [c00000000063d7dc] .bus_for_each_dev+0xb0/0x118
>> [c0000000f31bb988] [c00000000063ff28] .driver_attach+0x34/0x4c
>> [c0000000f31bba08] [c00000000063f648] .bus_add_driver+0x174/0x2bc
>> [c0000000f31bbaa8] [c0000000006418bc] .driver_register+0x90/0x180
>> [c0000000f31bbb28] [c000000000643270] .__platform_driver_register+0x60/0x7c
>> [c0000000f31bbba8] [c000000000ee2a70] .fsl_qman_driver_init+0x24/0x38
>> [c0000000f31bbc18] [c0000000000023fc] .do_one_initcall+0x64/0x2b8
>> [c0000000f31bbcf8] [c000000000e9f480] .kernel_init_freeable+0x3a8/0x494
>> [c0000000f31bbda8] [c000000000002798] .kernel_init+0x24/0x148
>> [c0000000f31bbe28] [c0000000000009e8] .ret_from_kernel_thread+0x58/0x70
>> Instruction dump:
>> 4e800020 2ba50003 40dd003c 3925fffc 5488402e 7929f082 7d082378 39290001
>> 550a801e 7d2903a6 7d4a4378 794a0020 <91430000> 38630004 4200fff8 70a50003
>>
>>
>> Comparing a working vs broken kernel, it seems to boil down to the fact
>> that we're filtering out more PTE bits now that we use pte_pgprot() in
>> ioremap_prot().
>>
>> With the old code we get:
>> ioremap_prot: addr 0xff800000 flags 0x241215
>> ioremap_prot: addr 0xff800000 flags 0x241215
>> map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241215
>>
>>
>> And now we get:
>> ioremap_prot: addr 0xff800000 flags 0x241215 pte 0x241215
>> ioremap_prot: addr 0xff800000 pte 0x241215
>> ioremap_prot: addr 0xff800000 prot 0x241014
>> map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241014
>>
>> So we're losing 0x201, which for nohash book3e is:
>>
>> #define _PAGE_PRESENT 0x000001 /* software: pte contains a translation */
>> #define _PAGE_PSIZE_4K 0x000200
>>
>>
>> I haven't worked out if it's one or both of those that matter.
>
> At least missing _PAGE_PRESENT is an issue I believe.
>>
>> The question is what's the right way to fix it? Should pte_pgprot() not
>> be filtering those bits out on book3e?
>
> I think we should not use pte_pggrot() for that then. What about the
> below fix ?
>
> Christophe
>
> From: Christophe Leroy <christophe.leroy@c-s.fr>
> Date: Wed, 17 Oct 2018 05:56:25 +0000
> Subject: [PATCH] powerpc/mm: don't use pte_pgprot() in ioremap_prot()
>
> pte_pgprot() filters out some required flags like _PAGE_PRESENT.
>
> This patch replaces pte_pgprot() by __pgprot(pte_val())
> in ioremap_prot()
>
> Fixes: 26973fa5ac0e ("powerpc/mm: use pte helpers in generic code")
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> ---
> arch/powerpc/mm/pgtable_32.c | 3 ++-
> arch/powerpc/mm/pgtable_64.c | 4 ++--
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
> index 5877f5aa8f5d..a606e2f4937b 100644
> --- a/arch/powerpc/mm/pgtable_32.c
> +++ b/arch/powerpc/mm/pgtable_32.c
> @@ -122,7 +122,8 @@ ioremap_prot(phys_addr_t addr, unsigned long size,
> unsigned long flags)
> pte = pte_exprotect(pte);
> pte = pte_mkprivileged(pte);
>
> - return __ioremap_caller(addr, size, pte_pgprot(pte),
> __builtin_return_address(0));
> + return __ioremap_caller(addr, size, __pgprot(pte_val(pte)),
> + __builtin_return_address(0));
That means we pass the pfn bits also to __ioremap_caller right? How about
From b4d5e0f24f8482375b2dd86afaced26ebf716600 Mon Sep 17 00:00:00 2001
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
Date: Wed, 17 Oct 2018 14:07:50 +0530
Subject: [PATCH] powerpc/mm: Make pte_pgprot return all pte bits
Other archs do the same and instead of adding required pte bits (which got
masked out) in __ioremap_at, make sure we filter only pfn bits out.
Fixes: 26973fa5ac0e ("powerpc/mm: use pte helpers in generic code")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 6 ------
arch/powerpc/include/asm/book3s/64/pgtable.h | 8 --------
arch/powerpc/include/asm/nohash/32/pte-40x.h | 5 -----
arch/powerpc/include/asm/nohash/32/pte-44x.h | 5 -----
arch/powerpc/include/asm/nohash/32/pte-8xx.h | 5 -----
arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h | 5 -----
arch/powerpc/include/asm/nohash/pgtable.h | 1 -
arch/powerpc/include/asm/nohash/pte-book3e.h | 5 -----
arch/powerpc/include/asm/pgtable.h | 10 ++++++++++
9 files changed, 10 insertions(+), 40 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index 0fbd4c642b51..e61dd3ae5bc0 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -48,11 +48,6 @@ static inline bool pte_user(pte_t pte)
#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HASHPTE | _PAGE_DIRTY | \
_PAGE_ACCESSED | _PAGE_SPECIAL)
-/* Mask of bits returned by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
- _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
- _PAGE_RW | _PAGE_DIRTY)
-
/*
* We define 2 sets of base prot bits, one for basic pages (ie,
* cacheable kernel and user pages) and one for non cacheable
@@ -396,7 +391,6 @@ static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSE
static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); }
static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
static inline bool pte_exec(pte_t pte) { return true; }
-static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
static inline int pte_present(pte_t pte)
{
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index c34a161dc651..cb5dd4078d42 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -128,13 +128,6 @@
#define H_PTE_PKEY (H_PTE_PKEY_BIT0 | H_PTE_PKEY_BIT1 | H_PTE_PKEY_BIT2 | \
H_PTE_PKEY_BIT3 | H_PTE_PKEY_BIT4)
-/*
- * Mask of bits returned by pte_pgprot()
- */
-#define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
- H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
- _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
- _PAGE_SOFT_DIRTY | H_PTE_PKEY)
/*
* We define 2 sets of base prot bits, one for basic pages (ie,
* cacheable kernel and user pages) and one for non cacheable
@@ -496,7 +489,6 @@ static inline bool pte_exec(pte_t pte)
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_EXEC));
}
-static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
static inline bool pte_soft_dirty(pte_t pte)
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h
index 7a8b3c94592f..661f4599f2fc 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-40x.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h
@@ -73,11 +73,6 @@
/* Until my rework is finished, 40x still needs atomic PTE updates */
#define PTE_ATOMIC_UPDATES 1
-/* Mask of bits returned by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
- _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
- _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
-
#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
#define _PAGE_BASE (_PAGE_BASE_NC)
diff --git a/arch/powerpc/include/asm/nohash/32/pte-44x.h b/arch/powerpc/include/asm/nohash/32/pte-44x.h
index 8d6b268a986f..78bc304f750e 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-44x.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-44x.h
@@ -93,11 +93,6 @@
#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
-/* Mask of bits returned by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
- _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
- _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
-
/* TODO: Add large page lowmem mapping support */
#define _PMD_PRESENT 0
#define _PMD_PRESENT_MASK (PAGE_MASK)
diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
index 1c57efac089d..6bfe041ef59d 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
@@ -55,11 +55,6 @@
#define _PAGE_KERNEL_RW (_PAGE_SH | _PAGE_DIRTY)
#define _PAGE_KERNEL_RWX (_PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
-/* Mask of bits returned by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
- _PAGE_ACCESSED | _PAGE_RO | _PAGE_NA | \
- _PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
-
#define _PMD_PRESENT 0x0001
#define _PMD_PRESENT_MASK _PMD_PRESENT
#define _PMD_BAD 0x0fd0
diff --git a/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h b/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
index 1ecf60fe0909..0fc1bd42bb3e 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
@@ -39,11 +39,6 @@
/* No page size encoding in the linux PTE */
#define _PAGE_PSIZE 0
-/* Mask of bits returned by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
- _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
- _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
-
#define _PMD_PRESENT 0
#define _PMD_PRESENT_MASK (PAGE_MASK)
#define _PMD_BAD (~PAGE_MASK)
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index 04e9f0922ad4..70ff23974b59 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -52,7 +52,6 @@ static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK)
static inline bool pte_hashpte(pte_t pte) { return false; }
static inline bool pte_ci(pte_t pte) { return pte_val(pte) & _PAGE_NO_CACHE; }
static inline bool pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; }
-static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
#ifdef CONFIG_NUMA_BALANCING
/*
diff --git a/arch/powerpc/include/asm/nohash/pte-book3e.h b/arch/powerpc/include/asm/nohash/pte-book3e.h
index 58eef8cb569d..f95ab6eaf441 100644
--- a/arch/powerpc/include/asm/nohash/pte-book3e.h
+++ b/arch/powerpc/include/asm/nohash/pte-book3e.h
@@ -82,11 +82,6 @@
#define _PTE_NONE_MASK 0
#endif
-/* Mask of bits returned by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
- _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
- _PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
-
/*
* We define 2 sets of base prot bits, one for basic pages (ie,
* cacheable kernel and user pages) and one for non cacheable
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index fb4b85bba110..9679b7519a35 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -46,6 +46,16 @@ struct mm_struct;
/* Keep these as a macros to avoid include dependency mess */
#define pte_page(x) pfn_to_page(pte_pfn(x))
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
+/*
+ * Select all bits except the pfn
+ */
+static inline pgprot_t pte_pgprot(pte_t pte)
+{
+ unsigned long pte_flags;
+
+ pte_flags = pte_val(pte) & ~PTE_RPN_MASK;
+ return __pgprot(pte_flags);
+}
/*
* ZERO_PAGE is a global shared page that is always zero: used
--
2.17.2
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code)
2018-10-17 9:39 ` Aneesh Kumar K.V
@ 2018-10-17 9:55 ` Christophe LEROY
0 siblings, 0 replies; 42+ messages in thread
From: Christophe LEROY @ 2018-10-17 9:55 UTC (permalink / raw)
To: Aneesh Kumar K.V, Michael Ellerman, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Le 17/10/2018 à 11:39, Aneesh Kumar K.V a écrit :
> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>
>> On 10/17/2018 12:59 AM, Michael Ellerman wrote:
>>> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>>>
>>>> Get rid of platform specific _PAGE_XXXX in powerpc common code and
>>>> use helpers instead.
>>>>
>>>> mm/dump_linuxpagetables.c will be handled separately
>>>>
>>>> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
>>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>>> ---
>>>> arch/powerpc/include/asm/book3s/32/pgtable.h | 9 +++------
>>>> arch/powerpc/include/asm/nohash/32/pgtable.h | 12 ++++++++----
>>>> arch/powerpc/include/asm/nohash/pgtable.h | 3 +--
>>>> arch/powerpc/mm/pgtable.c | 21 +++++++--------------
>>>> arch/powerpc/mm/pgtable_32.c | 15 ++++++++-------
>>>> arch/powerpc/mm/pgtable_64.c | 14 +++++++-------
>>>> arch/powerpc/xmon/xmon.c | 12 +++++++-----
>>>> 7 files changed, 41 insertions(+), 45 deletions(-)
>>>
>>> So turns out this patch *also* breaks my p5020ds :)
>>>
>>> Even with patch 4 merged, see next.
>>>
>>> It's the same crash:
>>>
>>> pcieport 2000:00:00.0: AER enabled with IRQ 480
>>> Unable to handle kernel paging request for data at address 0x8000080080080000
>>> Faulting instruction address: 0xc0000000000192cc
>>> Oops: Kernel access of bad area, sig: 11 [#1]
>>> BE SMP NR_CPUS=24 CoreNet Generic
>>> Modules linked in:
>>> CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc3-gcc7x-g98c847323b3a #1
>>> NIP: c0000000000192cc LR: c0000000005d0f9c CTR: 0000000000100000
>>> REGS: c0000000f31bb400 TRAP: 0300 Not tainted (4.19.0-rc3-gcc7x-g98c847323b3a)
>>> MSR: 0000000080029000 <CE,EE,ME> CR: 24000224 XER: 00000000
>>> DEAR: 8000080080080000 ESR: 0000000000800000 IRQMASK: 0
>>> GPR00: c0000000005d0f84 c0000000f31bb688 c00000000117dc00 8000080080080000
>>> GPR04: 0000000000000000 0000000000400000 00000ffbff241010 c0000000f31b8000
>>> GPR08: 0000000000000000 0000000000100000 0000000000000000 c0000000012d4710
>>> GPR12: 0000000084000422 c0000000012ff000 c000000000002774 0000000000000000
>>> GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
>>> GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
>>> GPR24: 0000000000000000 0000000000000000 8000080080080000 c0000000ffff89a8
>>> GPR28: c0000000f3576400 c0000000f3576410 0000000000400000 c0000000012ecc98
>>> NIP [c0000000000192cc] ._memset_io+0x6c/0x9c
>>> LR [c0000000005d0f9c] .fsl_qman_probe+0x198/0x928
>>> Call Trace:
>>> [c0000000f31bb688] [c0000000005d0f84] .fsl_qman_probe+0x180/0x928 (unreliable)
>>> [c0000000f31bb728] [c0000000006432ec] .platform_drv_probe+0x60/0xb4
>>> [c0000000f31bb7a8] [c00000000064083c] .really_probe+0x294/0x35c
>>> [c0000000f31bb848] [c000000000640d2c] .__driver_attach+0x148/0x14c
>>> [c0000000f31bb8d8] [c00000000063d7dc] .bus_for_each_dev+0xb0/0x118
>>> [c0000000f31bb988] [c00000000063ff28] .driver_attach+0x34/0x4c
>>> [c0000000f31bba08] [c00000000063f648] .bus_add_driver+0x174/0x2bc
>>> [c0000000f31bbaa8] [c0000000006418bc] .driver_register+0x90/0x180
>>> [c0000000f31bbb28] [c000000000643270] .__platform_driver_register+0x60/0x7c
>>> [c0000000f31bbba8] [c000000000ee2a70] .fsl_qman_driver_init+0x24/0x38
>>> [c0000000f31bbc18] [c0000000000023fc] .do_one_initcall+0x64/0x2b8
>>> [c0000000f31bbcf8] [c000000000e9f480] .kernel_init_freeable+0x3a8/0x494
>>> [c0000000f31bbda8] [c000000000002798] .kernel_init+0x24/0x148
>>> [c0000000f31bbe28] [c0000000000009e8] .ret_from_kernel_thread+0x58/0x70
>>> Instruction dump:
>>> 4e800020 2ba50003 40dd003c 3925fffc 5488402e 7929f082 7d082378 39290001
>>> 550a801e 7d2903a6 7d4a4378 794a0020 <91430000> 38630004 4200fff8 70a50003
>>>
>>>
>>> Comparing a working vs broken kernel, it seems to boil down to the fact
>>> that we're filtering out more PTE bits now that we use pte_pgprot() in
>>> ioremap_prot().
>>>
>>> With the old code we get:
>>> ioremap_prot: addr 0xff800000 flags 0x241215
>>> ioremap_prot: addr 0xff800000 flags 0x241215
>>> map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241215
>>>
>>>
>>> And now we get:
>>> ioremap_prot: addr 0xff800000 flags 0x241215 pte 0x241215
>>> ioremap_prot: addr 0xff800000 pte 0x241215
>>> ioremap_prot: addr 0xff800000 prot 0x241014
>>> map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241014
>>>
>>> So we're losing 0x201, which for nohash book3e is:
>>>
>>> #define _PAGE_PRESENT 0x000001 /* software: pte contains a translation */
>>> #define _PAGE_PSIZE_4K 0x000200
>>>
>>>
>>> I haven't worked out if it's one or both of those that matter.
>>
>> At least missing _PAGE_PRESENT is an issue I believe.
>>>
>>> The question is what's the right way to fix it? Should pte_pgprot() not
>>> be filtering those bits out on book3e?
>>
>> I think we should not use pte_pggrot() for that then. What about the
>> below fix ?
>>
>> Christophe
>>
>> From: Christophe Leroy <christophe.leroy@c-s.fr>
>> Date: Wed, 17 Oct 2018 05:56:25 +0000
>> Subject: [PATCH] powerpc/mm: don't use pte_pgprot() in ioremap_prot()
>>
>> pte_pgprot() filters out some required flags like _PAGE_PRESENT.
>>
>> This patch replaces pte_pgprot() by __pgprot(pte_val())
>> in ioremap_prot()
>>
>> Fixes: 26973fa5ac0e ("powerpc/mm: use pte helpers in generic code")
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>> ---
>> arch/powerpc/mm/pgtable_32.c | 3 ++-
>> arch/powerpc/mm/pgtable_64.c | 4 ++--
>> 2 files changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
>> index 5877f5aa8f5d..a606e2f4937b 100644
>> --- a/arch/powerpc/mm/pgtable_32.c
>> +++ b/arch/powerpc/mm/pgtable_32.c
>> @@ -122,7 +122,8 @@ ioremap_prot(phys_addr_t addr, unsigned long size,
>> unsigned long flags)
>> pte = pte_exprotect(pte);
>> pte = pte_mkprivileged(pte);
>>
>> - return __ioremap_caller(addr, size, pte_pgprot(pte),
>> __builtin_return_address(0));
>> + return __ioremap_caller(addr, size, __pgprot(pte_val(pte)),
>> + __builtin_return_address(0));
>
>
> That means we pass the pfn bits also to __ioremap_caller right? How about
>
> From b4d5e0f24f8482375b2dd86afaced26ebf716600 Mon Sep 17 00:00:00 2001
> From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
> Date: Wed, 17 Oct 2018 14:07:50 +0530
> Subject: [PATCH] powerpc/mm: Make pte_pgprot return all pte bits
>
> Other archs do the same and instead of adding required pte bits (which got
> masked out) in __ioremap_at, make sure we filter only pfn bits out.
>
> Fixes: 26973fa5ac0e ("powerpc/mm: use pte helpers in generic code")
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Looks good for me.
Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr>
> ---
> arch/powerpc/include/asm/book3s/32/pgtable.h | 6 ------
> arch/powerpc/include/asm/book3s/64/pgtable.h | 8 --------
> arch/powerpc/include/asm/nohash/32/pte-40x.h | 5 -----
> arch/powerpc/include/asm/nohash/32/pte-44x.h | 5 -----
> arch/powerpc/include/asm/nohash/32/pte-8xx.h | 5 -----
> arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h | 5 -----
> arch/powerpc/include/asm/nohash/pgtable.h | 1 -
> arch/powerpc/include/asm/nohash/pte-book3e.h | 5 -----
> arch/powerpc/include/asm/pgtable.h | 10 ++++++++++
> 9 files changed, 10 insertions(+), 40 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
> index 0fbd4c642b51..e61dd3ae5bc0 100644
> --- a/arch/powerpc/include/asm/book3s/32/pgtable.h
> +++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
> @@ -48,11 +48,6 @@ static inline bool pte_user(pte_t pte)
> #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HASHPTE | _PAGE_DIRTY | \
> _PAGE_ACCESSED | _PAGE_SPECIAL)
>
> -/* Mask of bits returned by pte_pgprot() */
> -#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
> - _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
> - _PAGE_RW | _PAGE_DIRTY)
> -
> /*
> * We define 2 sets of base prot bits, one for basic pages (ie,
> * cacheable kernel and user pages) and one for non cacheable
> @@ -396,7 +391,6 @@ static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSE
> static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); }
> static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
> static inline bool pte_exec(pte_t pte) { return true; }
> -static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
>
> static inline int pte_present(pte_t pte)
> {
> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
> index c34a161dc651..cb5dd4078d42 100644
> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h
> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
> @@ -128,13 +128,6 @@
>
> #define H_PTE_PKEY (H_PTE_PKEY_BIT0 | H_PTE_PKEY_BIT1 | H_PTE_PKEY_BIT2 | \
> H_PTE_PKEY_BIT3 | H_PTE_PKEY_BIT4)
> -/*
> - * Mask of bits returned by pte_pgprot()
> - */
> -#define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
> - H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
> - _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
> - _PAGE_SOFT_DIRTY | H_PTE_PKEY)
> /*
> * We define 2 sets of base prot bits, one for basic pages (ie,
> * cacheable kernel and user pages) and one for non cacheable
> @@ -496,7 +489,6 @@ static inline bool pte_exec(pte_t pte)
> return !!(pte_raw(pte) & cpu_to_be64(_PAGE_EXEC));
> }
>
> -static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
>
> #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
> static inline bool pte_soft_dirty(pte_t pte)
> diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h
> index 7a8b3c94592f..661f4599f2fc 100644
> --- a/arch/powerpc/include/asm/nohash/32/pte-40x.h
> +++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h
> @@ -73,11 +73,6 @@
> /* Until my rework is finished, 40x still needs atomic PTE updates */
> #define PTE_ATOMIC_UPDATES 1
>
> -/* Mask of bits returned by pte_pgprot() */
> -#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
> - _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
> - _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
> -
> #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
> #define _PAGE_BASE (_PAGE_BASE_NC)
>
> diff --git a/arch/powerpc/include/asm/nohash/32/pte-44x.h b/arch/powerpc/include/asm/nohash/32/pte-44x.h
> index 8d6b268a986f..78bc304f750e 100644
> --- a/arch/powerpc/include/asm/nohash/32/pte-44x.h
> +++ b/arch/powerpc/include/asm/nohash/32/pte-44x.h
> @@ -93,11 +93,6 @@
> #define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
> #define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
>
> -/* Mask of bits returned by pte_pgprot() */
> -#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
> - _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
> - _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
> -
> /* TODO: Add large page lowmem mapping support */
> #define _PMD_PRESENT 0
> #define _PMD_PRESENT_MASK (PAGE_MASK)
> diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
> index 1c57efac089d..6bfe041ef59d 100644
> --- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
> +++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
> @@ -55,11 +55,6 @@
> #define _PAGE_KERNEL_RW (_PAGE_SH | _PAGE_DIRTY)
> #define _PAGE_KERNEL_RWX (_PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
>
> -/* Mask of bits returned by pte_pgprot() */
> -#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
> - _PAGE_ACCESSED | _PAGE_RO | _PAGE_NA | \
> - _PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
> -
> #define _PMD_PRESENT 0x0001
> #define _PMD_PRESENT_MASK _PMD_PRESENT
> #define _PMD_BAD 0x0fd0
> diff --git a/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h b/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
> index 1ecf60fe0909..0fc1bd42bb3e 100644
> --- a/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
> +++ b/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
> @@ -39,11 +39,6 @@
> /* No page size encoding in the linux PTE */
> #define _PAGE_PSIZE 0
>
> -/* Mask of bits returned by pte_pgprot() */
> -#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
> - _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
> - _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
> -
> #define _PMD_PRESENT 0
> #define _PMD_PRESENT_MASK (PAGE_MASK)
> #define _PMD_BAD (~PAGE_MASK)
> diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
> index 04e9f0922ad4..70ff23974b59 100644
> --- a/arch/powerpc/include/asm/nohash/pgtable.h
> +++ b/arch/powerpc/include/asm/nohash/pgtable.h
> @@ -52,7 +52,6 @@ static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK)
> static inline bool pte_hashpte(pte_t pte) { return false; }
> static inline bool pte_ci(pte_t pte) { return pte_val(pte) & _PAGE_NO_CACHE; }
> static inline bool pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; }
> -static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
>
> #ifdef CONFIG_NUMA_BALANCING
> /*
> diff --git a/arch/powerpc/include/asm/nohash/pte-book3e.h b/arch/powerpc/include/asm/nohash/pte-book3e.h
> index 58eef8cb569d..f95ab6eaf441 100644
> --- a/arch/powerpc/include/asm/nohash/pte-book3e.h
> +++ b/arch/powerpc/include/asm/nohash/pte-book3e.h
> @@ -82,11 +82,6 @@
> #define _PTE_NONE_MASK 0
> #endif
>
> -/* Mask of bits returned by pte_pgprot() */
> -#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
> - _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
> - _PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
> -
> /*
> * We define 2 sets of base prot bits, one for basic pages (ie,
> * cacheable kernel and user pages) and one for non cacheable
> diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
> index fb4b85bba110..9679b7519a35 100644
> --- a/arch/powerpc/include/asm/pgtable.h
> +++ b/arch/powerpc/include/asm/pgtable.h
> @@ -46,6 +46,16 @@ struct mm_struct;
> /* Keep these as a macros to avoid include dependency mess */
> #define pte_page(x) pfn_to_page(pte_pfn(x))
> #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
> +/*
> + * Select all bits except the pfn
> + */
> +static inline pgprot_t pte_pgprot(pte_t pte)
> +{
> + unsigned long pte_flags;
> +
> + pte_flags = pte_val(pte) & ~PTE_RPN_MASK;
> + return __pgprot(pte_flags);
> +}
>
> /*
> * ZERO_PAGE is a global shared page that is always zero: used
>
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code)
2018-10-17 6:00 ` Christophe Leroy
2018-10-17 9:39 ` Aneesh Kumar K.V
@ 2018-10-17 10:32 ` Michael Ellerman
2018-10-17 11:12 ` Christophe Leroy
1 sibling, 1 reply; 42+ messages in thread
From: Michael Ellerman @ 2018-10-17 10:32 UTC (permalink / raw)
To: Christophe Leroy, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Christophe Leroy <christophe.leroy@c-s.fr> writes:
> On 10/17/2018 12:59 AM, Michael Ellerman wrote:
...
>> The question is what's the right way to fix it? Should pte_pgprot() not
>> be filtering those bits out on book3e?
>
> I think we should not use pte_pggrot() for that then. What about the
> below fix ?
Thanks, that almost works.
pte_mkprivileged() also needs to not strip _PAGE_BAP_SR.
But there's also a use of pte_pgprot() in mm/memory.c, and I think that
is also broken now that we don't add PAGE_KERNEL back in.
Aneesh is going to do a patch to make pte_pgprot() only mask the PFN
which is what other arches do.
cheers
> From: Christophe Leroy <christophe.leroy@c-s.fr>
> Date: Wed, 17 Oct 2018 05:56:25 +0000
> Subject: [PATCH] powerpc/mm: don't use pte_pgprot() in ioremap_prot()
>
> pte_pgprot() filters out some required flags like _PAGE_PRESENT.
>
> This patch replaces pte_pgprot() by __pgprot(pte_val())
> in ioremap_prot()
>
> Fixes: 26973fa5ac0e ("powerpc/mm: use pte helpers in generic code")
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> ---
> arch/powerpc/mm/pgtable_32.c | 3 ++-
> arch/powerpc/mm/pgtable_64.c | 4 ++--
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
> index 5877f5aa8f5d..a606e2f4937b 100644
> --- a/arch/powerpc/mm/pgtable_32.c
> +++ b/arch/powerpc/mm/pgtable_32.c
> @@ -122,7 +122,8 @@ ioremap_prot(phys_addr_t addr, unsigned long size,
> unsigned long flags)
> pte = pte_exprotect(pte);
> pte = pte_mkprivileged(pte);
>
> - return __ioremap_caller(addr, size, pte_pgprot(pte),
> __builtin_return_address(0));
> + return __ioremap_caller(addr, size, __pgprot(pte_val(pte)),
> + __builtin_return_address(0));
> }
> EXPORT_SYMBOL(ioremap_prot);
>
> diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
> index fb1375c07e8c..836bf436cabb 100644
> --- a/arch/powerpc/mm/pgtable_64.c
> +++ b/arch/powerpc/mm/pgtable_64.c
> @@ -245,8 +245,8 @@ void __iomem * ioremap_prot(phys_addr_t addr,
> unsigned long size,
> pte = pte_mkprivileged(pte);
>
> if (ppc_md.ioremap)
> - return ppc_md.ioremap(addr, size, pte_pgprot(pte), caller);
> - return __ioremap_caller(addr, size, pte_pgprot(pte), caller);
> + return ppc_md.ioremap(addr, size, __pgprot(pte_val(pte)), caller);
> + return __ioremap_caller(addr, size, __pgprot(pte_val(pte)), caller);
> }
>
>
> --
> 2.13.3
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code)
2018-10-17 10:32 ` Michael Ellerman
@ 2018-10-17 11:12 ` Christophe Leroy
2018-10-17 11:53 ` Aneesh Kumar K.V
0 siblings, 1 reply; 42+ messages in thread
From: Christophe Leroy @ 2018-10-17 11:12 UTC (permalink / raw)
To: Michael Ellerman, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
On 10/17/2018 10:32 AM, Michael Ellerman wrote:
> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>> On 10/17/2018 12:59 AM, Michael Ellerman wrote:
> ...
>>> The question is what's the right way to fix it? Should pte_pgprot() not
>>> be filtering those bits out on book3e?
>>
>> I think we should not use pte_pggrot() for that then. What about the
>> below fix ?
>
> Thanks, that almost works.
>
> pte_mkprivileged() also needs to not strip _PAGE_BAP_SR.
Oops, I missed it allthough I knew it. Patch below.
From: Christophe Leroy <christophe.leroy@c-s.fr>
Date: Wed, 17 Oct 2018 10:46:24 +0000
Subject: [PATCH] powerpc/book3e: redefine pte_mkprivileged() and
pte_mkuser()
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>, Paul Mackerras
<paulus@samba.org>, Michael Ellerman <mpe@ellerman.id.au>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Book3e defines both _PAGE_USER and _PAGE_PRIVILEGED, so the nohash
default pte_mkprivileged() and pte_mkuser() are not usable.
This patch redefines them for book3e.
Fixes: a0da4bc166f2 ("powerpc/mm: Allow platforms to redefine some helpers")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/pte-book3e.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/include/asm/nohash/pte-book3e.h
b/arch/powerpc/include/asm/nohash/pte-book3e.h
index 58eef8cb569d..fb4297dff3e2 100644
--- a/arch/powerpc/include/asm/nohash/pte-book3e.h
+++ b/arch/powerpc/include/asm/nohash/pte-book3e.h
@@ -109,5 +109,19 @@
#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+static inline pte_t pte_mkprivileged(pte_t pte)
+{
+ return __pte((pte_val(pte) & ~_PAGE_USER) | _PAGE_PRIVILEGED);
+}
+
+#define pte_mkprivileged pte_mkprivileged
+
+static inline pte_t pte_mkuser(pte_t pte)
+{
+ return __pte((pte_val(pte) & ~_PAGE_PRIVILEGED) | _PAGE_USER);
+}
+
+#define pte_mkuser pte_mkuser
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NOHASH_PTE_BOOK3E_H */
--
2.13.3
>
>
> But there's also a use of pte_pgprot() in mm/memory.c, and I think that
> is also broken now that we don't add PAGE_KERNEL back in.
>
> Aneesh is going to do a patch to make pte_pgprot() only mask the PFN
> which is what other arches do.
Yes I saw it, that's ok for me.
Christophe
>
> cheers
>
>> From: Christophe Leroy <christophe.leroy@c-s.fr>
>> Date: Wed, 17 Oct 2018 05:56:25 +0000
>> Subject: [PATCH] powerpc/mm: don't use pte_pgprot() in ioremap_prot()
>>
>> pte_pgprot() filters out some required flags like _PAGE_PRESENT.
>>
>> This patch replaces pte_pgprot() by __pgprot(pte_val())
>> in ioremap_prot()
>>
>> Fixes: 26973fa5ac0e ("powerpc/mm: use pte helpers in generic code")
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>> ---
>> arch/powerpc/mm/pgtable_32.c | 3 ++-
>> arch/powerpc/mm/pgtable_64.c | 4 ++--
>> 2 files changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
>> index 5877f5aa8f5d..a606e2f4937b 100644
>> --- a/arch/powerpc/mm/pgtable_32.c
>> +++ b/arch/powerpc/mm/pgtable_32.c
>> @@ -122,7 +122,8 @@ ioremap_prot(phys_addr_t addr, unsigned long size,
>> unsigned long flags)
>> pte = pte_exprotect(pte);
>> pte = pte_mkprivileged(pte);
>>
>> - return __ioremap_caller(addr, size, pte_pgprot(pte),
>> __builtin_return_address(0));
>> + return __ioremap_caller(addr, size, __pgprot(pte_val(pte)),
>> + __builtin_return_address(0));
>> }
>> EXPORT_SYMBOL(ioremap_prot);
>>
>> diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
>> index fb1375c07e8c..836bf436cabb 100644
>> --- a/arch/powerpc/mm/pgtable_64.c
>> +++ b/arch/powerpc/mm/pgtable_64.c
>> @@ -245,8 +245,8 @@ void __iomem * ioremap_prot(phys_addr_t addr,
>> unsigned long size,
>> pte = pte_mkprivileged(pte);
>>
>> if (ppc_md.ioremap)
>> - return ppc_md.ioremap(addr, size, pte_pgprot(pte), caller);
>> - return __ioremap_caller(addr, size, pte_pgprot(pte), caller);
>> + return ppc_md.ioremap(addr, size, __pgprot(pte_val(pte)), caller);
>> + return __ioremap_caller(addr, size, __pgprot(pte_val(pte)), caller);
>> }
>>
>>
>> --
>> 2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code)
2018-10-17 11:12 ` Christophe Leroy
@ 2018-10-17 11:53 ` Aneesh Kumar K.V
0 siblings, 0 replies; 42+ messages in thread
From: Aneesh Kumar K.V @ 2018-10-17 11:53 UTC (permalink / raw)
To: Christophe Leroy, Michael Ellerman, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
On 10/17/18 4:42 PM, Christophe Leroy wrote:
>
>
> On 10/17/2018 10:32 AM, Michael Ellerman wrote:
>> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>>> On 10/17/2018 12:59 AM, Michael Ellerman wrote:
>> ...
>>>> The question is what's the right way to fix it? Should pte_pgprot() not
>>>> be filtering those bits out on book3e?
>>>
>>> I think we should not use pte_pggrot() for that then. What about the
>>> below fix ?
>>
>> Thanks, that almost works.
>>
>> pte_mkprivileged() also needs to not strip _PAGE_BAP_SR.
>
> Oops, I missed it allthough I knew it. Patch below.
>
> From: Christophe Leroy <christophe.leroy@c-s.fr>
> Date: Wed, 17 Oct 2018 10:46:24 +0000
> Subject: [PATCH] powerpc/book3e: redefine pte_mkprivileged() and
> pte_mkuser()
> To: Benjamin Herrenschmidt <benh@kernel.crashing.org>, Paul Mackerras
> <paulus@samba.org>, Michael Ellerman <mpe@ellerman.id.au>
> Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
>
> Book3e defines both _PAGE_USER and _PAGE_PRIVILEGED, so the nohash
> default pte_mkprivileged() and pte_mkuser() are not usable.
>
> This patch redefines them for book3e.
>
> Fixes: a0da4bc166f2 ("powerpc/mm: Allow platforms to redefine some
> helpers")
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> ---
> arch/powerpc/include/asm/nohash/pte-book3e.h | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/nohash/pte-book3e.h
> b/arch/powerpc/include/asm/nohash/pte-book3e.h
> index 58eef8cb569d..fb4297dff3e2 100644
> --- a/arch/powerpc/include/asm/nohash/pte-book3e.h
> +++ b/arch/powerpc/include/asm/nohash/pte-book3e.h
> @@ -109,5 +109,19 @@
> #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
> #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
>
> +static inline pte_t pte_mkprivileged(pte_t pte)
> +{
> + return __pte((pte_val(pte) & ~_PAGE_USER) | _PAGE_PRIVILEGED);
> +}
> +
> +#define pte_mkprivileged pte_mkprivileged
> +
> +static inline pte_t pte_mkuser(pte_t pte)
> +{
> + return __pte((pte_val(pte) & ~_PAGE_PRIVILEGED) | _PAGE_USER);
> +}
> +
> +#define pte_mkuser pte_mkuser
> +
I was build testing a similar patch. We would need to put #ifndef
__ASSEMBLY__ around it.
-aneesh
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v3 13/24] powerpc/mm: Split dump_pagelinuxtables flag_array table
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (11 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code Christophe Leroy
@ 2018-10-09 13:51 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 14/24] powerpc/mm: drop unused page flags Christophe Leroy
` (10 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:51 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
To reduce the complexity of flag_array, and allow the removal of
default 0 value of non existing flags, lets have one flag_array
table for each platform family with only the really existing flags.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/mm/Makefile | 7 ++
arch/powerpc/mm/dump_linuxpagetables-8xx.c | 82 +++++++++++++
arch/powerpc/mm/dump_linuxpagetables-book3s64.c | 115 ++++++++++++++++++
arch/powerpc/mm/dump_linuxpagetables-generic.c | 82 +++++++++++++
arch/powerpc/mm/dump_linuxpagetables.c | 155 +-----------------------
arch/powerpc/mm/dump_linuxpagetables.h | 19 +++
6 files changed, 307 insertions(+), 153 deletions(-)
create mode 100644 arch/powerpc/mm/dump_linuxpagetables-8xx.c
create mode 100644 arch/powerpc/mm/dump_linuxpagetables-book3s64.c
create mode 100644 arch/powerpc/mm/dump_linuxpagetables-generic.c
create mode 100644 arch/powerpc/mm/dump_linuxpagetables.h
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index cdf6a9960046..3c844bdd16c4 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -43,5 +43,12 @@ obj-$(CONFIG_HIGHMEM) += highmem.o
obj-$(CONFIG_PPC_COPRO_BASE) += copro_fault.o
obj-$(CONFIG_SPAPR_TCE_IOMMU) += mmu_context_iommu.o
obj-$(CONFIG_PPC_PTDUMP) += dump_linuxpagetables.o
+ifdef CONFIG_PPC_PTDUMP
+obj-$(CONFIG_4xx) += dump_linuxpagetables-generic.o
+obj-$(CONFIG_PPC_8xx) += dump_linuxpagetables-8xx.o
+obj-$(CONFIG_PPC_BOOK3E_MMU) += dump_linuxpagetables-generic.o
+obj-$(CONFIG_PPC_BOOK3S_32) += dump_linuxpagetables-generic.o
+obj-$(CONFIG_PPC_BOOK3S_64) += dump_linuxpagetables-book3s64.o
+endif
obj-$(CONFIG_PPC_HTDUMP) += dump_hashpagetable.o
obj-$(CONFIG_PPC_MEM_KEYS) += pkeys.o
diff --git a/arch/powerpc/mm/dump_linuxpagetables-8xx.c b/arch/powerpc/mm/dump_linuxpagetables-8xx.c
new file mode 100644
index 000000000000..33f52a97975b
--- /dev/null
+++ b/arch/powerpc/mm/dump_linuxpagetables-8xx.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * From split of dump_linuxpagetables.c
+ * Copyright 2016, Rashmica Gupta, IBM Corp.
+ *
+ */
+#include <linux/kernel.h>
+#include <asm/pgtable.h>
+
+#include "dump_linuxpagetables.h"
+
+static const struct flag_info flag_array[] = {
+ {
+ .mask = _PAGE_PRIVILEGED,
+ .val = 0,
+ .set = "user",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_RO | _PAGE_NA,
+ .val = 0,
+ .set = "rw",
+ }, {
+ .mask = _PAGE_RO | _PAGE_NA,
+ .val = _PAGE_RO,
+ .set = "r ",
+ }, {
+ .mask = _PAGE_RO | _PAGE_NA,
+ .val = _PAGE_NA,
+ .set = " ",
+ }, {
+ .mask = _PAGE_EXEC,
+ .val = _PAGE_EXEC,
+ .set = " X ",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_PRESENT,
+ .val = _PAGE_PRESENT,
+ .set = "present",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_GUARDED,
+ .val = _PAGE_GUARDED,
+ .set = "guarded",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_DIRTY,
+ .val = _PAGE_DIRTY,
+ .set = "dirty",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_ACCESSED,
+ .val = _PAGE_ACCESSED,
+ .set = "accessed",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_NO_CACHE,
+ .val = _PAGE_NO_CACHE,
+ .set = "no cache",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_SPECIAL,
+ .val = _PAGE_SPECIAL,
+ .set = "special",
+ }
+};
+
+struct pgtable_level pg_level[5] = {
+ {
+ }, { /* pgd */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pud */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pmd */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pte */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ },
+};
diff --git a/arch/powerpc/mm/dump_linuxpagetables-book3s64.c b/arch/powerpc/mm/dump_linuxpagetables-book3s64.c
new file mode 100644
index 000000000000..a637e612b205
--- /dev/null
+++ b/arch/powerpc/mm/dump_linuxpagetables-book3s64.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * From split of dump_linuxpagetables.c
+ * Copyright 2016, Rashmica Gupta, IBM Corp.
+ *
+ */
+#include <linux/kernel.h>
+#include <asm/pgtable.h>
+
+#include "dump_linuxpagetables.h"
+
+static const struct flag_info flag_array[] = {
+ {
+ .mask = _PAGE_PRIVILEGED,
+ .val = 0,
+ .set = "user",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_READ,
+ .val = _PAGE_READ,
+ .set = "r",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_WRITE,
+ .val = _PAGE_WRITE,
+ .set = "w",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_EXEC,
+ .val = _PAGE_EXEC,
+ .set = " X ",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_PTE,
+ .val = _PAGE_PTE,
+ .set = "pte",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_PRESENT,
+ .val = _PAGE_PRESENT,
+ .set = "present",
+ .clear = " ",
+ }, {
+ .mask = H_PAGE_HASHPTE,
+ .val = H_PAGE_HASHPTE,
+ .set = "hpte",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_DIRTY,
+ .val = _PAGE_DIRTY,
+ .set = "dirty",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_ACCESSED,
+ .val = _PAGE_ACCESSED,
+ .set = "accessed",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_NON_IDEMPOTENT,
+ .val = _PAGE_NON_IDEMPOTENT,
+ .set = "non-idempotent",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_TOLERANT,
+ .val = _PAGE_TOLERANT,
+ .set = "tolerant",
+ .clear = " ",
+ }, {
+ .mask = H_PAGE_BUSY,
+ .val = H_PAGE_BUSY,
+ .set = "busy",
+ }, {
+#ifdef CONFIG_PPC_64K_PAGES
+ .mask = H_PAGE_COMBO,
+ .val = H_PAGE_COMBO,
+ .set = "combo",
+ }, {
+ .mask = H_PAGE_4K_PFN,
+ .val = H_PAGE_4K_PFN,
+ .set = "4K_pfn",
+ }, {
+#else /* CONFIG_PPC_64K_PAGES */
+ .mask = H_PAGE_F_GIX,
+ .val = H_PAGE_F_GIX,
+ .set = "f_gix",
+ .is_val = true,
+ .shift = H_PAGE_F_GIX_SHIFT,
+ }, {
+ .mask = H_PAGE_F_SECOND,
+ .val = H_PAGE_F_SECOND,
+ .set = "f_second",
+ }, {
+#endif /* CONFIG_PPC_64K_PAGES */
+ .mask = _PAGE_SPECIAL,
+ .val = _PAGE_SPECIAL,
+ .set = "special",
+ }
+};
+
+struct pgtable_level pg_level[5] = {
+ {
+ }, { /* pgd */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pud */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pmd */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pte */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ },
+};
diff --git a/arch/powerpc/mm/dump_linuxpagetables-generic.c b/arch/powerpc/mm/dump_linuxpagetables-generic.c
new file mode 100644
index 000000000000..1e3829ec1348
--- /dev/null
+++ b/arch/powerpc/mm/dump_linuxpagetables-generic.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * From split of dump_linuxpagetables.c
+ * Copyright 2016, Rashmica Gupta, IBM Corp.
+ *
+ */
+#include <linux/kernel.h>
+#include <asm/pgtable.h>
+
+#include "dump_linuxpagetables.h"
+
+static const struct flag_info flag_array[] = {
+ {
+ .mask = _PAGE_USER,
+ .val = _PAGE_USER,
+ .set = "user",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_RW,
+ .val = _PAGE_RW,
+ .set = "rw",
+ .clear = "r ",
+ }, {
+#ifndef CONFIG_PPC_BOOK3S_32
+ .mask = _PAGE_EXEC,
+ .val = _PAGE_EXEC,
+ .set = " X ",
+ .clear = " ",
+ }, {
+#endif
+ .mask = _PAGE_PRESENT,
+ .val = _PAGE_PRESENT,
+ .set = "present",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_GUARDED,
+ .val = _PAGE_GUARDED,
+ .set = "guarded",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_DIRTY,
+ .val = _PAGE_DIRTY,
+ .set = "dirty",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_ACCESSED,
+ .val = _PAGE_ACCESSED,
+ .set = "accessed",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_WRITETHRU,
+ .val = _PAGE_WRITETHRU,
+ .set = "write through",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_NO_CACHE,
+ .val = _PAGE_NO_CACHE,
+ .set = "no cache",
+ .clear = " ",
+ }, {
+ .mask = _PAGE_SPECIAL,
+ .val = _PAGE_SPECIAL,
+ .set = "special",
+ }
+};
+
+struct pgtable_level pg_level[5] = {
+ {
+ }, { /* pgd */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pud */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pmd */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ }, { /* pte */
+ .flag = flag_array,
+ .num = ARRAY_SIZE(flag_array),
+ },
+};
diff --git a/arch/powerpc/mm/dump_linuxpagetables.c b/arch/powerpc/mm/dump_linuxpagetables.c
index 876e2a3c79f2..e60aa6d7456d 100644
--- a/arch/powerpc/mm/dump_linuxpagetables.c
+++ b/arch/powerpc/mm/dump_linuxpagetables.c
@@ -27,6 +27,8 @@
#include <asm/page.h>
#include <asm/pgalloc.h>
+#include "dump_linuxpagetables.h"
+
#ifdef CONFIG_PPC32
#define KERN_VIRT_START 0
#endif
@@ -101,159 +103,6 @@ static struct addr_marker address_markers[] = {
{ -1, NULL },
};
-struct flag_info {
- u64 mask;
- u64 val;
- const char *set;
- const char *clear;
- bool is_val;
- int shift;
-};
-
-static const struct flag_info flag_array[] = {
- {
- .mask = _PAGE_USER | _PAGE_PRIVILEGED,
- .val = _PAGE_USER,
- .set = "user",
- .clear = " ",
- }, {
- .mask = _PAGE_RW | _PAGE_RO | _PAGE_NA,
- .val = _PAGE_RW,
- .set = "rw",
- }, {
- .mask = _PAGE_RW | _PAGE_RO | _PAGE_NA,
- .val = _PAGE_RO,
- .set = "ro",
- }, {
-#if _PAGE_NA != 0
- .mask = _PAGE_RW | _PAGE_RO | _PAGE_NA,
- .val = _PAGE_RO,
- .set = "na",
- }, {
-#endif
- .mask = _PAGE_EXEC,
- .val = _PAGE_EXEC,
- .set = " X ",
- .clear = " ",
- }, {
- .mask = _PAGE_PTE,
- .val = _PAGE_PTE,
- .set = "pte",
- .clear = " ",
- }, {
- .mask = _PAGE_PRESENT,
- .val = _PAGE_PRESENT,
- .set = "present",
- .clear = " ",
- }, {
-#ifdef CONFIG_PPC_BOOK3S_64
- .mask = H_PAGE_HASHPTE,
- .val = H_PAGE_HASHPTE,
-#else
- .mask = _PAGE_HASHPTE,
- .val = _PAGE_HASHPTE,
-#endif
- .set = "hpte",
- .clear = " ",
- }, {
-#ifndef CONFIG_PPC_BOOK3S_64
- .mask = _PAGE_GUARDED,
- .val = _PAGE_GUARDED,
- .set = "guarded",
- .clear = " ",
- }, {
-#endif
- .mask = _PAGE_DIRTY,
- .val = _PAGE_DIRTY,
- .set = "dirty",
- .clear = " ",
- }, {
- .mask = _PAGE_ACCESSED,
- .val = _PAGE_ACCESSED,
- .set = "accessed",
- .clear = " ",
- }, {
-#ifndef CONFIG_PPC_BOOK3S_64
- .mask = _PAGE_WRITETHRU,
- .val = _PAGE_WRITETHRU,
- .set = "write through",
- .clear = " ",
- }, {
-#endif
-#ifndef CONFIG_PPC_BOOK3S_64
- .mask = _PAGE_NO_CACHE,
- .val = _PAGE_NO_CACHE,
- .set = "no cache",
- .clear = " ",
- }, {
-#else
- .mask = _PAGE_NON_IDEMPOTENT,
- .val = _PAGE_NON_IDEMPOTENT,
- .set = "non-idempotent",
- .clear = " ",
- }, {
- .mask = _PAGE_TOLERANT,
- .val = _PAGE_TOLERANT,
- .set = "tolerant",
- .clear = " ",
- }, {
-#endif
-#ifdef CONFIG_PPC_BOOK3S_64
- .mask = H_PAGE_BUSY,
- .val = H_PAGE_BUSY,
- .set = "busy",
- }, {
-#ifdef CONFIG_PPC_64K_PAGES
- .mask = H_PAGE_COMBO,
- .val = H_PAGE_COMBO,
- .set = "combo",
- }, {
- .mask = H_PAGE_4K_PFN,
- .val = H_PAGE_4K_PFN,
- .set = "4K_pfn",
- }, {
-#else /* CONFIG_PPC_64K_PAGES */
- .mask = H_PAGE_F_GIX,
- .val = H_PAGE_F_GIX,
- .set = "f_gix",
- .is_val = true,
- .shift = H_PAGE_F_GIX_SHIFT,
- }, {
- .mask = H_PAGE_F_SECOND,
- .val = H_PAGE_F_SECOND,
- .set = "f_second",
- }, {
-#endif /* CONFIG_PPC_64K_PAGES */
-#endif
- .mask = _PAGE_SPECIAL,
- .val = _PAGE_SPECIAL,
- .set = "special",
- }
-};
-
-struct pgtable_level {
- const struct flag_info *flag;
- size_t num;
- u64 mask;
-};
-
-static struct pgtable_level pg_level[] = {
- {
- }, { /* pgd */
- .flag = flag_array,
- .num = ARRAY_SIZE(flag_array),
- }, { /* pud */
- .flag = flag_array,
- .num = ARRAY_SIZE(flag_array),
- }, { /* pmd */
- .flag = flag_array,
- .num = ARRAY_SIZE(flag_array),
- }, { /* pte */
- .flag = flag_array,
- .num = ARRAY_SIZE(flag_array),
- },
-};
-
static void dump_flag_info(struct pg_state *st, const struct flag_info
*flag, u64 pte, int num)
{
diff --git a/arch/powerpc/mm/dump_linuxpagetables.h b/arch/powerpc/mm/dump_linuxpagetables.h
new file mode 100644
index 000000000000..5d513636de73
--- /dev/null
+++ b/arch/powerpc/mm/dump_linuxpagetables.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#include <linux/types.h>
+
+struct flag_info {
+ u64 mask;
+ u64 val;
+ const char *set;
+ const char *clear;
+ bool is_val;
+ int shift;
+};
+
+struct pgtable_level {
+ const struct flag_info *flag;
+ size_t num;
+ u64 mask;
+};
+
+extern struct pgtable_level pg_level[5];
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 14/24] powerpc/mm: drop unused page flags
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (12 preceding siblings ...)
2018-10-09 13:51 ` [PATCH v3 13/24] powerpc/mm: Split dump_pagelinuxtables flag_array table Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 15/24] powerpc/mm: move __P and __S tables in the common pgtable.h Christophe Leroy
` (9 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
The following page flags in pte-common.h can be dropped:
_PAGE_ENDIAN is only used in mm/fsl_booke_mmu.c and is defined in
asm/nohash/32/pte-fsl-booke.h
_PAGE_4K_PFN is nowhere defined nor used
_PAGE_READ, _PAGE_WRITE and _PAGE_PTE are only defined and used
in book3s/64
The following page flags in book3s/64/pgtable.h can be dropped as
they are not used on this platform nor by common code.
_PAGE_NA, _PAGE_RO, _PAGE_USER and _PAGE_PSIZE
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 10 +---------
arch/powerpc/include/asm/pte-common.h | 17 +----------------
2 files changed, 2 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index c8564762b6f0..f80f436834a1 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -14,10 +14,6 @@
*/
#define _PAGE_BIT_SWAP_TYPE 0
-#define _PAGE_NA 0
-#define _PAGE_RO 0
-#define _PAGE_USER 0
-
#define _PAGE_EXEC 0x00001 /* execute permission */
#define _PAGE_WRITE 0x00002 /* write access allowed */
#define _PAGE_READ 0x00004 /* read access allowed */
@@ -123,10 +119,6 @@
#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | \
_PAGE_RW | _PAGE_EXEC)
/*
- * No page size encoding in the linux PTE
- */
-#define _PAGE_PSIZE 0
-/*
* _PAGE_CHG_MASK masks of bits that are to be preserved across
* pgprot changes
*/
@@ -149,7 +141,7 @@
* pages. We always set _PAGE_COHERENT when SMP is enabled or
* the processor might need it for DMA coherency.
*/
-#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
#define _PAGE_BASE (_PAGE_BASE_NC)
/* Permission masks used to generate the __P and __S table,
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index bef56141a549..5a5ba43bdf98 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -14,18 +14,12 @@
#ifndef _PAGE_EXEC
#define _PAGE_EXEC 0
#endif
-#ifndef _PAGE_ENDIAN
-#define _PAGE_ENDIAN 0
-#endif
#ifndef _PAGE_COHERENT
#define _PAGE_COHERENT 0
#endif
#ifndef _PAGE_WRITETHRU
#define _PAGE_WRITETHRU 0
#endif
-#ifndef _PAGE_4K_PFN
-#define _PAGE_4K_PFN 0
-#endif
#ifndef _PAGE_SAO
#define _PAGE_SAO 0
#endif
@@ -39,9 +33,6 @@
#define _PAGE_RW 0
#endif
-#ifndef _PAGE_PTE
-#define _PAGE_PTE 0
-#endif
/* At least one of _PAGE_PRIVILEGED or _PAGE_USER must be defined */
#ifndef _PAGE_PRIVILEGED
#define _PAGE_PRIVILEGED 0
@@ -122,7 +113,7 @@ static inline bool pte_user(pte_t pte)
/* Mask of bits returned by pte_pgprot() */
#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
- _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
+ _PAGE_WRITETHRU | \
_PAGE_USER | _PAGE_ACCESSED | _PAGE_RO | _PAGE_NA | \
_PAGE_PRIVILEGED | \
_PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
@@ -208,12 +199,6 @@ static inline bool pte_user(pte_t pte)
#define PAGE_AGP (PAGE_KERNEL_NC)
#define HAVE_PAGE_AGP
-#ifndef _PAGE_READ
-/* if not defined, we should not find _PAGE_WRITE too */
-#define _PAGE_READ 0
-#define _PAGE_WRITE _PAGE_RW
-#endif
-
#ifndef H_PAGE_4K_PFN
#define H_PAGE_4K_PFN 0
#endif
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 15/24] powerpc/mm: move __P and __S tables in the common pgtable.h
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (13 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 14/24] powerpc/mm: drop unused page flags Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 16/24] powerpc/book3s/32: do not include pte-common.h Christophe Leroy
` (8 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
__P and __S flags are the same for all platform and should remain
as is in the future, so avoid duplication.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 20 --------------------
arch/powerpc/include/asm/pgtable.h | 19 +++++++++++++++++++
arch/powerpc/include/asm/pte-common.h | 20 --------------------
3 files changed, 19 insertions(+), 40 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index f80f436834a1..cf8dbd5f8f03 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -151,8 +151,6 @@
* Write permissions imply read permissions for now (we could make write-only
* pages on BookE but we don't bother for now). Execute permission control is
* possible on platforms that define _PAGE_EXEC
- *
- * Note due to the way vm flags are laid out, the bits are XWR
*/
#define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW)
@@ -162,24 +160,6 @@
#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_READ)
#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
-#define __P000 PAGE_NONE
-#define __P001 PAGE_READONLY
-#define __P010 PAGE_COPY
-#define __P011 PAGE_COPY
-#define __P100 PAGE_READONLY_X
-#define __P101 PAGE_READONLY_X
-#define __P110 PAGE_COPY_X
-#define __P111 PAGE_COPY_X
-
-#define __S000 PAGE_NONE
-#define __S001 PAGE_READONLY
-#define __S010 PAGE_SHARED
-#define __S011 PAGE_SHARED
-#define __S100 PAGE_READONLY_X
-#define __S101 PAGE_READONLY_X
-#define __S110 PAGE_SHARED_X
-#define __S111 PAGE_SHARED_X
-
/* Permission masks used for kernel mappings */
#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 14c79a7dc855..fb4b85bba110 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -20,6 +20,25 @@ struct mm_struct;
#include <asm/nohash/pgtable.h>
#endif /* !CONFIG_PPC_BOOK3S */
+/* Note due to the way vm flags are laid out, the bits are XWR */
+#define __P000 PAGE_NONE
+#define __P001 PAGE_READONLY
+#define __P010 PAGE_COPY
+#define __P011 PAGE_COPY
+#define __P100 PAGE_READONLY_X
+#define __P101 PAGE_READONLY_X
+#define __P110 PAGE_COPY_X
+#define __P111 PAGE_COPY_X
+
+#define __S000 PAGE_NONE
+#define __S001 PAGE_READONLY
+#define __S010 PAGE_SHARED
+#define __S011 PAGE_SHARED
+#define __S100 PAGE_READONLY_X
+#define __S101 PAGE_READONLY_X
+#define __S110 PAGE_SHARED_X
+#define __S111 PAGE_SHARED_X
+
#ifndef __ASSEMBLY__
#include <asm/tlbflush.h>
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index 5a5ba43bdf98..4860dae76dae 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -139,8 +139,6 @@ static inline bool pte_user(pte_t pte)
* Write permissions imply read permissions for now (we could make write-only
* pages on BookE but we don't bother for now). Execute permission control is
* possible on platforms that define _PAGE_EXEC
- *
- * Note due to the way vm flags are laid out, the bits are XWR
*/
#define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_NA)
#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
@@ -153,24 +151,6 @@ static inline bool pte_user(pte_t pte)
#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \
_PAGE_EXEC)
-#define __P000 PAGE_NONE
-#define __P001 PAGE_READONLY
-#define __P010 PAGE_COPY
-#define __P011 PAGE_COPY
-#define __P100 PAGE_READONLY_X
-#define __P101 PAGE_READONLY_X
-#define __P110 PAGE_COPY_X
-#define __P111 PAGE_COPY_X
-
-#define __S000 PAGE_NONE
-#define __S001 PAGE_READONLY
-#define __S010 PAGE_SHARED
-#define __S011 PAGE_SHARED
-#define __S100 PAGE_READONLY_X
-#define __S101 PAGE_READONLY_X
-#define __S110 PAGE_SHARED_X
-#define __S111 PAGE_SHARED_X
-
/* Permission masks used for kernel mappings */
#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 16/24] powerpc/book3s/32: do not include pte-common.h
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (14 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 15/24] powerpc/mm: move __P and __S tables in the common pgtable.h Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 17/24] powerpc/mm: Move pte_user() into nohash/pgtable.h Christophe Leroy
` (7 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
As done for book3s/64, add necessary flags/defines in
book3s/32/pgtable.h and do not include pte-common.h
It allows in the meantime to remove all related hash
definitions from pte-common.h and to also remove
_PAGE_EXEC default as _PAGE_EXEC is defined on all
platforms except book3s/32.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 97 ++++++++++++++++++++++++++--
arch/powerpc/include/asm/pte-common.h | 16 +----
2 files changed, 96 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index a0dc3a3eef33..c28e8c6a27c2 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -8,7 +8,97 @@
#include <asm/book3s/32/hash.h>
/* And here we include common definitions */
-#include <asm/pte-common.h>
+
+#define _PAGE_KERNEL_RO 0
+#define _PAGE_KERNEL_ROX 0
+#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
+#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW)
+
+#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
+
+#ifndef __ASSEMBLY__
+
+static inline bool pte_user(pte_t pte)
+{
+ return pte_val(pte) & _PAGE_USER;
+}
+#endif /* __ASSEMBLY__ */
+
+/* Location of the PFN in the PTE. Most 32-bit platforms use the same
+ * as _PAGE_SHIFT here (ie, naturally aligned).
+ * Platform who don't just pre-define the value so we don't override it here
+ */
+#define PTE_RPN_SHIFT (PAGE_SHIFT)
+
+/* The mask covered by the RPN must be a ULL on 32-bit platforms with
+ * 64-bit PTEs
+ */
+#ifdef CONFIG_PTE_64BIT
+#define PTE_RPN_MASK (~((1ULL << PTE_RPN_SHIFT) - 1))
+#else
+#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
+#endif
+
+/* _PAGE_CHG_MASK masks of bits that are to be preserved across
+ * pgprot changes
+ */
+#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HASHPTE | _PAGE_DIRTY | \
+ _PAGE_ACCESSED | _PAGE_SPECIAL)
+
+/* Mask of bits returned by pte_pgprot() */
+#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
+ _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
+ _PAGE_RW | _PAGE_DIRTY)
+
+/*
+ * We define 2 sets of base prot bits, one for basic pages (ie,
+ * cacheable kernel and user pages) and one for non cacheable
+ * pages. We always set _PAGE_COHERENT when SMP is enabled or
+ * the processor might need it for DMA coherency.
+ */
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
+#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
+
+/* Permission masks used to generate the __P and __S table,
+ *
+ * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
+ *
+ * Write permissions imply read permissions for now.
+ */
+#define PAGE_NONE __pgprot(_PAGE_BASE)
+#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER)
+
+/* Permission masks used for kernel mappings */
+#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
+#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | _PAGE_NO_CACHE)
+#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+ _PAGE_NO_CACHE | _PAGE_GUARDED)
+#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
+#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
+#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
+
+/* Protection used for kernel text. We want the debuggers to be able to
+ * set breakpoints anywhere, so don't write protect the kernel text
+ * on platforms where such control is possible.
+ */
+#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
+ defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
+#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
+#else
+#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
+#endif
+
+/* Make modules code happy. We don't set RO yet */
+#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
+
+/* Advertise special mapping type for AGP */
+#define PAGE_AGP (PAGE_KERNEL_NC)
+#define HAVE_PAGE_AGP
#define PTE_INDEX_SIZE PTE_SHIFT
#define PMD_INDEX_SIZE 0
@@ -219,7 +309,7 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
pte_t *ptep)
{
- pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), _PAGE_RO);
+ pte_update(ptep, _PAGE_RW, 0);
}
static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
unsigned long addr, pte_t *ptep)
@@ -235,9 +325,8 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
{
unsigned long set = pte_val(entry) &
(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW);
- unsigned long clr = ~pte_val(entry) & _PAGE_RO;
- pte_update(ptep, clr, set);
+ pte_update(ptep, 0, set);
flush_tlb_page(vma, address);
}
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index 4860dae76dae..3a8ec18ffd22 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -5,15 +5,9 @@
* Some bits are only used on some cpu families... Make sure that all
* the undefined gets a sensible default
*/
-#ifndef _PAGE_HASHPTE
-#define _PAGE_HASHPTE 0
-#endif
#ifndef _PAGE_HWWRITE
#define _PAGE_HWWRITE 0
#endif
-#ifndef _PAGE_EXEC
-#define _PAGE_EXEC 0
-#endif
#ifndef _PAGE_COHERENT
#define _PAGE_COHERENT 0
#endif
@@ -68,11 +62,8 @@
#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_RW | \
_PAGE_HWWRITE | _PAGE_EXEC)
#endif
-#ifndef _PAGE_HPTEFLAGS
-#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
-#endif
#ifndef _PTE_NONE_MASK
-#define _PTE_NONE_MASK _PAGE_HPTEFLAGS
+#define _PTE_NONE_MASK 0
#endif
#ifndef __ASSEMBLY__
@@ -108,7 +99,7 @@ static inline bool pte_user(pte_t pte)
/* _PAGE_CHG_MASK masks of bits that are to be preserved across
* pgprot changes
*/
-#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
+#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | \
_PAGE_ACCESSED | _PAGE_SPECIAL)
/* Mask of bits returned by pte_pgprot() */
@@ -125,8 +116,7 @@ static inline bool pte_user(pte_t pte)
* the processor might need it for DMA coherency.
*/
#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
-#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) || \
- defined(CONFIG_PPC_E500MC)
+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
#else
#define _PAGE_BASE (_PAGE_BASE_NC)
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 17/24] powerpc/mm: Move pte_user() into nohash/pgtable.h
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (15 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 16/24] powerpc/book3s/32: do not include pte-common.h Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 18/24] powerpc/mm: Distribute platform specific PAGE and PMD flags and definitions Christophe Leroy
` (6 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Now the pte-common.h is only for nohash platforms, lets
move pte_user() helper out of pte-common.h to put it
together with other helpers.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/pgtable.h | 10 ++++++++++
arch/powerpc/include/asm/pte-common.h | 13 -------------
2 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index 062d96233673..8de3b7eb88b0 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -52,6 +52,16 @@ static inline bool pte_hw_valid(pte_t pte)
}
/*
+ * Don't just check for any non zero bits in __PAGE_USER, since for book3e
+ * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
+ * _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
+ */
+static inline bool pte_user(pte_t pte)
+{
+ return (pte_val(pte) & (_PAGE_USER | _PAGE_PRIVILEGED)) == _PAGE_USER;
+}
+
+/*
* We only find page table entry in the last level
* Hence no need for other accessors
*/
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index 3a8ec18ffd22..556a914ff845 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -66,19 +66,6 @@
#define _PTE_NONE_MASK 0
#endif
-#ifndef __ASSEMBLY__
-
-/*
- * Don't just check for any non zero bits in __PAGE_USER, since for book3e
- * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
- * _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
- */
-static inline bool pte_user(pte_t pte)
-{
- return (pte_val(pte) & (_PAGE_USER | _PAGE_PRIVILEGED)) == _PAGE_USER;
-}
-#endif /* __ASSEMBLY__ */
-
/* Location of the PFN in the PTE. Most 32-bit platforms use the same
* as _PAGE_SHIFT here (ie, naturally aligned).
* Platform who don't just pre-define the value so we don't override it here
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 18/24] powerpc/mm: Distribute platform specific PAGE and PMD flags and definitions
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (16 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 17/24] powerpc/mm: Move pte_user() into nohash/pgtable.h Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 19/24] powerpc/nohash/64: do not include pte-common.h Christophe Leroy
` (5 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
The base kernel PAGE_XXXX definition sets are more or less platform
specific. Lets distribute them close to platform _PAGE_XXX flags
definition, and customise them to their exact platform flags.
Also defines _PAGE_PSIZE and _PTE_NONE_MASK for each platform
allthough they are defined as 0.
Do the same with _PMD flags like _PMD_USER and _PMD_PRESENT_MASK
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/32/pte-40x.h | 29 ++++++++++
arch/powerpc/include/asm/nohash/32/pte-44x.h | 35 ++++++++++++
arch/powerpc/include/asm/nohash/32/pte-8xx.h | 27 +++++++++
arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h | 38 +++++++++++++
arch/powerpc/include/asm/nohash/pte-book3e.h | 30 ++++++++++
arch/powerpc/include/asm/pte-common.h | 66 ----------------------
6 files changed, 159 insertions(+), 66 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h
index bb4b3a4b92a0..2b48bc289a4d 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-40x.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h
@@ -50,13 +50,42 @@
#define _PAGE_EXEC 0x200 /* hardware: EX permission */
#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */
+/* No page size encoding in the linux PTE */
+#define _PAGE_PSIZE 0
+
+#define _PAGE_KERNEL_RO 0
+#define _PAGE_KERNEL_ROX _PAGE_EXEC
+#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
+#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE | _PAGE_EXEC)
+
#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */
+#define _PMD_PRESENT_MASK _PMD_PRESENT
#define _PMD_BAD 0x802
#define _PMD_SIZE_4M 0x0c0
#define _PMD_SIZE_16M 0x0e0
+#define _PMD_USER 0
+
+#define _PTE_NONE_MASK 0
/* Until my rework is finished, 40x still needs atomic PTE updates */
#define PTE_ATOMIC_UPDATES 1
+/* Mask of bits returned by pte_pgprot() */
+#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
+ _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
+ _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
+
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
+#define _PAGE_BASE (_PAGE_BASE_NC)
+
+/* Permission masks used to generate the __P and __S table */
+#define PAGE_NONE __pgprot(_PAGE_BASE)
+#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
+#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NOHASH_32_PTE_40x_H */
diff --git a/arch/powerpc/include/asm/nohash/32/pte-44x.h b/arch/powerpc/include/asm/nohash/32/pte-44x.h
index f812c0272364..8d6b268a986f 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-44x.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-44x.h
@@ -85,14 +85,49 @@
#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
+/* No page size encoding in the linux PTE */
+#define _PAGE_PSIZE 0
+
+#define _PAGE_KERNEL_RO 0
+#define _PAGE_KERNEL_ROX _PAGE_EXEC
+#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
+#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
+
+/* Mask of bits returned by pte_pgprot() */
+#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
+ _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
+ _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
+
/* TODO: Add large page lowmem mapping support */
#define _PMD_PRESENT 0
#define _PMD_PRESENT_MASK (PAGE_MASK)
#define _PMD_BAD (~PAGE_MASK)
+#define _PMD_USER 0
/* ERPN in a PTE never gets cleared, ignore it */
#define _PTE_NONE_MASK 0xffffffff00000000ULL
+/*
+ * We define 2 sets of base prot bits, one for basic pages (ie,
+ * cacheable kernel and user pages) and one for non cacheable
+ * pages. We always set _PAGE_COHERENT when SMP is enabled or
+ * the processor might need it for DMA coherency.
+ */
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
+#if defined(CONFIG_SMP)
+#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
+#else
+#define _PAGE_BASE (_PAGE_BASE_NC)
+#endif
+
+/* Permission masks used to generate the __P and __S table */
+#define PAGE_NONE __pgprot(_PAGE_BASE)
+#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
+#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NOHASH_32_PTE_44x_H */
diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
index f04cb46ae8a1..d06fc45bd9ac 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
@@ -46,19 +46,46 @@
#define _PAGE_NA 0x0200 /* Supervisor NA, User no access */
#define _PAGE_RO 0x0600 /* Supervisor RO, User no access */
+#define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_RO)
+#define _PAGE_KERNEL_ROX (_PAGE_PRIVILEGED | _PAGE_RO | _PAGE_EXEC)
+#define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_DIRTY)
+#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_EXEC)
+
+/* Mask of bits returned by pte_pgprot() */
+#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
+ _PAGE_ACCESSED | _PAGE_RO | _PAGE_NA | \
+ _PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_EXEC)
+
#define _PMD_PRESENT 0x0001
+#define _PMD_PRESENT_MASK _PMD_PRESENT
#define _PMD_BAD 0x0fd0
#define _PMD_PAGE_MASK 0x000c
#define _PMD_PAGE_8M 0x000c
#define _PMD_PAGE_512K 0x0004
#define _PMD_USER 0x0020 /* APG 1 */
+#define _PTE_NONE_MASK 0
+
/* Until my rework is finished, 8xx still needs atomic PTE updates */
#define PTE_ATOMIC_UPDATES 1
#ifdef CONFIG_PPC_16K_PAGES
#define _PAGE_PSIZE _PAGE_HUGE
+#else
+#define _PAGE_PSIZE 0
#endif
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
+#define _PAGE_BASE (_PAGE_BASE_NC)
+
+/* Permission masks used to generate the __P and __S table */
+#define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_NA)
+#define PAGE_SHARED __pgprot(_PAGE_BASE)
+#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_EXEC)
+#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_RO)
+#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_RO | _PAGE_EXEC)
+#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_RO)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_RO | _PAGE_EXEC)
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NOHASH_32_PTE_8xx_H */
diff --git a/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h b/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
index d1ee24e9e137..1ecf60fe0909 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
@@ -31,11 +31,49 @@
#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
#define _PAGE_SPECIAL 0x00800 /* S: Special page */
+#define _PAGE_KERNEL_RO 0
+#define _PAGE_KERNEL_ROX _PAGE_EXEC
+#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
+#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
+
+/* No page size encoding in the linux PTE */
+#define _PAGE_PSIZE 0
+
+/* Mask of bits returned by pte_pgprot() */
+#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
+ _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
+ _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
+
#define _PMD_PRESENT 0
#define _PMD_PRESENT_MASK (PAGE_MASK)
#define _PMD_BAD (~PAGE_MASK)
+#define _PMD_USER 0
+
+#define _PTE_NONE_MASK 0
#define PTE_WIMGE_SHIFT (6)
+/*
+ * We define 2 sets of base prot bits, one for basic pages (ie,
+ * cacheable kernel and user pages) and one for non cacheable
+ * pages. We always set _PAGE_COHERENT when SMP is enabled or
+ * the processor might need it for DMA coherency.
+ */
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
+#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
+#else
+#define _PAGE_BASE (_PAGE_BASE_NC)
+#endif
+
+/* Permission masks used to generate the __P and __S table */
+#define PAGE_NONE __pgprot(_PAGE_BASE)
+#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
+#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NOHASH_32_PTE_FSL_BOOKE_H */
diff --git a/arch/powerpc/include/asm/nohash/pte-book3e.h b/arch/powerpc/include/asm/nohash/pte-book3e.h
index 12730b81cd98..58eef8cb569d 100644
--- a/arch/powerpc/include/asm/nohash/pte-book3e.h
+++ b/arch/powerpc/include/asm/nohash/pte-book3e.h
@@ -77,7 +77,37 @@
#define _PMD_PRESENT 0
#define _PMD_PRESENT_MASK (PAGE_MASK)
#define _PMD_BAD (~PAGE_MASK)
+#define _PMD_USER 0
+#else
+#define _PTE_NONE_MASK 0
#endif
+/* Mask of bits returned by pte_pgprot() */
+#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
+ _PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
+ _PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY | _PAGE_EXEC)
+
+/*
+ * We define 2 sets of base prot bits, one for basic pages (ie,
+ * cacheable kernel and user pages) and one for non cacheable
+ * pages. We always set _PAGE_COHERENT when SMP is enabled or
+ * the processor might need it for DMA coherency.
+ */
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
+#if defined(CONFIG_SMP)
+#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
+#else
+#define _PAGE_BASE (_PAGE_BASE_NC)
+#endif
+
+/* Permission masks used to generate the __P and __S table */
+#define PAGE_NONE __pgprot(_PAGE_BASE)
+#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
+#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NOHASH_PTE_BOOK3E_H */
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index 556a914ff845..cce60b3ba7d4 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -17,9 +17,6 @@
#ifndef _PAGE_SAO
#define _PAGE_SAO 0
#endif
-#ifndef _PAGE_PSIZE
-#define _PAGE_PSIZE 0
-#endif
/* _PAGE_RO and _PAGE_RW shall not be defined at the same time */
#ifndef _PAGE_RO
#define _PAGE_RO 0
@@ -42,30 +39,6 @@
#define _PAGE_HUGE 0
#endif
-#ifndef _PMD_PRESENT_MASK
-#define _PMD_PRESENT_MASK _PMD_PRESENT
-#endif
-#ifndef _PMD_USER
-#define _PMD_USER 0
-#endif
-#ifndef _PAGE_KERNEL_RO
-#define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_RO)
-#endif
-#ifndef _PAGE_KERNEL_ROX
-#define _PAGE_KERNEL_ROX (_PAGE_PRIVILEGED | _PAGE_RO | _PAGE_EXEC)
-#endif
-#ifndef _PAGE_KERNEL_RW
-#define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_RW | \
- _PAGE_HWWRITE)
-#endif
-#ifndef _PAGE_KERNEL_RWX
-#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_RW | \
- _PAGE_HWWRITE | _PAGE_EXEC)
-#endif
-#ifndef _PTE_NONE_MASK
-#define _PTE_NONE_MASK 0
-#endif
-
/* Location of the PFN in the PTE. Most 32-bit platforms use the same
* as _PAGE_SHIFT here (ie, naturally aligned).
* Platform who don't just pre-define the value so we don't override it here
@@ -89,45 +62,6 @@
#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | \
_PAGE_ACCESSED | _PAGE_SPECIAL)
-/* Mask of bits returned by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
- _PAGE_WRITETHRU | \
- _PAGE_USER | _PAGE_ACCESSED | _PAGE_RO | _PAGE_NA | \
- _PAGE_PRIVILEGED | \
- _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
-
-/*
- * We define 2 sets of base prot bits, one for basic pages (ie,
- * cacheable kernel and user pages) and one for non cacheable
- * pages. We always set _PAGE_COHERENT when SMP is enabled or
- * the processor might need it for DMA coherency.
- */
-#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
-#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
-#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
-#else
-#define _PAGE_BASE (_PAGE_BASE_NC)
-#endif
-
-/* Permission masks used to generate the __P and __S table,
- *
- * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
- *
- * Write permissions imply read permissions for now (we could make write-only
- * pages on BookE but we don't bother for now). Execute permission control is
- * possible on platforms that define _PAGE_EXEC
- */
-#define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_NA)
-#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
-#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | \
- _PAGE_EXEC)
-#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO)
-#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \
- _PAGE_EXEC)
-#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO)
-#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \
- _PAGE_EXEC)
-
/* Permission masks used for kernel mappings */
#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 19/24] powerpc/nohash/64: do not include pte-common.h
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (17 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 18/24] powerpc/mm: Distribute platform specific PAGE and PMD flags and definitions Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 20/24] powerpc/mm: Allow platforms to redefine some helpers Christophe Leroy
` (4 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
nohash/64 only uses book3e PTE flags, so it doesn't need pte-common.h
This also allows to drop PAGE_SAO and H_PAGE_4K_PFN from pte_common.h
as they are only used by PPC64
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/64/pgtable.h | 16 ++++++++++++-
arch/powerpc/include/asm/nohash/pgtable.h | 27 +++++++++++++++++++++
arch/powerpc/include/asm/pte-common.h | 35 ----------------------------
3 files changed, 42 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h
index b7d65d4b61be..9ccea94b3d4e 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable.h
@@ -89,7 +89,21 @@
* Include the PTE bits definitions
*/
#include <asm/nohash/pte-book3e.h>
-#include <asm/pte-common.h>
+
+#define _PAGE_HWWRITE 0
+#define _PAGE_SAO 0
+#define _PAGE_RO 0
+#define _PAGE_NA 0
+#define _PAGE_HUGE 0
+
+#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
+
+/* _PAGE_CHG_MASK masks of bits that are to be preserved across
+ * pgprot changes
+ */
+#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPECIAL)
+
+#define H_PAGE_4K_PFN 0
#ifndef __ASSEMBLY__
/* pte_clear moved to later in this file */
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index 8de3b7eb88b0..d3feeac19467 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -8,6 +8,33 @@
#include <asm/nohash/32/pgtable.h>
#endif
+/* Permission masks used for kernel mappings */
+#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
+#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | _PAGE_NO_CACHE)
+#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+ _PAGE_NO_CACHE | _PAGE_GUARDED)
+#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
+#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
+#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
+
+/* Protection used for kernel text. We want the debuggers to be able to
+ * set breakpoints anywhere, so don't write protect the kernel text
+ * on platforms where such control is possible.
+ */
+#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
+ defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
+#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
+#else
+#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
+#endif
+
+/* Make modules code happy. We don't set RO yet */
+#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
+
+/* Advertise special mapping type for AGP */
+#define PAGE_AGP (PAGE_KERNEL_NC)
+#define HAVE_PAGE_AGP
+
#ifndef __ASSEMBLY__
/* Generic accessors to PTE bits */
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index cce60b3ba7d4..4d594039bca5 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -14,9 +14,6 @@
#ifndef _PAGE_WRITETHRU
#define _PAGE_WRITETHRU 0
#endif
-#ifndef _PAGE_SAO
-#define _PAGE_SAO 0
-#endif
/* _PAGE_RO and _PAGE_RW shall not be defined at the same time */
#ifndef _PAGE_RO
#define _PAGE_RO 0
@@ -61,35 +58,3 @@
*/
#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | \
_PAGE_ACCESSED | _PAGE_SPECIAL)
-
-/* Permission masks used for kernel mappings */
-#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
-#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
- _PAGE_NO_CACHE)
-#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
- _PAGE_NO_CACHE | _PAGE_GUARDED)
-#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
-#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
-#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
-
-/* Protection used for kernel text. We want the debuggers to be able to
- * set breakpoints anywhere, so don't write protect the kernel text
- * on platforms where such control is possible.
- */
-#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
- defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
-#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
-#else
-#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
-#endif
-
-/* Make modules code happy. We don't set RO yet */
-#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
-
-/* Advertise special mapping type for AGP */
-#define PAGE_AGP (PAGE_KERNEL_NC)
-#define HAVE_PAGE_AGP
-
-#ifndef H_PAGE_4K_PFN
-#define H_PAGE_4K_PFN 0
-#endif
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 20/24] powerpc/mm: Allow platforms to redefine some helpers
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (18 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 19/24] powerpc/nohash/64: do not include pte-common.h Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 21/24] powerpc/mm: Define platform default caches related flags Christophe Leroy
` (3 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
The 40xx defines _PAGE_HWWRITE while others don't.
The 8xx defines _PAGE_RO instead of _PAGE_RW.
The 8xx defines _PAGE_PRIVILEGED instead of _PAGE_USER.
The 8xx defines _PAGE_HUGE and _PAGE_NA while others don't.
Lets those platforms redefine pte_write(), pte_wrprotect() and
pte_mkwrite() and get _PAGE_RO and _PAGE_HWWRITE off the common
helpers.
Lets the 8xx redefine pte_user(), pte_mkprivileged() and pte_mkuser()
and get rid of _PAGE_PRIVILEGED and _PAGE_USER default values.
Lets the 8xx redefine pte_mkhuge() and get rid of
_PAGE_HUGE default value.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/32/pgtable.h | 16 ++++-----
arch/powerpc/include/asm/nohash/32/pte-40x.h | 16 +++++++++
arch/powerpc/include/asm/nohash/32/pte-8xx.h | 51 ++++++++++++++++++++++++++++
arch/powerpc/include/asm/nohash/64/pgtable.h | 4 ---
arch/powerpc/include/asm/nohash/pgtable.h | 24 +++++++++----
arch/powerpc/include/asm/pte-common.h | 24 -------------
6 files changed, 91 insertions(+), 44 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index a4156da4a7a4..ce9270a0ea42 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -136,14 +136,12 @@ extern int icache_44x_need_flush;
#define pte_clear(mm, addr, ptep) \
do { pte_update(ptep, ~0, 0); } while (0)
+#ifndef pte_mkwrite
static inline pte_t pte_mkwrite(pte_t pte)
{
- pte_basic_t ptev;
-
- ptev = pte_val(pte) & ~_PAGE_RO;
- ptev |= _PAGE_RW;
- return __pte(ptev);
+ return __pte(pte_val(pte) | _PAGE_RW);
}
+#endif
static inline pte_t pte_mkdirty(pte_t pte)
{
@@ -155,14 +153,12 @@ static inline pte_t pte_mkyoung(pte_t pte)
return __pte(pte_val(pte) | _PAGE_ACCESSED);
}
+#ifndef pte_wrprotect
static inline pte_t pte_wrprotect(pte_t pte)
{
- pte_basic_t ptev;
-
- ptev = pte_val(pte) & ~(_PAGE_RW | _PAGE_HWWRITE);
- ptev |= _PAGE_RO;
- return __pte(ptev);
+ return __pte(pte_val(pte) & ~_PAGE_RW);
}
+#endif
static inline pte_t pte_mkexec(pte_t pte)
{
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h
index 2b48bc289a4d..ab043b3e9b99 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-40x.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h
@@ -87,5 +87,21 @@
#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+#ifndef __ASSEMBLY__
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~(_PAGE_RW | _PAGE_HWWRITE));
+}
+
+#define pte_wrprotect pte_wrprotect
+
+static inline pte_t pte_mkclean(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~(_PAGE_DIRTY | _PAGE_HWWRITE));
+}
+
+#define pte_mkclean pte_mkclean
+#endif
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NOHASH_32_PTE_40x_H */
diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
index d06fc45bd9ac..b899c3c877ac 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
@@ -87,5 +87,56 @@
#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_RO)
#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_RO | _PAGE_EXEC)
+#ifndef __ASSEMBLY__
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_RO);
+}
+
+#define pte_wrprotect pte_wrprotect
+
+static inline int pte_write(pte_t pte)
+{
+ return !(pte_val(pte) & _PAGE_RO);
+}
+
+#define pte_write pte_write
+
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~_PAGE_RO);
+}
+
+#define pte_mkwrite pte_mkwrite
+
+static inline bool pte_user(pte_t pte)
+{
+ return !(pte_val(pte) & _PAGE_PRIVILEGED);
+}
+
+#define pte_user pte_user
+
+static inline pte_t pte_mkprivileged(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_PRIVILEGED);
+}
+
+#define pte_mkprivileged pte_mkprivileged
+
+static inline pte_t pte_mkuser(pte_t pte)
+{
+ return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);
+}
+
+#define pte_mkuser pte_mkuser
+
+static inline pte_t pte_mkhuge(pte_t pte)
+{
+ return __pte(pte_val(pte) | _PAGE_HUGE);
+}
+
+#define pte_mkhuge pte_mkhuge
+#endif
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NOHASH_32_PTE_8xx_H */
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h
index 9ccea94b3d4e..f272e4599803 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable.h
@@ -90,11 +90,7 @@
*/
#include <asm/nohash/pte-book3e.h>
-#define _PAGE_HWWRITE 0
#define _PAGE_SAO 0
-#define _PAGE_RO 0
-#define _PAGE_NA 0
-#define _PAGE_HUGE 0
#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index d3feeac19467..d7bc904bd231 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -38,10 +38,12 @@
#ifndef __ASSEMBLY__
/* Generic accessors to PTE bits */
+#ifndef pte_write
static inline int pte_write(pte_t pte)
{
- return (pte_val(pte) & (_PAGE_RW | _PAGE_RO)) != _PAGE_RO;
+ return pte_val(pte) & _PAGE_RW;
}
+#endif
static inline int pte_read(pte_t pte) { return 1; }
static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
@@ -83,10 +85,12 @@ static inline bool pte_hw_valid(pte_t pte)
* and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
* _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
*/
+#ifndef pte_user
static inline bool pte_user(pte_t pte)
{
- return (pte_val(pte) & (_PAGE_USER | _PAGE_PRIVILEGED)) == _PAGE_USER;
+ return (pte_val(pte) & _PAGE_USER) == _PAGE_USER;
}
+#endif
/*
* We only find page table entry in the last level
@@ -126,10 +130,12 @@ static inline pte_t pte_exprotect(pte_t pte)
return __pte(pte_val(pte) & ~_PAGE_EXEC);
}
+#ifndef pte_mkclean
static inline pte_t pte_mkclean(pte_t pte)
{
- return __pte(pte_val(pte) & ~(_PAGE_DIRTY | _PAGE_HWWRITE));
+ return __pte(pte_val(pte) & ~_PAGE_DIRTY);
}
+#endif
static inline pte_t pte_mkold(pte_t pte)
{
@@ -146,20 +152,26 @@ static inline pte_t pte_mkspecial(pte_t pte)
return __pte(pte_val(pte) | _PAGE_SPECIAL);
}
+#ifndef pte_mkhuge
static inline pte_t pte_mkhuge(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_HUGE);
+ return __pte(pte_val(pte));
}
+#endif
+#ifndef pte_mkprivileged
static inline pte_t pte_mkprivileged(pte_t pte)
{
- return __pte((pte_val(pte) & ~_PAGE_USER) | _PAGE_PRIVILEGED);
+ return __pte(pte_val(pte) & ~_PAGE_USER);
}
+#endif
+#ifndef pte_mkuser
static inline pte_t pte_mkuser(pte_t pte)
{
- return __pte((pte_val(pte) & ~_PAGE_PRIVILEGED) | _PAGE_USER);
+ return __pte(pte_val(pte) | _PAGE_USER);
}
+#endif
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index 4d594039bca5..1a2102f8b1e7 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -5,36 +5,12 @@
* Some bits are only used on some cpu families... Make sure that all
* the undefined gets a sensible default
*/
-#ifndef _PAGE_HWWRITE
-#define _PAGE_HWWRITE 0
-#endif
#ifndef _PAGE_COHERENT
#define _PAGE_COHERENT 0
#endif
#ifndef _PAGE_WRITETHRU
#define _PAGE_WRITETHRU 0
#endif
-/* _PAGE_RO and _PAGE_RW shall not be defined at the same time */
-#ifndef _PAGE_RO
-#define _PAGE_RO 0
-#else
-#define _PAGE_RW 0
-#endif
-
-/* At least one of _PAGE_PRIVILEGED or _PAGE_USER must be defined */
-#ifndef _PAGE_PRIVILEGED
-#define _PAGE_PRIVILEGED 0
-#else
-#ifndef _PAGE_USER
-#define _PAGE_USER 0
-#endif
-#endif
-#ifndef _PAGE_NA
-#define _PAGE_NA 0
-#endif
-#ifndef _PAGE_HUGE
-#define _PAGE_HUGE 0
-#endif
/* Location of the PFN in the PTE. Most 32-bit platforms use the same
* as _PAGE_SHIFT here (ie, naturally aligned).
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 21/24] powerpc/mm: Define platform default caches related flags
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (19 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 20/24] powerpc/mm: Allow platforms to redefine some helpers Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 22/24] powerpc/mm: Get rid of pte-common.h Christophe Leroy
` (2 subsequent siblings)
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Cache related flags like _PAGE_COHERENT and _PAGE_WRITETHRU
are defined on most platforms. The platforms not defining
them don't define any alternative. So we can give them a NUL
value directly for those platforms directly.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/32/pte-40x.h | 3 +++
arch/powerpc/include/asm/nohash/32/pte-8xx.h | 4 ++++
arch/powerpc/include/asm/pte-common.h | 11 -----------
3 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h
index ab043b3e9b99..7a8b3c94592f 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-40x.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h
@@ -53,6 +53,9 @@
/* No page size encoding in the linux PTE */
#define _PAGE_PSIZE 0
+/* cache related flags non existing on 40x */
+#define _PAGE_COHERENT 0
+
#define _PAGE_KERNEL_RO 0
#define _PAGE_KERNEL_ROX _PAGE_EXEC
#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
index b899c3c877ac..2b4669b3badb 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
@@ -46,6 +46,10 @@
#define _PAGE_NA 0x0200 /* Supervisor NA, User no access */
#define _PAGE_RO 0x0600 /* Supervisor RO, User no access */
+/* cache related flags non existing on 8xx */
+#define _PAGE_COHERENT 0
+#define _PAGE_WRITETHRU 0
+
#define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_RO)
#define _PAGE_KERNEL_ROX (_PAGE_PRIVILEGED | _PAGE_RO | _PAGE_EXEC)
#define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_DIRTY)
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index 1a2102f8b1e7..ff01368a175a 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -1,17 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* Included from asm/pgtable-*.h only ! */
-/*
- * Some bits are only used on some cpu families... Make sure that all
- * the undefined gets a sensible default
- */
-#ifndef _PAGE_COHERENT
-#define _PAGE_COHERENT 0
-#endif
-#ifndef _PAGE_WRITETHRU
-#define _PAGE_WRITETHRU 0
-#endif
-
/* Location of the PFN in the PTE. Most 32-bit platforms use the same
* as _PAGE_SHIFT here (ie, naturally aligned).
* Platform who don't just pre-define the value so we don't override it here
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 22/24] powerpc/mm: Get rid of pte-common.h
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (20 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 21/24] powerpc/mm: Define platform default caches related flags Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 23/24] powerpc/8xx: change name of a few page flags to avoid confusion Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 24/24] powerpc/book3s64: Avoid multiple endian conversion in pte helpers Christophe Leroy
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
Do not include pte-common.h in nohash/32/pgtable.h
As that was the last includer, get rid of pte-common.h
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/32/pgtable.h | 23 +++++++++++++++++++++--
arch/powerpc/include/asm/pte-common.h | 25 -------------------------
2 files changed, 21 insertions(+), 27 deletions(-)
delete mode 100644 arch/powerpc/include/asm/pte-common.h
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index ce9270a0ea42..d2908a8038e8 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -128,8 +128,27 @@ extern int icache_44x_need_flush;
#include <asm/nohash/32/pte-8xx.h>
#endif
-/* And here we include common definitions */
-#include <asm/pte-common.h>
+/* Location of the PFN in the PTE. Most 32-bit platforms use the same
+ * as _PAGE_SHIFT here (ie, naturally aligned).
+ * Platform who don't just pre-define the value so we don't override it here
+ */
+#ifndef PTE_RPN_SHIFT
+#define PTE_RPN_SHIFT (PAGE_SHIFT)
+#endif
+
+/* The mask covered by the RPN must be a ULL on 32-bit platforms with
+ * 64-bit PTEs
+ */
+#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
+#define PTE_RPN_MASK (~((1ULL << PTE_RPN_SHIFT) - 1))
+#else
+#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
+#endif
+
+/* _PAGE_CHG_MASK masks of bits that are to be preserved across
+ * pgprot changes
+ */
+#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPECIAL)
#ifndef __ASSEMBLY__
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
deleted file mode 100644
index ff01368a175a..000000000000
--- a/arch/powerpc/include/asm/pte-common.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/* Included from asm/pgtable-*.h only ! */
-
-/* Location of the PFN in the PTE. Most 32-bit platforms use the same
- * as _PAGE_SHIFT here (ie, naturally aligned).
- * Platform who don't just pre-define the value so we don't override it here
- */
-#ifndef PTE_RPN_SHIFT
-#define PTE_RPN_SHIFT (PAGE_SHIFT)
-#endif
-
-/* The mask covered by the RPN must be a ULL on 32-bit platforms with
- * 64-bit PTEs
- */
-#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
-#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
-#else
-#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
-#endif
-
-/* _PAGE_CHG_MASK masks of bits that are to be preserved across
- * pgprot changes
- */
-#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | \
- _PAGE_ACCESSED | _PAGE_SPECIAL)
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 23/24] powerpc/8xx: change name of a few page flags to avoid confusion
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (21 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 22/24] powerpc/mm: Get rid of pte-common.h Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
2018-10-09 13:52 ` [PATCH v3 24/24] powerpc/book3s64: Avoid multiple endian conversion in pte helpers Christophe Leroy
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
_PAGE_PRIVILEGED corresponds to the SH bit which doesn't protect
against user access but only disables ASID verification on kernel
accesses. User access is controlled with _PMD_USER flag.
Name it _PAGE_SH instead of _PAGE_PRIVILEGED
_PAGE_HUGE corresponds to the SPS bit which doesn't really tells
that's it is a huge page but only that it is not a 4k page.
Name it _PAGE_SPS instead of _PAGE_HUGE
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/nohash/32/pte-8xx.h | 28 ++++++++++++++--------------
arch/powerpc/kernel/head_8xx.S | 6 +++---
arch/powerpc/mm/8xx_mmu.c | 2 +-
arch/powerpc/mm/dump_linuxpagetables-8xx.c | 2 +-
4 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
index 2b4669b3badb..1c57efac089d 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
@@ -29,10 +29,10 @@
*/
/* Definitions for 8xx embedded chips. */
-#define _PAGE_PRESENT 0x0001 /* Page is valid */
-#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */
-#define _PAGE_PRIVILEGED 0x0004 /* No ASID (context) compare */
-#define _PAGE_HUGE 0x0008 /* SPS: Small Page Size (1 if 16k, 512k or 8M)*/
+#define _PAGE_PRESENT 0x0001 /* V: Page is valid */
+#define _PAGE_NO_CACHE 0x0002 /* CI: cache inhibit */
+#define _PAGE_SH 0x0004 /* SH: No ASID (context) compare */
+#define _PAGE_SPS 0x0008 /* SPS: Small Page Size (1 if 16k, 512k or 8M)*/
#define _PAGE_DIRTY 0x0100 /* C: page changed */
/* These 4 software bits must be masked out when the L2 entry is loaded
@@ -50,15 +50,15 @@
#define _PAGE_COHERENT 0
#define _PAGE_WRITETHRU 0
-#define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_RO)
-#define _PAGE_KERNEL_ROX (_PAGE_PRIVILEGED | _PAGE_RO | _PAGE_EXEC)
-#define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_DIRTY)
-#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_EXEC)
+#define _PAGE_KERNEL_RO (_PAGE_SH | _PAGE_RO)
+#define _PAGE_KERNEL_ROX (_PAGE_SH | _PAGE_RO | _PAGE_EXEC)
+#define _PAGE_KERNEL_RW (_PAGE_SH | _PAGE_DIRTY)
+#define _PAGE_KERNEL_RWX (_PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
/* Mask of bits returned by pte_pgprot() */
#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_NO_CACHE | \
_PAGE_ACCESSED | _PAGE_RO | _PAGE_NA | \
- _PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_EXEC)
+ _PAGE_SH | _PAGE_DIRTY | _PAGE_EXEC)
#define _PMD_PRESENT 0x0001
#define _PMD_PRESENT_MASK _PMD_PRESENT
@@ -74,7 +74,7 @@
#define PTE_ATOMIC_UPDATES 1
#ifdef CONFIG_PPC_16K_PAGES
-#define _PAGE_PSIZE _PAGE_HUGE
+#define _PAGE_PSIZE _PAGE_SPS
#else
#define _PAGE_PSIZE 0
#endif
@@ -115,28 +115,28 @@ static inline pte_t pte_mkwrite(pte_t pte)
static inline bool pte_user(pte_t pte)
{
- return !(pte_val(pte) & _PAGE_PRIVILEGED);
+ return !(pte_val(pte) & _PAGE_SH);
}
#define pte_user pte_user
static inline pte_t pte_mkprivileged(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_PRIVILEGED);
+ return __pte(pte_val(pte) | _PAGE_SH);
}
#define pte_mkprivileged pte_mkprivileged
static inline pte_t pte_mkuser(pte_t pte)
{
- return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);
+ return __pte(pte_val(pte) & ~_PAGE_SH);
}
#define pte_mkuser pte_mkuser
static inline pte_t pte_mkhuge(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_HUGE);
+ return __pte(pte_val(pte) | _PAGE_SPS);
}
#define pte_mkhuge pte_mkhuge
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 6582f824d620..134a573a9f2d 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -642,7 +642,7 @@ DTLBMissIMMR:
mtspr SPRN_MD_TWC, r10
mfspr r10, SPRN_IMMR /* Get current IMMR */
rlwinm r10, r10, 0, 0xfff80000 /* Get 512 kbytes boundary */
- ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_PRIVILEGED | _PAGE_DIRTY | \
+ ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
_PAGE_PRESENT | _PAGE_NO_CACHE
mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
@@ -660,7 +660,7 @@ DTLBMissLinear:
li r11, MD_PS8MEG | MD_SVALID | M_APG2
mtspr SPRN_MD_TWC, r11
rlwinm r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */
- ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_PRIVILEGED | _PAGE_DIRTY | \
+ ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
_PAGE_PRESENT
mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
@@ -679,7 +679,7 @@ ITLBMissLinear:
li r11, MI_PS8MEG | MI_SVALID | M_APG2
mtspr SPRN_MI_TWC, r11
rlwinm r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */
- ori r10, r10, 0xf0 | MI_SPS16K | _PAGE_PRIVILEGED | _PAGE_DIRTY | \
+ ori r10, r10, 0xf0 | MI_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
_PAGE_PRESENT
mtspr SPRN_MI_RPN, r10 /* Update TLB entry */
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index 9137361d687d..36484a2ef915 100644
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -67,7 +67,7 @@ void __init MMU_init_hw(void)
/* PIN up to the 3 first 8Mb after IMMR in DTLB table */
#ifdef CONFIG_PIN_TLB_DATA
unsigned long ctr = mfspr(SPRN_MD_CTR) & 0xfe000000;
- unsigned long flags = 0xf0 | MD_SPS16K | _PAGE_PRIVILEGED | _PAGE_DIRTY;
+ unsigned long flags = 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY;
#ifdef CONFIG_PIN_TLB_IMMR
int i = 29;
#else
diff --git a/arch/powerpc/mm/dump_linuxpagetables-8xx.c b/arch/powerpc/mm/dump_linuxpagetables-8xx.c
index 33f52a97975b..ab9e3f24db2f 100644
--- a/arch/powerpc/mm/dump_linuxpagetables-8xx.c
+++ b/arch/powerpc/mm/dump_linuxpagetables-8xx.c
@@ -11,7 +11,7 @@
static const struct flag_info flag_array[] = {
{
- .mask = _PAGE_PRIVILEGED,
+ .mask = _PAGE_SH,
.val = 0,
.set = "user",
.clear = " ",
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v3 24/24] powerpc/book3s64: Avoid multiple endian conversion in pte helpers
2018-10-09 13:51 [PATCH v3 00/24] ban the use of _PAGE_XXX flags outside platform specific code Christophe Leroy
` (22 preceding siblings ...)
2018-10-09 13:52 ` [PATCH v3 23/24] powerpc/8xx: change name of a few page flags to avoid confusion Christophe Leroy
@ 2018-10-09 13:52 ` Christophe Leroy
23 siblings, 0 replies; 42+ messages in thread
From: Christophe Leroy @ 2018-10-09 13:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt,
Dominik Brodowski, Geoff Levand, Jens Axboe, Kumar Gala, Li Yang,
Michael Ellerman, Nicholas Piggin, Paul Mackerras, Scott Wood,
aneesh.kumar
Cc: linux-arm-kernel, linux-block, linux-fbdev, linux-kernel,
linuxppc-dev, dri-devel
In the same spirit as already done in pte query helpers,
this patch changes pte setting helpers to perform endian
conversions on the constants rather than on the pte value.
In the meantime, it changes pte_access_permitted() to use
pte helpers for the same reason.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 71 +++++++++++++---------------
1 file changed, 32 insertions(+), 39 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index cf8dbd5f8f03..f0c79f370cf0 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -506,12 +506,12 @@ static inline bool pte_soft_dirty(pte_t pte)
static inline pte_t pte_mksoft_dirty(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SOFT_DIRTY));
}
static inline pte_t pte_clear_soft_dirty(pte_t pte)
{
- return __pte(pte_val(pte) & ~_PAGE_SOFT_DIRTY);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_SOFT_DIRTY));
}
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
@@ -532,7 +532,7 @@ static inline pte_t pte_mk_savedwrite(pte_t pte)
*/
VM_BUG_ON((pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX | _PAGE_PRIVILEGED)) !=
cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED));
- return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_PRIVILEGED));
}
#define pte_clear_savedwrite pte_clear_savedwrite
@@ -542,14 +542,14 @@ static inline pte_t pte_clear_savedwrite(pte_t pte)
* Used by KSM subsystem to make a protnone pte readonly.
*/
VM_BUG_ON(!pte_protnone(pte));
- return __pte(pte_val(pte) | _PAGE_PRIVILEGED);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_PRIVILEGED));
}
#else
#define pte_clear_savedwrite pte_clear_savedwrite
static inline pte_t pte_clear_savedwrite(pte_t pte)
{
VM_WARN_ON(1);
- return __pte(pte_val(pte) & ~_PAGE_WRITE);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_WRITE));
}
#endif /* CONFIG_NUMA_BALANCING */
@@ -578,25 +578,22 @@ static inline bool arch_pte_access_permitted(u64 pte, bool write, bool execute)
}
#endif /* CONFIG_PPC_MEM_KEYS */
+static inline bool pte_user(pte_t pte)
+{
+ return !(pte_raw(pte) & cpu_to_be64(_PAGE_PRIVILEGED));
+}
+
#define pte_access_permitted pte_access_permitted
static inline bool pte_access_permitted(pte_t pte, bool write)
{
- unsigned long pteval = pte_val(pte);
- /* Also check for pte_user */
- unsigned long clear_pte_bits = _PAGE_PRIVILEGED;
/*
* _PAGE_READ is needed for any access and will be
* cleared for PROT_NONE
*/
- unsigned long need_pte_bits = _PAGE_PRESENT | _PAGE_READ;
-
- if (write)
- need_pte_bits |= _PAGE_WRITE;
-
- if ((pteval & need_pte_bits) != need_pte_bits)
+ if (!pte_present(pte) || !pte_user(pte) || !pte_read(pte))
return false;
- if ((pteval & clear_pte_bits) == clear_pte_bits)
+ if (write && !pte_write(pte))
return false;
return arch_pte_access_permitted(pte_val(pte), write, 0);
@@ -625,32 +622,32 @@ static inline pte_t pte_wrprotect(pte_t pte)
{
if (unlikely(pte_savedwrite(pte)))
return pte_clear_savedwrite(pte);
- return __pte(pte_val(pte) & ~_PAGE_WRITE);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_WRITE));
}
static inline pte_t pte_exprotect(pte_t pte)
{
- return __pte(pte_val(pte) & ~_PAGE_EXEC);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_EXEC));
}
static inline pte_t pte_mkclean(pte_t pte)
{
- return __pte(pte_val(pte) & ~_PAGE_DIRTY);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_DIRTY));
}
static inline pte_t pte_mkold(pte_t pte)
{
- return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_ACCESSED));
}
static inline pte_t pte_mkexec(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_EXEC);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_EXEC));
}
static inline pte_t pte_mkpte(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_PTE);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_PTE));
}
static inline pte_t pte_mkwrite(pte_t pte)
@@ -658,22 +655,22 @@ static inline pte_t pte_mkwrite(pte_t pte)
/*
* write implies read, hence set both
*/
- return __pte(pte_val(pte) | _PAGE_RW);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_RW));
}
static inline pte_t pte_mkdirty(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_DIRTY | _PAGE_SOFT_DIRTY));
}
static inline pte_t pte_mkyoung(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_ACCESSED);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_ACCESSED));
}
static inline pte_t pte_mkspecial(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_SPECIAL);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SPECIAL));
}
static inline pte_t pte_mkhuge(pte_t pte)
@@ -683,17 +680,17 @@ static inline pte_t pte_mkhuge(pte_t pte)
static inline pte_t pte_mkdevmap(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SPECIAL | _PAGE_DEVMAP));
}
static inline pte_t pte_mkprivileged(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_PRIVILEGED);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_PRIVILEGED));
}
static inline pte_t pte_mkuser(pte_t pte)
{
- return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_PRIVILEGED));
}
/*
@@ -712,12 +709,8 @@ static inline int pte_devmap(pte_t pte)
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
/* FIXME!! check whether this need to be a conditional */
- return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
-}
-
-static inline bool pte_user(pte_t pte)
-{
- return !(pte_raw(pte) & cpu_to_be64(_PAGE_PRIVILEGED));
+ return __pte_raw((pte_raw(pte) & cpu_to_be64(_PAGE_CHG_MASK)) |
+ cpu_to_be64(pgprot_val(newprot)));
}
/* Encode and de-code a swap entry */
@@ -760,7 +753,7 @@ static inline bool pte_user(pte_t pte)
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
{
- return __pte(pte_val(pte) | _PAGE_SWP_SOFT_DIRTY);
+ return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SWP_SOFT_DIRTY));
}
static inline bool pte_swp_soft_dirty(pte_t pte)
@@ -770,7 +763,7 @@ static inline bool pte_swp_soft_dirty(pte_t pte)
static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
{
- return __pte(pte_val(pte) & ~_PAGE_SWP_SOFT_DIRTY);
+ return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_SWP_SOFT_DIRTY));
}
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
@@ -859,10 +852,10 @@ static inline pgprot_t pgprot_writecombine(pgprot_t prot)
*/
static inline bool pte_ci(pte_t pte)
{
- unsigned long pte_v = pte_val(pte);
+ __be64 pte_v = pte_raw(pte);
- if (((pte_v & _PAGE_CACHE_CTL) == _PAGE_TOLERANT) ||
- ((pte_v & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT))
+ if (((pte_v & cpu_to_be64(_PAGE_CACHE_CTL)) == cpu_to_be64(_PAGE_TOLERANT)) ||
+ ((pte_v & cpu_to_be64(_PAGE_CACHE_CTL)) == cpu_to_be64(_PAGE_NON_IDEMPOTENT)))
return true;
return false;
}
--
2.13.3
^ permalink raw reply related [flat|nested] 42+ messages in thread