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Subject: Re: [PATCH] clk: bcm: Add driver for Northstar ILP clock
To: Florian Fainelli <f.fainelli@gmail.com>,
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From: Ray Jui <ray.jui@broadcom.com>
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Date: Fri, 29 Jul 2016 13:59:05 -0700
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On 7/29/2016 1:55 PM, Florian Fainelli wrote:
> On 07/29/2016 01:52 PM, Rafał Miłecki wrote:
>> On 29 July 2016 at 22:49, Ray Jui <ray.jui@broadcom.com> wrote:
>>> On 7/29/2016 1:46 PM, Rafał Miłecki wrote:
>>>> On 29 July 2016 at 22:44, Ray Jui <ray.jui@broadcom.com> wrote:
>>>>>
>>>>> On 7/29/2016 5:58 AM, Rafał Miłecki wrote:
>>>>>>
>>>>>>
>>>>>> From: Rafał Miłecki <rafal@milecki.pl>
>>>>>>
>>>>>> This clock is present on cheaper Northstar devices like BCM53573 or
>>>>>> BCM47189 using Corex-A7. This driver uses PMU (Power Management Unit)
>>>>>> to calculate clock rate and allows using it in a generic (clk_*) way.
>>>>>>
>>>>>
>>>>> I thought Northstar uses Cortex A9 instead of A7?
>>>>
>>>>
>>>> [    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7),
>>>> cr=10c5387d
>>>> [    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
>>>> instruction cache
>>>> [    0.000000] Machine model: Tenda AC9
>>>>
>>>
>>> Yeah ARMv7 instruction set but the core is Cortex A7. Both Cortex A7 and A9
>>> use ARMv7 instructions.
>>
>> OK, sorry for irrelevant part then :)
>>
>> This is from BCM4709C0:
>> bcma: bus0: Core 10 found: ARM Cortex A9 core (ihost) (manuf 0x4BF, id
>> 0x510, rev 0x07, class 0x0)
>>
>> This is from BCM47189B0::
>> bcma: bus0: Core 3 found: ARM CA7 (manuf 0x4BF, id 0x847, rev 0x00, class 0x0)
>>
>
> This is indeed a Cortex A7-based chip, not clear if putting this chip in
> the Northstar family is accurate here because it really seems to have a
> different architecture from the NS/NSP family here...
>

Okay I got it. Good to know! I got confused by it being called 
"Northstar" because as far I can remember, none of the Northstar chips 
uses Cortex A7 (or maybe even that assumption is incorrect, :))

Thanks,

Ray