LKML Archive on lore.kernel.org
 help / Atom feed
* [PATCH] PCI: Add HXT vendor ID and ACS quirk
@ 2018-11-05  3:15 Shunyong Yang
  2018-11-05 23:12 ` Sinan Kaya
  0 siblings, 1 reply; 9+ messages in thread
From: Shunyong Yang @ 2018-11-05  3:15 UTC (permalink / raw)
  To: bhelgaas; +Cc: linux-pci, linux-kernel, okaya, Shunyong Yang, Joey Zheng

Add the HXT vendor ID to pci_ids.h and use it in quirks. As the
design of HXT SD4800 ACS feature is the same as QCOM QDF2xxx,
pci_quirk_qcom_rp_acs() is reused for SD4800 quirk.

Cc: Joey Zheng <yu.zheng@hxt-semitech.com>
Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>
---
 drivers/pci/quirks.c    | 2 ++
 include/linux/pci_ids.h | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 4700d24e5d55..1e00ef6a88f4 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4495,6 +4495,8 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
 	/* QCOM QDF2xxx root ports */
 	{ PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs },
 	{ PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
+	/* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */
+	{ PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs },
 	/* Intel PCH root ports */
 	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs },
 	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs },
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index f4e278493f5b..e3d7efb1442f 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2559,6 +2559,8 @@
 
 #define PCI_VENDOR_ID_AMAZON		0x1d0f
 
+#define PCI_VENDOR_ID_HXT		0x1dbf
+
 #define PCI_VENDOR_ID_TEKRAM		0x1de1
 #define PCI_DEVICE_ID_TEKRAM_DC290	0xdc29
 
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] PCI: Add HXT vendor ID and ACS quirk
  2018-11-05  3:15 [PATCH] PCI: Add HXT vendor ID and ACS quirk Shunyong Yang
@ 2018-11-05 23:12 ` Sinan Kaya
  2018-11-06  1:34   ` Yang, Shunyong
                     ` (2 more replies)
  0 siblings, 3 replies; 9+ messages in thread
From: Sinan Kaya @ 2018-11-05 23:12 UTC (permalink / raw)
  To: Shunyong Yang, bhelgaas; +Cc: linux-pci, linux-kernel, okaya, Joey Zheng

On 11/4/2018 7:15 PM, Shunyong Yang wrote:
> Add the HXT vendor ID to pci_ids.h and use it in quirks. As the
> design of HXT SD4800 ACS feature is the same as QCOM QDF2xxx,
> pci_quirk_qcom_rp_acs() is reused for SD4800 quirk.
> 
> Cc: Joey Zheng<yu.zheng@hxt-semitech.com>
> Signed-off-by: Shunyong Yang<shunyong.yang@hxt-semitech.com>

There is also a couple of hotplug quirks for QDF2400. You should
probably take care of those as well.

Assuming your PCI IDs are correct:

Reviewed-by: Sinan Kaya <okaya@kernel.org>

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] PCI: Add HXT vendor ID and ACS quirk
  2018-11-05 23:12 ` Sinan Kaya
@ 2018-11-06  1:34   ` Yang, Shunyong
  2018-11-07  7:24   ` [PATCH v2 1/2] " Shunyong Yang
  2018-11-07  7:25   ` [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata Shunyong Yang
  2 siblings, 0 replies; 9+ messages in thread
From: Yang, Shunyong @ 2018-11-06  1:34 UTC (permalink / raw)
  To: Sinan Kaya, bhelgaas; +Cc: linux-pci, linux-kernel, okaya, Zheng, Joey

Hi, Sinan,

On 2018/11/6 7:12, Sinan Kaya wrote:
> On 11/4/2018 7:15 PM, Shunyong Yang wrote:
>> Add the HXT vendor ID to pci_ids.h and use it in quirks. As the
>> design of HXT SD4800 ACS feature is the same as QCOM QDF2xxx,
>> pci_quirk_qcom_rp_acs() is reused for SD4800 quirk.
>>
>> Cc: Joey Zheng<yu.zheng@hxt-semitech.com>
>> Signed-off-by: Shunyong Yang<shunyong.yang@hxt-semitech.com>
> 
> There is also a couple of hotplug quirks for QDF2400. You should
> probably take care of those as well.
> 
> Assuming your PCI IDs are correct:
> 
> Reviewed-by: Sinan Kaya <okaya@kernel.org>
> 

Thanks for your review and information. I will check the changes.

Shunyong.

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [PATCH v2 1/2] PCI: Add HXT vendor ID and ACS quirk
  2018-11-05 23:12 ` Sinan Kaya
  2018-11-06  1:34   ` Yang, Shunyong
@ 2018-11-07  7:24   ` " Shunyong Yang
  2018-11-07  7:25   ` [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata Shunyong Yang
  2 siblings, 0 replies; 9+ messages in thread
From: Shunyong Yang @ 2018-11-07  7:24 UTC (permalink / raw)
  To: bhelgaas; +Cc: okaya, linux-pci, linux-kernel, Shunyong Yang, Joey Zheng

Add the HXT vendor ID to pci_ids.h and use it in quirks. As the
design of HXT SD4800 ACS feature is the same as QCOM QDF2xxx,
pci_quirk_qcom_rp_acs() is reused for SD4800 quirk.

cc: Joey Zheng <yu.zheng@hxt-semitech.com>
Reviewed-by: Sinan Kaya <okaya@kernel.org>
Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>

---
v2:
  Add Reviewed-by: Sinan Kaya.

v1:
  Initial version.
---

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 4700d24e5d55..1e00ef6a88f4 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4495,6 +4495,8 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
 	/* QCOM QDF2xxx root ports */
 	{ PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs },
 	{ PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
+	/* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */
+	{ PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs },
 	/* Intel PCH root ports */
 	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs },
 	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs },
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 69f0abe1ba1a..e60a6bc38298 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2565,6 +2565,8 @@
 
 #define PCI_VENDOR_ID_HYGON		0x1d94
 
+#define PCI_VENDOR_ID_HXT		0x1dbf
+
 #define PCI_VENDOR_ID_TEKRAM		0x1de1
 #define PCI_DEVICE_ID_TEKRAM_DC290	0xdc29
 
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 9+ messages in thread

* [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata
  2018-11-05 23:12 ` Sinan Kaya
  2018-11-06  1:34   ` Yang, Shunyong
  2018-11-07  7:24   ` [PATCH v2 1/2] " Shunyong Yang
@ 2018-11-07  7:25   ` Shunyong Yang
  2018-11-19  1:07     ` Yang, Shunyong
  2018-11-19 16:16     ` Keith Busch
  2 siblings, 2 replies; 9+ messages in thread
From: Shunyong Yang @ 2018-11-07  7:25 UTC (permalink / raw)
  To: bhelgaas; +Cc: okaya, linux-pci, linux-kernel, Shunyong Yang, Joey Zheng

The HXT SD4800 PCI controller does not set the Command Completed
bit unless writes to the Slot Command register change "Control"
bits.

This patch adds SD4800 to the quirk.

Cc: Joey Zheng <yu.zheng@hxt-semitech.com>
Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 7dd443aea5a5..91db67963aea 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
 			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
 			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
+			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata
  2018-11-07  7:25   ` [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata Shunyong Yang
@ 2018-11-19  1:07     ` Yang, Shunyong
  2018-12-07  2:31       ` Yang, Shunyong
  2018-11-19 16:16     ` Keith Busch
  1 sibling, 1 reply; 9+ messages in thread
From: Yang, Shunyong @ 2018-11-19  1:07 UTC (permalink / raw)
  To: bhelgaas; +Cc: okaya, linux-pci, linux-kernel, Zheng, Joey

Hi, Bjorn,
  Would you please help to review and pull these two quirk patches to
your branch if there is no problem?

Thanks.
Shunyong.

On 2018/11/7 15:24, Yang, Shunyong wrote:
> The HXT SD4800 PCI controller does not set the Command Completed
> bit unless writes to the Slot Command register change "Control"
> bits.
> 
> This patch adds SD4800 to the quirk.
> 
> Cc: Joey Zheng <yu.zheng@hxt-semitech.com>
> Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>
> 
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..91db67963aea 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
> +			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> 


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata
  2018-11-07  7:25   ` [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata Shunyong Yang
  2018-11-19  1:07     ` Yang, Shunyong
@ 2018-11-19 16:16     ` Keith Busch
  2018-11-20 10:19       ` Yang, Shunyong
  1 sibling, 1 reply; 9+ messages in thread
From: Keith Busch @ 2018-11-19 16:16 UTC (permalink / raw)
  To: Shunyong Yang; +Cc: bhelgaas, okaya, linux-pci, linux-kernel, Joey Zheng

On Wed, Nov 07, 2018 at 03:25:05PM +0800, Shunyong Yang wrote:
> The HXT SD4800 PCI controller does not set the Command Completed
> bit unless writes to the Slot Command register change "Control"
> bits.
> 
> This patch adds SD4800 to the quirk.
> 
> Cc: Joey Zheng <yu.zheng@hxt-semitech.com>
> Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>
> 
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..91db67963aea 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
> +			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);

I guess you're just appending to where this quirk is already defined,
but why are the quirks even in the core driver instead of pci/quirks.c?

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata
  2018-11-19 16:16     ` Keith Busch
@ 2018-11-20 10:19       ` Yang, Shunyong
  0 siblings, 0 replies; 9+ messages in thread
From: Yang, Shunyong @ 2018-11-20 10:19 UTC (permalink / raw)
  To: Keith Busch; +Cc: bhelgaas, okaya, linux-pci, linux-kernel, Zheng, Joey

Hi, Keith,

Following is the discussion adding the first quirk in this file,

https://lore.kernel.org/lkml/8770820b-85a0-172b-7230-3a44524e6c9f@molgen.mpg.de/T/#u


From the discussion, I guess putting the code here is to make it just
the quirk for pcie hotplug.

Thanks.
Shunyong.
On 2018/11/20 0:19, Keith Busch wrote:
> On Wed, Nov 07, 2018 at 03:25:05PM +0800, Shunyong Yang wrote:
>> The HXT SD4800 PCI controller does not set the Command Completed
>> bit unless writes to the Slot Command register change "Control"
>> bits.
>>
>> This patch adds SD4800 to the quirk.
>>
>> Cc: Joey Zheng <yu.zheng@hxt-semitech.com>
>> Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>
>>
>> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
>> index 7dd443aea5a5..91db67963aea 100644
>> --- a/drivers/pci/hotplug/pciehp_hpc.c
>> +++ b/drivers/pci/hotplug/pciehp_hpc.c
>> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
>>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
>>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
>> +			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> 
> I guess you're just appending to where this quirk is already defined,
> but why are the quirks even in the core driver instead of pci/quirks.c?
> 


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata
  2018-11-19  1:07     ` Yang, Shunyong
@ 2018-12-07  2:31       ` Yang, Shunyong
  0 siblings, 0 replies; 9+ messages in thread
From: Yang, Shunyong @ 2018-12-07  2:31 UTC (permalink / raw)
  To: bhelgaas; +Cc: okaya, linux-pci, linux-kernel, Zheng, Joey

Hi, Bjorn,
  Gentle ping for these two ID and quirk patches. Would you please help
to review and pull?
  Our PCI id is already registered at PCI SIG, following is the link,
    https://pcisig.com/membership/member-companies?combine=1dbf

Thanks.
Shunyong.
On 2018/11/19 9:07, Yang, Shunyong wrote:
> Hi, Bjorn,
>   Would you please help to review and pull these two quirk patches to
> your branch if there is no problem?
> 
> Thanks.
> Shunyong.
> 
> On 2018/11/7 15:24, Yang, Shunyong wrote:
>> The HXT SD4800 PCI controller does not set the Command Completed
>> bit unless writes to the Slot Command register change "Control"
>> bits.
>>
>> This patch adds SD4800 to the quirk.
>>
>> Cc: Joey Zheng <yu.zheng@hxt-semitech.com>
>> Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>
>>
>> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
>> index 7dd443aea5a5..91db67963aea 100644
>> --- a/drivers/pci/hotplug/pciehp_hpc.c
>> +++ b/drivers/pci/hotplug/pciehp_hpc.c
>> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
>>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
>>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
>> +			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>>
> 
> 


^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, back to index

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-11-05  3:15 [PATCH] PCI: Add HXT vendor ID and ACS quirk Shunyong Yang
2018-11-05 23:12 ` Sinan Kaya
2018-11-06  1:34   ` Yang, Shunyong
2018-11-07  7:24   ` [PATCH v2 1/2] " Shunyong Yang
2018-11-07  7:25   ` [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata Shunyong Yang
2018-11-19  1:07     ` Yang, Shunyong
2018-12-07  2:31       ` Yang, Shunyong
2018-11-19 16:16     ` Keith Busch
2018-11-20 10:19       ` Yang, Shunyong

LKML Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/lkml/0 lkml/git/0.git
	git clone --mirror https://lore.kernel.org/lkml/1 lkml/git/1.git
	git clone --mirror https://lore.kernel.org/lkml/2 lkml/git/2.git
	git clone --mirror https://lore.kernel.org/lkml/3 lkml/git/3.git
	git clone --mirror https://lore.kernel.org/lkml/4 lkml/git/4.git
	git clone --mirror https://lore.kernel.org/lkml/5 lkml/git/5.git
	git clone --mirror https://lore.kernel.org/lkml/6 lkml/git/6.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 lkml lkml/ https://lore.kernel.org/lkml \
		linux-kernel@vger.kernel.org linux-kernel@archiver.kernel.org
	public-inbox-index lkml


Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.kernel.vger.linux-kernel


AGPL code for this site: git clone https://public-inbox.org/ public-inbox