From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752778AbdEJIqb (ORCPT ); Wed, 10 May 2017 04:46:31 -0400 Received: from mx07-00252a01.pphosted.com ([62.209.51.214]:42494 "EHLO mx07-00252a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752344AbdEJIms (ORCPT ); Wed, 10 May 2017 04:42:48 -0400 Subject: Re: [PATCH] staging: vc04_services: Fix bulk cache maintenance To: Stefan Wahren , Greg Kroah-Hartman References: <139394270.264573.1493920270267@email.1und1.de> Cc: Lee Jones , linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org, daniels@collabora.com, linux-rpi-kernel , linux-arm-kernel@lists.infradead.org, =?UTF-8?Q?Noralf_Tr=c3=b8nnes?= From: Phil Elwell Message-ID: Date: Wed, 10 May 2017 09:42:43 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <139394270.264573.1493920270267@email.1und1.de> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-05-10_06:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_spam_notspam policy=outbound_spam score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1703280000 definitions=main-1705100061 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/05/2017 18:51, Stefan Wahren wrote: > >> Phil Elwell hat am 4. Mai 2017 um 11:58 geschrieben: >> >> >> vchiq_arm supports transfers less than one page and at arbitrary >> alignment, using the dma-mapping API to perform its cache maintenance >> (even though the VPU drives the DMA hardware). Read (DMA_FROM_DEVICE) >> operations use cache invalidation for speed, falling back to >> clean+invalidate on partial cache lines, with writes (DMA_TO_DEVICE) >> using flushes. >> >> If a read transfer has ends which aren't page-aligned, performing cache >> maintenance as if they were whole pages can lead to memory corruption >> since the partial cache lines at the ends (and any cache lines before or >> after the transfer area) will be invalidated. This bug was masked until >> the disabling of the cache flush in flush_dcache_page(). >> >> Honouring the requested transfer start- and end-points prevents the >> corruption. >> >> Fixes: cf9caf192988 ("staging: vc04_services: Replace dmac_map_area with dmac_map_sg") >> Signed-off-by: Phil Elwell > > Reported-by: Stefan Wahren > Tested-by: Stefan Wahren > > In order to clarify the context of this issue: > > http://lists.infradead.org/pipermail/linux-rpi-kernel/2017-April/006149.html Thanks, Stefan. Is there no feedback other on this patch? It's been in the rpi-4.11.y downstream branch for a week now with favourable results - see issue https://github.com/raspberrypi/linux/issues/1977 and pr https://github.com/raspberrypi/linux/pull/1987. Phil