linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Robin Murphy <robin.murphy@arm.com>
To: Qian Cai <cai@lca.pw>, will@kernel.org, catalin.marinas@arm.com
Cc: rrichter@cavium.com, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64/prefetch: fix a -Wtype-limits warning
Date: Sat, 3 Aug 2019 00:46:10 +0100	[thread overview]
Message-ID: <bf6c2590-6914-ea29-f973-ad6da084e942@arm.com> (raw)
In-Reply-To: <1564780084-29591-1-git-send-email-cai@lca.pw>

On 2019-08-02 10:08 pm, Qian Cai wrote:
> The commit d5370f754875 ("arm64: prefetch: add alternative pattern for
> CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be
> used in has_no_hw_prefetch() with rv_min=0 which generates a compilation
> warning from GCC,
> 
> In file included from ./arch/arm64/include/asm/cache.h:8,
>                   from ./include/linux/cache.h:6,
>                   from ./include/linux/printk.h:9,
>                   from ./include/linux/kernel.h:15,
>                   from ./include/linux/cpumask.h:10,
>                   from arch/arm64/kernel/cpufeature.c:11:
> arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch':
> ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of
> unsigned expression >= 0 is always true [-Wtype-limits]
>    _model == (model) && rv >= (rv_min) && rv <= (rv_max);  \
>                            ^~
> arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro
> 'MIDR_IS_CPU_MODEL_RANGE'
>    return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX,
>           ^~~~~~~~~~~~~~~~~~~~~~~
> 
> Fix it by making rv_min=1.

With what justification? Are you suggesting revision 0 variant 0 of this 
CPU has suddenly grown a prefetcher? Or that arbitrarily perturbing 
bounds until a warning shuts up is a fine development strategy, because 
a quiet build for people who like turning on random extra warnings is 
more important than correct functionality?

Robin.

> Signed-off-by: Qian Cai <cai@lca.pw>
> ---
>   arch/arm64/kernel/cpufeature.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index f29f36a65175..7d15cf6d62c1 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -883,7 +883,7 @@ static bool has_no_hw_prefetch(const struct arm64_cpu_capabilities *entry, int _
>   
>   	/* Cavium ThunderX pass 1.x and 2.x */
>   	return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX,
> -		MIDR_CPU_VAR_REV(0, 0),
> +		MIDR_CPU_VAR_REV(0, 1),
>   		MIDR_CPU_VAR_REV(1, MIDR_REVISION_MASK));
>   }
>   
> 

      reply	other threads:[~2019-08-02 23:46 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-02 21:08 [PATCH] arm64/prefetch: fix a -Wtype-limits warning Qian Cai
2019-08-02 23:46 ` Robin Murphy [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=bf6c2590-6914-ea29-f973-ad6da084e942@arm.com \
    --to=robin.murphy@arm.com \
    --cc=cai@lca.pw \
    --cc=catalin.marinas@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=rrichter@cavium.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).