From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19CC1C433EF for ; Wed, 6 Apr 2022 15:34:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236389AbiDFPgq (ORCPT ); Wed, 6 Apr 2022 11:36:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236342AbiDFPgM (ORCPT ); Wed, 6 Apr 2022 11:36:12 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6596C44A4D2; Wed, 6 Apr 2022 05:50:27 -0700 (PDT) X-UUID: 3e7fdf788b5b4bceaaa07a2a1ac9796e-20220406 X-UUID: 3e7fdf788b5b4bceaaa07a2a1ac9796e-20220406 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1457013016; Wed, 06 Apr 2022 20:49:33 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Wed, 6 Apr 2022 20:49:32 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 6 Apr 2022 20:49:32 +0800 Message-ID: Subject: Re: [PATCH 2/4] dt-bindings: cpufreq: mediatek: add mt8186 cpufreq dt-bindings From: Jia-Wei Chang To: Rob Herring CC: "Rafael J . Wysocki" , Viresh Kumar , Liam Girdwood , Mark Brown , Matthias Brugger , , , , , , , , , , , , Jia-Wei Chang Date: Wed, 6 Apr 2022 20:49:32 +0800 In-Reply-To: References: <20220307122151.11666-1-jia-wei.chang@mediatek.com> <20220307122151.11666-3-jia-wei.chang@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2022-03-10 at 14:44 -0600, Rob Herring wrote: > On Mon, Mar 07, 2022 at 08:21:49PM +0800, Tim Chang wrote: > > 1. add cci property. > > 2. add example of MT8186. > > > > Signed-off-by: Jia-Wei Chang < > > jia-wei.chang@mediatek.corp-partner.google.com> > > --- > > .../bindings/cpufreq/cpufreq-mediatek.yaml | 41 > > +++++++++++++++++++ > > 1 file changed, 41 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.yaml > > index 584946eb3790..d3ce17fd8fcf 100644 > > --- a/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.yaml > > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.yaml > > @@ -48,6 +48,10 @@ properties: > > When absent, the voltage scaling flow is handled by > > hardware, hence no > > software "voltage tracking" is needed. > > > > + cci: > > + description: > > + Phandle of the cci to be linked with the phandle of CPU if > > present. > > We already have a binding for this. See cci-control-port. Hi Rob, Pardon me for my late reply. It seems that "cci-control-port" is hardware IP from ARM. But mediatek-cpufreq uses MTK internal CCI hardware IP. I think I should keep this change here. Thanks. > > > + > > "#cooling-cells": > > description: > > For details, please refer to