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Mon, 15 Mar 2021 13:54:52 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 95A5FC4316A; Mon, 15 Mar 2021 13:54:50 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 15 Mar 2021 19:24:50 +0530 From: Sibi Sankar To: Rakesh Pillai Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: dts: qcom: sc7280: Add WPSS remoteproc node In-Reply-To: <1615361829-22370-1-git-send-email-pillair@codeaurora.org> References: <1615361829-22370-1-git-send-email-pillair@codeaurora.org> Message-ID: X-Sender: sibis@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-03-10 13:07, Rakesh Pillai wrote: > Add the WPSS remoteproc node in dts for > PIL loading. > > Signed-off-by: Rakesh Pillai > --- > - This change is dependent on the below patch series > 1) https://lore.kernel.org/patchwork/project/lkml/list/?series=487403 > 2) https://lore.kernel.org/patchwork/project/lkml/list/?series=488365 > --- > arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 +++ > arch/arm64/boot/dts/qcom/sc7280.dtsi | 47 > +++++++++++++++++++++++++++++++++ > 2 files changed, 51 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts > b/arch/arm64/boot/dts/qcom/sc7280-idp.dts > index 950ecb2..603f56b 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts > +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts > @@ -26,6 +26,10 @@ > status = "okay"; > }; > > +&remoteproc_wpss { > + status = "okay"; > +}; > + > &uart5 { > status = "okay"; > }; > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi > b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 8af6d77..26dd466 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -53,6 +53,16 @@ > no-map; > reg = <0x0 0x80b00000 0x0 0x100000>; > }; > + > + wlan_fw_mem: memory@80c00000 { > + no-map; > + reg = <0x0 0x80c00000 0x0 0xc00000>; > + }; > + > + wpss_mem: memory@9ae00000 { > + no-map; > + reg = <0x0 0x9ae00000 0x0 0x1900000>; > + }; The wpss mem shouldn't move into board specific dt. > }; > > cpus { > @@ -305,6 +315,43 @@ > }; > }; > > + remoteproc_wpss: remoteproc@8a00000 { > + compatible = "qcom,sc7280-wpss-pil"; please aim to add pas based support to boot wpss as well. > + reg = <0 0x08a00000 0 0x10000>; > + > + interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>, > + <&wpss_smp2p_in 0 0>, > + <&wpss_smp2p_in 1 0>, > + <&wpss_smp2p_in 2 0>, > + <&wpss_smp2p_in 3 0>, > + <&wpss_smp2p_in 7 0>; > + interrupt-names = "wdog", "fatal", "ready", "handover", > + "stop-ack", "shutdown-ack"; > + > + memory-region = <&wpss_mem>; > + looks like you missed adding clocks and power-domains mentioned in the bindings. > + qcom,smem-states = <&wpss_smp2p_out 0>; > + qcom,smem-state-names = "stop"; > + > + resets = <&aoss_reset AOSS_CC_WCSS_RESTART>; > + reset-names = "restart"; > + > + qcom,halt-regs = <&tcsr_mutex_regs 0x37000>; > + > + status = "disabled"; > + > + glink-edge { > + interrupts-extended = <&ipcc IPCC_CLIENT_WPSS > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + mboxes = <&ipcc IPCC_CLIENT_WPSS > + IPCC_MPROC_SIGNAL_GLINK_QMP>; > + > + label = "wpss"; > + qcom,remote-pid = <13>; > + }; > + }; > + > pdc: interrupt-controller@b220000 { > compatible = "qcom,sc7280-pdc", "qcom,pdc"; > reg = <0 0x0b220000 0 0x30000>; -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.