From: Paolo Bonzini <pbonzini@redhat.com>
To: "Huang, Kai" <kai.huang@intel.com>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Cc: "Christopherson, Sean J" <sean.j.christopherson@intel.com>,
"stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [PATCH v2] KVM: x86: use CPUID to locate host page table reserved bits
Date: Tue, 10 Dec 2019 10:18:51 +0100 [thread overview]
Message-ID: <c1012d42-6e60-66c9-80ea-f6c26db37172@redhat.com> (raw)
In-Reply-To: <2f3d8c9b146301183b891d8a441aa4a5c33b4c9d.camel@intel.com>
On 10/12/19 04:53, Huang, Kai wrote:
> Right. Alghouth both MKTME and SME/SEV reduce physical bits, but they treat
> those reduced bits differently: MKTME treats those as keyID thus they can be
> set, but SME/SEV treats those as reserved bits so you cannot set any of them.
>
> Maybe the naming of shadow_phys_bits is a little bit confusing here. The purpose
> of it was to determine first reserved bits, but not actual physical address bits
> . Therefore for MKTME it should include the keyID bits, but for SME/SEV it
> should not.
Not just the first reserved bit, but _some_ reserved bit such that all
consecutive bits up to bit 51 are reserved.
Paolo
next prev parent reply other threads:[~2019-12-10 9:18 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-04 15:40 [PATCH v2] KVM: x86: use CPUID to locate host page table reserved bits Paolo Bonzini
2019-12-04 15:48 ` Sean Christopherson
2019-12-10 9:19 ` Paolo Bonzini
2019-12-10 15:37 ` Sean Christopherson
2019-12-04 15:57 ` Tom Lendacky
2019-12-10 3:53 ` Huang, Kai
2019-12-10 9:18 ` Paolo Bonzini [this message]
2019-12-10 9:17 ` Paolo Bonzini
2019-12-11 0:11 ` Huang, Kai
2019-12-11 9:07 ` Paolo Bonzini
2019-12-11 20:48 ` Tom Lendacky
2019-12-11 23:16 ` Huang, Kai
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