From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD395C0015E for ; Wed, 5 Jul 2023 11:07:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231631AbjGELG7 (ORCPT ); Wed, 5 Jul 2023 07:06:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231539AbjGELGw (ORCPT ); Wed, 5 Jul 2023 07:06:52 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00F51172B; Wed, 5 Jul 2023 04:06:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688555211; x=1720091211; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=XJ46Pv64C/su0PPGz81/es6ZOwBNCUjsqmR0imBa+Fo=; b=aPGVFT4qIhWsLGJcVOQ/CU/IP7VaBHvbSGQlsOJjk+SuGeGd04GVMg+c 80ZIUo1B2dw41W4ZqzYEcSMuDlb+k7fQcQeJuRw6RL/QC4584uWTjiSKz KME8u6x2hh0eaogo73+eRm4D+vAqVGApVnhPKMEPjoSa8HzpzAhmg8SIi rOnWQYitoX7nBm53gf/FUEC2/Btg/m1uta47ay83JXUa1PSVBTsO/vyz/ 9qIiNmtGSjfgBQL/gWch+FWAHwjEx4uaZtjgdt7ivEy8a2R/5zv2TMuTg UGy5cZmHZMW8X4s9R97lDhySkTky8AIS2OteIeCCHrD/I+baSo/n0N+Gk g==; X-IronPort-AV: E=McAfee;i="6600,9927,10761"; a="394065781" X-IronPort-AV: E=Sophos;i="6.01,182,1684825200"; d="scan'208";a="394065781" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jul 2023 04:06:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10761"; a="809220027" X-IronPort-AV: E=Sophos;i="6.01,182,1684825200"; d="scan'208";a="809220027" Received: from naamamex-mobl.ger.corp.intel.com (HELO [10.13.12.63]) ([10.13.12.63]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jul 2023 04:06:47 -0700 Message-ID: Date: Wed, 5 Jul 2023 14:06:37 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [Intel-wired-lan] [PATCH net v2 5/6] igc: Fix launchtime before start of cycle To: Florian Kauer , Jesse Brandeburg , Tony Nguyen , Vinicius Costa Gomes , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Tan Tee Min , Muhammad Husaini Zulkifli , Aravindhan Gunasekaran , Malli C Cc: netdev@vger.kernel.org, kurt@linutronix.de, intel-wired-lan@lists.osuosl.org, linux-kernel@vger.kernel.org References: <20230619100858.116286-1-florian.kauer@linutronix.de> <20230619100858.116286-6-florian.kauer@linutronix.de> Content-Language: en-US From: "naamax.meir" In-Reply-To: <20230619100858.116286-6-florian.kauer@linutronix.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/19/2023 13:08, Florian Kauer wrote: > It is possible (verified on a running system) that frames are processed > by igc_tx_launchtime with a txtime before the start of the cycle > (baset_est). > > However, the result of txtime - baset_est is written into a u32, > leading to a wrap around to a positive number. The following > launchtime > 0 check will only branch to executing launchtime = 0 > if launchtime is already 0. > > Fix it by using a s32 before checking launchtime > 0. > > Fixes: db0b124f02ba ("igc: Enhance Qbv scheduling by using first flag bit") > Signed-off-by: Florian Kauer > Reviewed-by: Kurt Kanzenbach > --- > drivers/net/ethernet/intel/igc/igc_main.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Tested-by: Naama Meir