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From: Steven Price <steven.price@arm.com>
To: Zengruan Ye <yezengruan@huawei.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	linux-doc@vger.kernel.org,
	virtualization@lists.linux-foundation.org
Cc: maz@kernel.org, james.morse@arm.com, linux@armlinux.org.uk,
	suzuki.poulose@arm.com, julien.thierry.kdev@gmail.com,
	catalin.marinas@arm.com, mark.rutland@arm.com, will@kernel.org,
	daniel.lezcano@linaro.org
Subject: Re: [PATCH v2 1/6] KVM: arm64: Document PV-lock interface
Date: Thu, 9 Jan 2020 14:53:08 +0000
Message-ID: <c26ebc8d-6a10-6bc4-0af8-cd4883addbf0@arm.com> (raw)
In-Reply-To: <20191226135833.1052-2-yezengruan@huawei.com>

On 26/12/2019 13:58, Zengruan Ye wrote:
> Introduce a paravirtualization interface for KVM/arm64 to obtain the VCPU
> is currently running or not.
> 
> The PV lock structure of the guest is allocated by user space.
> 
> A hypercall interface is provided for the guest to interrogate the
> hypervisor's support for this interface and the location of the shared
> memory structures.
> 
> Signed-off-by: Zengruan Ye <yezengruan@huawei.com>
> ---
>   Documentation/virt/kvm/arm/pvlock.rst   | 63 +++++++++++++++++++++++++
>   Documentation/virt/kvm/devices/vcpu.txt | 14 ++++++
>   2 files changed, 77 insertions(+)
>   create mode 100644 Documentation/virt/kvm/arm/pvlock.rst
> 
> diff --git a/Documentation/virt/kvm/arm/pvlock.rst b/Documentation/virt/kvm/arm/pvlock.rst
> new file mode 100644
> index 000000000000..58b3b8ee7537
> --- /dev/null
> +++ b/Documentation/virt/kvm/arm/pvlock.rst
> @@ -0,0 +1,63 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +Paravirtualized lock support for arm64
> +======================================
> +
> +KVM/arm64 provides some hypervisor service calls to support a paravirtualized
> +guest obtaining the VCPU is currently running or not.
NIT:              ^ whether

> +
> +Two new SMCCC compatible hypercalls are defined:
> +
> +* PV_LOCK_FEATURES:   0xC6000020
> +* PV_LOCK_PREEMPTED:  0xC6000021
> +
> +The existence of the PV_LOCK hypercall should be probed using the SMCCC 1.1
> +ARCH_FEATURES mechanism before calling it.

Since these are within the "vendor specific" SMCCC region ideally you should also check that you are talking to KVM. (Other hypervisors could allocate SMCCC IDs differently within this block). Will has a patch on a branch which gives an example of how this could work [1]

[1] https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/commit/?h=kvm/hvc&id=464f5a1741e5959c3e4d2be1966ae0093b4dce06

> +
> +PV_LOCK_FEATURES
> +    ============= ========    ==========
> +    Function ID:  (uint32)    0xC6000020
> +    PV_call_id:   (uint32)    The function to query for support.
> +    Return value: (int64)     NOT_SUPPORTED (-1) or SUCCESS (0) if the relevant
> +                              PV-lock feature is supported by the hypervisor.
> +    ============= ========    ==========
> +
> +PV_LOCK_PREEMPTED
> +    ============= ========    ==========
> +    Function ID:  (uint32)    0xC6000021
> +    Return value: (int64)     NOT_SUPPORTED (-1) or SUCCESS (0) if the IPA of
> +                              this VCPU's pv data structure is configured by
> +                              the hypervisor.
> +    ============= ========    ==========

PV_LOCK_PREEMPTED also needs to return the address of this data structure. Either by returning this in another register, or by e.g. treating a positive return as an address and a negative value as an error.

> +
> +The IPA returned by PV_LOCK_PREEMPTED should be mapped by the guest as normal
> +memory with inner and outer write back caching attributes, in the inner
> +shareable domain.
> +
> +PV_LOCK_PREEMPTED returns the structure for the calling VCPU.
> +
> +PV lock state
> +-------------
> +
> +The structure pointed to by the PV_LOCK_PREEMPTED hypercall is as follows:
> +
> ++-----------+-------------+-------------+---------------------------------+
> +| Field     | Byte Length | Byte Offset | Description                     |
> ++===========+=============+=============+=================================+
> +| preempted |      8      |      0      | Indicate the VCPU who owns this |

NIT: s/Indicate/Indicates that/. Also more common English would be "the VCPU *that* owns"

> +|           |             |             | struct is running or not.       |
> +|           |             |             | Non-zero values mean the VCPU   |
> +|           |             |             | has been preempted. Zero means  |
> +|           |             |             | the VCPU is not preempted.      |
> ++-----------+-------------+-------------+---------------------------------+
> +
> +The preempted field will be updated to 1 by the hypervisor prior to scheduling
> +a VCPU. When the VCPU is scheduled out, the preempted field will be updated
> +to 0 by the hypervisor.
> +
> +The structure will be present within a reserved region of the normal memory
> +given to the guest. The guest should not attempt to write into this memory.
> +There is a structure per VCPU of the guest.

I think it would be worth mentioning in this document that the structure is guaranteed to be 64-byte aligned.

Steve

> +
> +For the user space interface see Documentation/virt/kvm/devices/vcpu.txt
> +section "4. GROUP: KVM_ARM_VCPU_PVLOCK_CTRL".
> diff --git a/Documentation/virt/kvm/devices/vcpu.txt b/Documentation/virt/kvm/devices/vcpu.txt
> index 6f3bd64a05b0..c10a5945075b 100644
> --- a/Documentation/virt/kvm/devices/vcpu.txt
> +++ b/Documentation/virt/kvm/devices/vcpu.txt
> @@ -74,3 +74,17 @@ Specifies the base address of the stolen time structure for this VCPU. The
>   base address must be 64 byte aligned and exist within a valid guest memory
>   region. See Documentation/virt/kvm/arm/pvtime.txt for more information
>   including the layout of the stolen time structure.
> +
> +4. GROUP: KVM_ARM_VCPU_PVLOCK_CTRL
> +Architectures: ARM64
> +
> +4.1 ATTRIBUTE: KVM_ARM_VCPU_PVLOCK_IPA
> +Parameters: 64-bit base address
> +Returns: -ENXIO:  PV lock not implemented
> +         -EEXIST: Base address already set for this VCPU
> +         -EINVAL: Base address not 64 byte aligned
> +
> +Specifies the base address of the PV lock structure for this VCPU. The
> +base address must be 64 byte aligned and exist within a valid guest memory
> +region. See Documentation/virt/kvm/arm/pvlock.rst for more information
> +including the layout of the pv lock structure.
> 


  reply index

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-26 13:58 [PATCH v2 0/6] KVM: arm64: VCPU preempted check support Zengruan Ye
2019-12-26 13:58 ` [PATCH v2 1/6] KVM: arm64: Document PV-lock interface Zengruan Ye
2020-01-09 14:53   ` Steven Price [this message]
2020-01-11  6:51     ` yezengruan
2019-12-26 13:58 ` [PATCH v2 2/6] KVM: arm64: Add SMCCC paravirtualised lock calls Zengruan Ye
2019-12-26 13:58 ` [PATCH v2 3/6] KVM: arm64: Support pvlock preempted via shared structure Zengruan Ye
2020-01-09 15:02   ` Steven Price
2020-01-11  7:30     ` yezengruan
2020-01-13 10:31       ` Steven Price
2019-12-26 13:58 ` [PATCH v2 4/6] KVM: arm64: Provide VCPU attributes for PV lock Zengruan Ye
2019-12-26 13:58 ` [PATCH v2 5/6] KVM: arm64: Add interface to support VCPU preempted check Zengruan Ye
2019-12-26 18:51   ` kbuild test robot
2019-12-27  6:52     ` yezengruan
2019-12-26 13:58 ` [PATCH v2 6/6] KVM: arm64: Support the VCPU preemption check Zengruan Ye
2020-01-09 15:09   ` Steven Price
2020-01-11  7:33     ` yezengruan
2020-01-13 12:12 ` [PATCH v2 0/6] KVM: arm64: VCPU preempted check support Will Deacon
2020-01-15 14:14   ` Marc Zyngier

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