From: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
Michael Walle <michael@walle.cc>, Pratyush Yadav <p.yadav@ti.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Subject: [PATCH v2 2/2] mtd: spi-nor: micron-st: add support for mt25ql01g and mt25qu01g
Date: Thu, 7 Oct 2021 14:08:12 +0200 [thread overview]
Message-ID: <c347908fd453fadf673000144cdbdf63c51db303.1633607826.git.matthias.schiffer@ew.tq-group.com> (raw)
In-Reply-To: <a69181ccf225424a8bd11349aad0df7face9715e.1633607826.git.matthias.schiffer@ew.tq-group.com>
In-Reply-To: <a69181ccf225424a8bd11349aad0df7face9715e.1633607826.git.matthias.schiffer@ew.tq-group.com>
Split these mt25q models from the older n25q models by matching their
extended IDs to allow adding support for 4byte opcodes.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
---
v2: add NO_CHIP_ERASE
drivers/mtd/spi-nor/micron-st.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index a000a0790ecd..6593b6ebe0da 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -172,11 +172,19 @@ static const struct flash_info st_parts[] = {
SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
+ { "mt25ql01g", INFO6(0x20ba21, 0x104400, 64 * 1024, 2048,
+ SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
+ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ NO_CHIP_ERASE) },
{ "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048,
SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6 |
NO_CHIP_ERASE) },
+ { "mt25qu01g", INFO6(0x20bb21, 0x104400, 64 * 1024, 2048,
+ SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
+ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ NO_CHIP_ERASE) },
{ "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048,
SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
NO_CHIP_ERASE) },
--
2.17.1
next prev parent reply other threads:[~2021-10-07 12:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-07 12:08 [PATCH v2 1/2] mtd: spi-nor: micron-st: make mt25ql02g/mt25qu02g match more specific, add 4B opcodes Matthias Schiffer
2021-10-07 12:08 ` Matthias Schiffer [this message]
2021-12-02 9:20 ` Matthias Schiffer
2021-12-16 18:52 ` Pratyush Yadav
2021-12-17 10:07 ` Matthias Schiffer
2021-12-17 10:37 ` Pratyush Yadav
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