From: "Singh, Balbir" <sblbir@amazon.com>
To: "tglx@linutronix.de" <tglx@linutronix.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: "keescook@chromium.org" <keescook@chromium.org>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"benh@kernel.crashing.org" <benh@kernel.crashing.org>,
"jpoimboe@redhat.com" <jpoimboe@redhat.com>,
"x86@kernel.org" <x86@kernel.org>,
"dave.hansen@intel.com" <dave.hansen@intel.com>
Subject: Re: [PATCH v6 5/6] Optionally flush L1D on context switch
Date: Thu, 14 May 2020 07:43:34 +0000 [thread overview]
Message-ID: <c51109f10f6572f5cf60d2693f84ff8e65c7804a.camel@amazon.com> (raw)
In-Reply-To: <875zcz3j47.fsf@nanos.tec.linutronix.de>
On Wed, 2020-05-13 at 18:16 +0200, Thomas Gleixner wrote:
> Balbir Singh <sblbir@amazon.com> writes:
>
> This part:
>
> > --- a/include/uapi/linux/prctl.h
> > +++ b/include/uapi/linux/prctl.h
> > @@ -238,4 +238,8 @@ struct prctl_mm_map {
> > #define PR_SET_IO_FLUSHER 57
> > #define PR_GET_IO_FLUSHER 58
> >
> > +/* Flush L1D on context switch (mm) */
> > +#define PR_SET_L1D_FLUSH 59
> > +#define PR_GET_L1D_FLUSH 60
>
> ...
>
> > @@ -2514,6 +2524,16 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned
> > long, arg2, unsigned long, arg3,
> >
> > error = (current->flags & PR_IO_FLUSHER) ==
> > PR_IO_FLUSHER;
> > break;
> > + case PR_SET_L1D_FLUSH:
> > + if (arg3 || arg4 || arg5)
> > + return -EINVAL;
> > + error = arch_prctl_l1d_flush_set(me, arg2);
> > + break;
> > + case PR_GET_L1D_FLUSH:
> > + if (arg2 || arg3 || arg4 || arg5)
> > + return -EINVAL;
> > + error = arch_prctl_l1d_flush_get(me);
> > + break;
> > default:
> > error = -EINVAL;
> > break;
>
> wants to be split into a separate patch, really. Then we get a proper
> subject lines with proper subsystem prefixes. This part also lacks a
> description in Documentation/userspace-api/ and function prototypes
> for
> the arch_prctl* functions.
>
> But looking at this deeper (yes I should have noticed earlier):
>
> Why do we need yet another PRCTL?
>
> We already have PR_SET_SPECULATION_CTRL/PR_GET_SPECULATION_CTRL. That
> L1D flush thingy fits into this category, right?
It does, I thought about it for a while when I was changing the code and
left it aside because, looking at the definition
1 PR_SPEC_ENABLE The speculation feature is enabled,
mitigation is disabled.
2 PR_SPEC_DISABLE The speculation feature is disabled,
mitigation is enabled.
With L1D flush, there is no overriding of the feature as such (as in
enable when the mitigation is disabled and vice-versa). I am happy to
reconsider my initial thought though.
>
> This makes even more sense if you think about the second use case for
> L1D flush, i.e. the flush when a untrusted task comes in. If we ever
> want to support that case then this will be imposed by seccomp and
> then
> we'd need yet another interface there.
>
Yep, I see what you mean
> And for this reason we should also name that current opt-in thingy:
> L1D_FLUSH_OUT in the prctl and also for the TIF bits.
>
> Hmm? Kees?
>
> I've applied the first 4 patches to:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/mm
>
> so the polishing I did gets preserved and you don't have to resend the
> whole pile.
>
Thanks, I think your change to patch 6 makes sense as well. Let me
respin this based on what you think of the argument above
Balbir
next prev parent reply other threads:[~2020-05-14 7:43 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-10 1:47 [PATCH v6 0/6] Optionally flush L1D on context switch Balbir Singh
2020-05-10 1:47 ` [PATCH v6 1/6] arch/x86/kvm: Refactor l1d flush lifecycle management Balbir Singh
2020-05-13 13:35 ` Thomas Gleixner
2020-05-14 8:23 ` Singh, Balbir
2020-05-13 13:53 ` Thomas Gleixner
2020-05-14 8:25 ` Singh, Balbir
2020-05-22 9:32 ` [tip: x86/mm] x86/kvm: Refactor L1D flush page management tip-bot2 for Balbir Singh
2020-05-10 1:47 ` [PATCH v6 2/6] arch/x86/kvm: Refactor tlbflush and l1d flush Balbir Singh
2020-05-22 9:32 ` [tip: x86/mm] x86/kvm: Refactor L1D flush operations tip-bot2 for Balbir Singh
2020-05-10 1:48 ` [PATCH v6 3/6] arch/x86/mm: Refactor cond_ibpb() to support other use cases Balbir Singh
2020-05-13 14:16 ` Thomas Gleixner
2020-05-22 9:32 ` [tip: x86/mm] x86/mm: " tip-bot2 for Balbir Singh
2020-09-16 13:11 ` [tip: x86/pti] " tip-bot2 for Balbir Singh
2020-05-10 1:48 ` [PATCH v6 4/6] arch/x86/kvm: Refactor L1D flushing Balbir Singh
2020-05-22 9:32 ` [tip: x86/mm] x86/kvm: " tip-bot2 for Balbir Singh
2020-05-10 1:48 ` [PATCH v6 5/6] Optionally flush L1D on context switch Balbir Singh
2020-05-13 15:04 ` Thomas Gleixner
2020-05-14 8:23 ` Singh, Balbir
2020-05-13 15:27 ` Thomas Gleixner
2020-05-14 21:28 ` Singh, Balbir
2020-05-13 16:16 ` Thomas Gleixner
2020-05-14 7:43 ` Singh, Balbir [this message]
2020-05-14 11:33 ` Thomas Gleixner
2020-05-10 1:48 ` [PATCH v6 6/6] Documentation: Add L1D flushing Documentation Balbir Singh
2020-05-13 13:33 ` Thomas Gleixner
2020-05-14 1:12 ` Singh, Balbir
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