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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id fq2-20020a1709069d8200b006efdd9baaa7sm652738ejc.196.2022.04.19.04.41.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 Apr 2022 04:41:56 -0700 (PDT) Message-ID: Date: Tue, 19 Apr 2022 13:41:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH v8 01/13] arm64: dts: freescale: Add the top level dtsi support for imx8dxl Content-Language: en-US To: Abel Vesa , Rob Herring , Ulf Hansson , Shawn Guo , Sascha Hauer Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, Linux Kernel Mailing List , linux-mmc@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jacky Bai References: <20220419113516.1827863-1-abel.vesa@nxp.com> <20220419113516.1827863-2-abel.vesa@nxp.com> From: Krzysztof Kozlowski In-Reply-To: <20220419113516.1827863-2-abel.vesa@nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 19/04/2022 13:35, Abel Vesa wrote: > From: Jacky Bai > > The i.MX8DXL is a device targeting the automotive and industrial > market segments. The flexibility of the architecture allows for > use in a wide variety of general embedded applications. The chip > is designed to achieve both high performance and low power consumption. > The chip relies on the power efficient dual (2x) Cortex-A35 cluster. > > Add the reserved memory node property for dsp reserved memory, > the wakeup-irq property for SCU node, the rpmsg and the cm4 rproc > support. > > Signed-off-by: Jacky Bai > Signed-off-by: Abel Vesa (...) > + thermal_zones: thermal-zones { > + cpu-thermal0 { Same concerns as you DTS. > + polling-delay-passive = <250>; > + polling-delay = <2000>; > + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; > + > + trips { > + cpu_alert0: trip0 { > + temperature = <107000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu_crit0: trip1 { > + temperature = <127000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&cpu_alert0>; > + cooling-device = > + <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + }; > + > + clk_dummy: clock-dummy { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + clock-output-names = "clk_dummy"; > + }; > + > + xtal32k: clock-xtal32k { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <32768>; > + clock-output-names = "xtal_32KHz"; > + }; > + > + xtal24m: clock-xtal24m { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <24000000>; > + clock-output-names = "xtal_24MHz"; > + }; > + > + /* sorted in register address */ > + #include "imx8-ss-adma.dtsi" > + #include "imx8-ss-conn.dtsi" > + #include "imx8-ss-ddr.dtsi" > + #include "imx8-ss-lsio.dtsi" > +}; > + > +#include "imx8dxl-ss-adma.dtsi" There is no such file. Your changes are not bisectable. > +#include "imx8dxl-ss-conn.dtsi" > +#include "imx8dxl-ss-lsio.dtsi" > +#include "imx8dxl-ss-ddr.dtsi" Best regards, Krzysztof