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From: Alexey Budankov <alexey.budankov@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>,
	Ingo Molnar <mingo@redhat.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
	Andi Kleen <ak@linux.intel.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	Stephane Eranian <eranian@google.com>,
	Ian Rogers <irogers@google.com>, Song Liu <songliubraving@fb.com>,
	linux-kernel <linux-kernel@vger.kernel.org>
Subject: [PATCH v3 1/4] perf/core,x86: introduce sync_task_ctx() method at struct pmu
Date: Fri, 18 Oct 2019 12:42:44 +0300	[thread overview]
Message-ID: <c75134ef-b71b-c080-8ee1-c09fb9fae764@linux.intel.com> (raw)
In-Reply-To: <0b20a07f-d074-d3da-7551-c9a4a94fe8e3@linux.intel.com>


Declare sync_task_ctx() methods at the generic and x86 specific
pmu types to bridge calls to platform specific pmu code on optimized
context switch path between equivalent task perf event contexts.

Signed-off-by: Alexey Budankov <alexey.budankov@linux.intel.com>
---
 arch/x86/events/perf_event.h | 8 ++++++++
 include/linux/perf_event.h   | 7 +++++++
 2 files changed, 15 insertions(+)

diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index ecacfbf4ebc1..a25e6d7eb87b 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -682,6 +682,14 @@ struct x86_pmu {
 	 */
 	atomic_t	lbr_exclusive[x86_lbr_exclusive_max];
 
+	/*
+	 * perf task context (i.e. struct perf_event_context::task_ctx_data) switch helper
+	 * to bridge calls from perf/core to perf/x86. See struct pmu::sync_task_ctx() usage
+	 * for examples;
+	 */
+	void		(*sync_task_ctx)(struct x86_perf_task_context *one,
+					 struct x86_perf_task_context *another);
+
 	/*
 	 * AMD bits
 	 */
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 61448c19a132..60bf17af69f0 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -409,6 +409,13 @@ struct pmu {
 	 */
 	size_t				task_ctx_size;
 
+	/*
+	 * PMU specific parts of task perf event context (i.e. ctx->task_ctx_data)
+	 * can be synchronized using this function. See Intel LBR callstack support
+	 * implementation and Perf core context switch handling callbacks for usage
+	 * examples.
+	 */
+	void (*sync_task_ctx)		(void *one, void *another);
 
 	/*
 	 * Set up pmu-private data structures for an AUX area
-- 
2.20.1


  reply	other threads:[~2019-10-18  9:42 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-18  9:17 [PATCH v3 0/4]: perf/core: fix restoring of Intel LBR call stack on a context switch Alexey Budankov
2019-10-18  9:42 ` Alexey Budankov [this message]
2019-10-21 10:27   ` [PATCH v3 1/4] perf/core,x86: introduce sync_task_ctx() method at struct pmu Peter Zijlstra
2019-10-21 11:24     ` Alexey Budankov
2019-10-18  9:43 ` [PATCH v3 2/4] perf/x86: install platform specific sync_task_ctx adapter Alexey Budankov
2019-10-18  9:44 ` [PATCH v3 3/4] perf/x86/intel: implement LBR callstacks context synchronization Alexey Budankov
2019-10-18  9:45 ` [PATCH v3 4/4] perf/core,x86: synchronize PMU task contexts on optimized context switches Alexey Budankov
2019-10-21  7:59   ` Ingo Molnar
2019-10-21 10:00     ` Alexey Budankov
2019-10-21 10:37     ` Peter Zijlstra
  -- strict thread matches above, loose matches on Subject: below --
2019-10-16 14:20 [PATCH v3 0/4]: perf/core: fix restoring of Intel LBR call stack on a context switch Alexey Budankov
2019-10-16 14:25 ` [PATCH v3 1/4] perf/core,x86: introduce sync_task_ctx() method at struct pmu Alexey Budankov

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