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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id bd28sm1253823ljb.134.2021.12.06.00.14.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Dec 2021 00:14:47 -0800 (PST) Message-ID: Date: Mon, 6 Dec 2021 09:14:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.1 Subject: Re: [PATCH v3 6/7] clk: samsung: Add initial Exynos7885 clock driver Content-Language: en-US To: David Virag Cc: Sam Protsenko , Rob Herring , Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org References: <20211205230804.202292-1-virag.david003@gmail.com> <20211205230804.202292-7-virag.david003@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20211205230804.202292-7-virag.david003@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/12/2021 00:08, David Virag wrote: > This is an initial implementation adding basic clocks, such as UART, > USI, I2C, WDT, ect. and their parent clocks. It is heavily based on the > Exynos850 clock driver at 'drivers/clk/samsung/clk-exynos850.c' which > was made by Sam Protsenko, thus the copyright and author lines were > kept. > > Bus clocks are enabled by default as well to avoid hangs while trying to > access CMU registers. > > Only the parts of CMU_TOP needed for CMU_CORE and CMU_PERI, a bit of > CMU_CORE, and most of CMU_PERI is implemented as of now. > > Signed-off-by: David Virag > --- > Changes in v2: > - Use shared code between Exynos850 and 7885 clock drivers > - As the code that was from the Exynos850 clock driver was moved to > clk-exynos-arm64.c and what remains is mostly SoC specific data, > move the Linaro copyright and Sam Protsenko author lines there. > > Changes in v3: > - Nothing > > drivers/clk/samsung/Makefile | 1 + > drivers/clk/samsung/clk-exynos7885.c | 593 +++++++++++++++++++++++++++ > 2 files changed, 594 insertions(+) > create mode 100644 drivers/clk/samsung/clk-exynos7885.c > > diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile > index 901e6333c5f0..0df74916a895 100644 > --- a/drivers/clk/samsung/Makefile > +++ b/drivers/clk/samsung/Makefile > @@ -18,6 +18,7 @@ obj-$(CONFIG_EXYNOS_AUDSS_CLK_CON) += clk-exynos-audss.o > obj-$(CONFIG_EXYNOS_CLKOUT) += clk-exynos-clkout.o > obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos-arm64.o > obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7.o > +obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7885.o > obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos850.o > obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o > obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o > diff --git a/drivers/clk/samsung/clk-exynos7885.c b/drivers/clk/samsung/clk-exynos7885.c > new file mode 100644 > index 000000000000..0b3a28800e76 > --- /dev/null > +++ b/drivers/clk/samsung/clk-exynos7885.c > @@ -0,0 +1,591 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (C) 2021 Dávid Virág > + * Author: Dávid Virág > + * > + * Common Clock Framework support for Exynos7885 SoC. > + */ > + > +#include > +#include > + > +#include "clk-exynos-arm64.h" Similarly to your previous patch - you need headers for every explicitly used symbol/function etc. Best regards, Krzysztof