From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751992AbeAWPeO (ORCPT ); Tue, 23 Jan 2018 10:34:14 -0500 Received: from mail-qt0-f195.google.com ([209.85.216.195]:40069 "EHLO mail-qt0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751643AbeAWPeG (ORCPT ); Tue, 23 Jan 2018 10:34:06 -0500 X-Google-Smtp-Source: AH8x226Xl9XmnMleMxfC4PHDzyIIi1bZj0YgrjdOayibimLtD6/MhfS8nRmv0VGgpssd3EnHB7GqMA== Subject: Re: [PATCHv5 2/5] ARM: dts: imx6q-bx50v3: Add internal switch To: Sebastian Reichel , Andrew Lunn , Vivien Didelot , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@lists.collabora.co.uk References: <20180123150350.11031-1-sebastian.reichel@collabora.co.uk> <20180123150350.11031-3-sebastian.reichel@collabora.co.uk> From: Florian Fainelli Message-ID: Date: Tue, 23 Jan 2018 07:34:01 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20180123150350.11031-3-sebastian.reichel@collabora.co.uk> Content-Type: text/plain; charset=windows-1252 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/23/2018 07:03 AM, Sebastian Reichel wrote: > B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to > communicate with a Marvell switch. On all devices the switch is > connected to a PCI based network card, which needs to be referenced > by DT, so this also adds the common PCI root node. > > Signed-off-by: Sebastian Reichel Reviewed-by: Florian Fainelli -- Florian