From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932122Ab3BRGbA (ORCPT ); Mon, 18 Feb 2013 01:31:00 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:50320 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758103Ab3BRGa4 (ORCPT ); Mon, 18 Feb 2013 01:30:56 -0500 From: Afzal Mohammed To: , , , , CC: Russell King , Tony Lindgren , Marc Zyngier , Nicolas Pitre , Santosh Shilimkar , Will Deacon , Linus Walleij , Rob Herring , Grant Likely , Rob Landley , Sekhar Nori , Syed Mohammed Khasim Subject: [RFC 7/8] ARM: dts: am4372: initial support Date: Mon, 18 Feb 2013 12:00:41 +0530 Message-ID: X-Mailer: git-send-email 1.7.12 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org DT source (minimal) for AM4372 SoC. Those represented here are the minimal DT nodes necessary to get kernel booting. Signed-off-by: Afzal Mohammed --- arch/arm/boot/dts/am4372.dtsi | 55 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 arch/arm/boot/dts/am4372.dtsi diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi new file mode 100644 index 0000000..178c41f --- /dev/null +++ b/arch/arm/boot/dts/am4372.dtsi @@ -0,0 +1,55 @@ +/* + * Device Tree Source for AM4372 SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "ti,am4372", "ti,am43"; + interrupt-parent = <&gic>; + + + aliases { + serial0 = &uart1; + }; + + cpus { + cpu@0 { + compatible = "arm,cortex-a9"; + }; + }; + + gic: interrupt-controller@48241000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x48241000 0x1000>, + <0x48240100 0x0100>; + }; + + twd1: local-timer@0x48240600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x48240600 0x20>; + interrupts = <1 13 0x304>; + }; + + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + uart1: serial@44e09000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + clock-frequency = <48000000>; + reg = <0x44e09000 0x2000>; + interrupts = <0 72 0x4>; + }; + }; +}; -- 1.7.12