Re: [PATCH v2 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC

From: Marc Zyngier <marc.zyngier@arm.com>
To: Olof Johansson <olof@lixom.net>, Rob Herring <robh@kernel.org>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Mark Rutland <mark.rutland@arm.com>,
	Tsahee Zidenberg <tsahee@annapurnalabs.com>,
	Antoine Tenart <antoine.tenart@free-electrons.com>,
	Russell King <linux@armlinux.org.uk>,
	Beno?t Cousson <bcousson@baylibre.com>,
	Tony Lindgren <tony@atomide.com>, Kukjin Kim <kgene@kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Javier Martinez Canillas <javier@osg.samsung.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <kernel@pengutronix.de>,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Simon Horman <horms@verge.net.au>,
	Magnus Damm <magnus.damm@gmail.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Maxime Ripard <maxime.ripard@free-electrons.com>,
	Chen-Yu Tsai <wens@csie.org>,
	arm@kernel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
Date: Mon, 30 Jan 2017 08:41:08 +0000	[thread overview]
Message-ID: <ca89ec5c-2d49-5e76-7589-76a0257b6442@arm.com> (raw)
In-Reply-To: <20170129225129.GK3133@localhost>

On 29/01/17 22:51, Olof Johansson wrote:
> On Fri, Jan 27, 2017 at 02:30:01PM -0600, Rob Herring wrote:
>> On Mon, Jan 23, 2017 at 03:56:13PM +0000, Marc Zyngier wrote:
>>> The joys of copy/paste: the example of a virtualization capable GIC
>>> in the DT binding was wrong, and propagated to dozens of platforms.
>>> By having a GICC region that is only 4kB (instead of 8kB), we
>>> end-up not being able to access the GICC_DIR register which is on
>>> the second page.
>>>
>>> Oh well. Let's fix the source of the crap before tackling individual
>>> offenders. While we're at it, also fix the compatibility string to
>>> mention "arm,gic-400", which is the name of the actual implementation
>>> of the GICv2 spec.
>>
>> "While we're at it", code for should be in a separate patch. :) I 
>> wouldn't really care here, but you are not fixing anything...
>>
>>>
>>> Acked-by: Tony Lindgren <tony@atomide.com>
>>> Acked-by: Mark Rutland <mark.rutland@arm.com>
>>> Acked-by: Arnd Bergmann <arnd@arndb.de>
>>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>>> ---
>>>  Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt | 4 ++--
>>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
>>> index 5393e2a..a3d51ed 100644
>>> --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
>>> +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
>>> @@ -107,11 +107,11 @@ Required properties:
>>>  Example:
>>>  
>>>  	interrupt-controller@2c001000 {
>>> -		compatible = "arm,cortex-a15-gic";
>>> +		compatible = "arm,gic-400";
>>
>> Which one is correct really depends on the platform. The A15 can have an 
>> internal or external (gic-400) GIC. The former string is correct for an 
>> A15 with an internal GIC. One such platform is Calxeda midway.
>>
>> Arguably, we should not have arm,gic-400 by itself, but have an SoC 
>> specific compatible in case it was integrated in interesting ways.
> 
> Good point (and thanks for bringing it up).
> 
> Marc, based on this; want to back the above out so we can apply the rest for
> now, while you battle on the compatible details? :)

Fair enough. I'll back that out, respin and resend.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...