From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE04EC433E7 for ; Mon, 12 Oct 2020 08:25:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5CAAA20E65 for ; Mon, 12 Oct 2020 08:25:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726739AbgJLIZx (ORCPT ); Mon, 12 Oct 2020 04:25:53 -0400 Received: from mail-out.m-online.net ([212.18.0.9]:57395 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726130AbgJLIZx (ORCPT ); Mon, 12 Oct 2020 04:25:53 -0400 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 4C8sFV2Bgyz1r6n6; Mon, 12 Oct 2020 10:25:50 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 4C8sFT6mDMz1qtZD; Mon, 12 Oct 2020 10:25:49 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id PMlXL_AF067s; Mon, 12 Oct 2020 10:25:47 +0200 (CEST) X-Auth-Info: IUOEMG6j6w6T+7mO+bcViJsS5TlYYJ79Hmo2WCJ5uFE= Received: from [IPv6:::1] (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Mon, 12 Oct 2020 10:25:47 +0200 (CEST) Subject: Re: PHY reset question To: Oleksij Rempel , Bruno Thomsen Cc: Fabio Estevam , Andrew Lunn , David Jander , Sascha Hauer , linux-kernel , netdev , Russell King , Marc Kleine-Budde , Florian Fainelli References: <20201006080424.GA6988@pengutronix.de> <20201012054839.n6do5ruxhbhc7h7n@pengutronix.de> From: Marek Vasut Message-ID: Date: Mon, 12 Oct 2020 10:25:46 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <20201012054839.n6do5ruxhbhc7h7n@pengutronix.de> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/12/20 7:48 AM, Oleksij Rempel wrote: > Hi all, > > thank you for the feedback! > > On Fri, Oct 09, 2020 at 04:25:49PM +0200, Bruno Thomsen wrote: >> Hi Fabio and Oleksij >> >> Den ons. 7. okt. 2020 kl. 11.50 skrev Fabio Estevam : >>> >>> Hi Oleksij, >>> >>> On Tue, Oct 6, 2020 at 5:05 AM Oleksij Rempel wrote: >>>> >>>> Hello PHY experts, >>>> >>>> Short version: >>>> what is the proper way to handle the PHY reset before identifying PHY? >>>> >>>> Long version: >>>> I stumbled over following issue: >>>> If PHY reset is registered within PHY node. Then, sometimes, we will not be >>>> able to identify it (read PHY ID), because PHY is under reset. >>>> >>>> mdio { >>>> compatible = "virtual,mdio-gpio"; >>>> >>>> [...] >>>> >>>> /* Microchip KSZ8081 */ >>>> usbeth_phy: ethernet-phy@3 { >>>> reg = <0x3>; >>>> >>>> interrupts-extended = <&gpio5 12 IRQ_TYPE_LEVEL_LOW>; >>>> reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; >>>> reset-assert-us = <500>; >>>> reset-deassert-us = <1000>; >>>> }; >>>> >>>> [...] >>>> }; >>>> >>>> On simple boards with one PHY per MDIO bus, it is easy to workaround by using >>>> phy-reset-gpios withing MAC node (illustrated in below DT example), instead of >>>> using reset-gpios within PHY node (see above DT example). >>>> >>>> &fec { >>>> [...] >>>> phy-mode = "rmii"; >>>> phy-reset-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; >>>> [...] >>> >>> I thought this has been fixed by Bruno's series: >>> https://www.spinics.net/lists/netdev/msg673611.html >> >> Yes, that has fixed the Microchip/Micrel PHY ID auto detection >> issue. I have send a DTS patch v3 that makes use of the newly >> added device tree parameter: >> https://lkml.org/lkml/2020/9/23/595 > > This way is suitable only for boards with single PHY and single reset > line. But it is not scale on boards with multiple PHY and multiple reset > lines. > > So far, it looks like using compatible like "ethernet-phy-idXXXX.XXXX" > is the only way to go. I did further digging in this, and I agree it is either this or reset in boot loader, sigh.