From: Stafford Horne <shorne@gmail.com>
To: Jonas Bonn <jonas@southpole.se>,
Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Cc: linux@roeck-us.net, openrisc@lists.librecores.org,
linux-kernel@vger.kernel.org, Stafford Horne <shorne@gmail.com>
Subject: [PATCH v2 21/23] openrisc: entry: Fix delay slot detection
Date: Sat, 4 Feb 2017 00:48:45 +0900 [thread overview]
Message-ID: <cd714da06781f024e947f6121950482443ab72cb.1486135912.git.shorne@gmail.com> (raw)
In-Reply-To: <cover.1486135912.git.shorne@gmail.com>
In-Reply-To: <cover.1486135912.git.shorne@gmail.com>
Use execption SR stored in pt_regs for detection, the current SR is not
correct as the handler is running after return from exception.
Also, The code that checks for a delay slot uses a flag bitmask and then
wants to check if the result is not zero. The test it implemented was
wrong.
Correct it by changing the test to check result against non zero.
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
arch/openrisc/kernel/entry.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S
index daae2a4..bc65008 100644
--- a/arch/openrisc/kernel/entry.S
+++ b/arch/openrisc/kernel/entry.S
@@ -258,9 +258,9 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
#else
- l.mfspr r6,r0,SPR_SR // SR
+ l.lwz r6,PT_SR(r3) // SR
l.andi r6,r6,SPR_SR_DSX // check for delay slot exception
- l.sfeqi r6,0x1 // exception happened in delay slot
+ l.sfne r6,r0 // exception happened in delay slot
l.bnf 7f
l.lwz r6,PT_PC(r3) // address of an offending insn
--
2.9.3
next prev parent reply other threads:[~2017-02-03 15:50 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-03 15:48 [PATCH v2 00/23] OpenRISC patches from backlog for 4.11 Stafford Horne
2017-02-03 15:48 ` [PATCH v2 01/23] openrisc: use SPARSE_IRQ Stafford Horne
2017-02-03 15:48 ` [PATCH v2 02/23] openrisc: add cache way information to cpuinfo Stafford Horne
2017-02-03 15:48 ` [PATCH v2 03/23] openrisc: tlb miss handler optimizations Stafford Horne
2017-02-03 15:48 ` [PATCH v2 04/23] openrisc: head: use THREAD_SIZE instead of magic constant Stafford Horne
2017-02-03 15:48 ` [PATCH v2 05/23] openrisc: head: refactor out tlb flush into it's own function Stafford Horne
2017-02-03 15:48 ` [PATCH v2 06/23] openrisc: add l.lwa/l.swa emulation Stafford Horne
2017-02-03 15:48 ` [PATCH v2 07/23] openrisc: add atomic bitops Stafford Horne
2017-02-03 15:48 ` [PATCH v2 08/23] openrisc: add cmpxchg and xchg implementations Stafford Horne
2017-02-03 15:48 ` [PATCH v2 09/23] openrisc: add optimized atomic operations Stafford Horne
2017-02-03 15:48 ` [PATCH v2 10/23] openrisc: add spinlock implementation Stafford Horne
2017-02-03 15:48 ` [PATCH v2 11/23] openrisc: add futex_atomic_* implementations Stafford Horne
2017-02-03 15:48 ` [PATCH v2 12/23] openrisc: remove unnecessary stddef.h include Stafford Horne
2017-02-03 15:48 ` [PATCH v2 13/23] openrisc: Fix the bitmask for the unit present register Stafford Horne
2017-02-03 15:48 ` [PATCH v2 14/23] openrisc: Initial support for the idle state Stafford Horne
2017-02-03 15:48 ` [PATCH v2 15/23] openrisc: Add optimized memset Stafford Horne
2017-02-03 15:48 ` [PATCH v2 16/23] openrisc: Add optimized memcpy routine Stafford Horne
2017-02-03 15:48 ` [PATCH v2 17/23] openrisc: Add .gitignore Stafford Horne
2017-02-03 15:48 ` [PATCH v2 18/23] MAINTAINERS: Add the openrisc official repository Stafford Horne
2017-02-03 15:48 ` [PATCH v2 19/23] scripts/checkstack.pl: Add openrisc support Stafford Horne
2017-02-03 15:48 ` [PATCH v2 20/23] openrisc: entry: Whitespace and comment cleanups Stafford Horne
2017-02-03 15:48 ` Stafford Horne [this message]
2017-02-03 15:48 ` [PATCH v2 22/23] openrisc: head: Move init strings to rodata section Stafford Horne
2017-02-03 15:48 ` [PATCH v2 23/23] arch/openrisc/lib/memcpy.c: use correct OR1200 option Stafford Horne
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