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* [PATCH] pinctrl: meson: fix pull enable register calculation
@ 2018-11-13 10:55 Jerome Brunet
  2018-11-13 13:34 ` Neil Armstrong
  2018-11-19 13:18 ` Linus Walleij
  0 siblings, 2 replies; 3+ messages in thread
From: Jerome Brunet @ 2018-11-13 10:55 UTC (permalink / raw)
  To: Linus Walleij, Kevin Hilman, Carlo Caione
  Cc: Jerome Brunet, linux-gpio, linux-amlogic, linux-kernel

We just changed the code so we apply bias disable on the correct
register but forgot to align the register calculation. The result
is that we apply the change on the correct register, but possibly
at the incorrect offset/bit

This went undetected because offsets tends to be the same between
REG_PULL and REG_PULLEN for a given pin the EE controller. This
is not true for the AO controller.

Fixes: e39f9dd8206a ("pinctrl: meson: fix pinconf bias disable")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index 53d449076dee..ea87d739f534 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -191,7 +191,8 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
 		case PIN_CONFIG_BIAS_DISABLE:
 			dev_dbg(pc->dev, "pin %u: disable bias\n", pin);
 
-			meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
+			meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg,
+					       &bit);
 			ret = regmap_update_bits(pc->reg_pullen, reg,
 						 BIT(bit), 0);
 			if (ret)
-- 
2.19.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] pinctrl: meson: fix pull enable register calculation
  2018-11-13 10:55 [PATCH] pinctrl: meson: fix pull enable register calculation Jerome Brunet
@ 2018-11-13 13:34 ` Neil Armstrong
  2018-11-19 13:18 ` Linus Walleij
  1 sibling, 0 replies; 3+ messages in thread
From: Neil Armstrong @ 2018-11-13 13:34 UTC (permalink / raw)
  To: Jerome Brunet, Linus Walleij, Kevin Hilman, Carlo Caione
  Cc: linux-gpio, linux-amlogic, linux-kernel

On 13/11/2018 11:55, Jerome Brunet wrote:
> We just changed the code so we apply bias disable on the correct
> register but forgot to align the register calculation. The result
> is that we apply the change on the correct register, but possibly
> at the incorrect offset/bit
> 
> This went undetected because offsets tends to be the same between
> REG_PULL and REG_PULLEN for a given pin the EE controller. This
> is not true for the AO controller.
> 
> Fixes: e39f9dd8206a ("pinctrl: meson: fix pinconf bias disable")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/pinctrl/meson/pinctrl-meson.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
> index 53d449076dee..ea87d739f534 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson.c
> @@ -191,7 +191,8 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
>  		case PIN_CONFIG_BIAS_DISABLE:
>  			dev_dbg(pc->dev, "pin %u: disable bias\n", pin);
>  
> -			meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
> +			meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg,
> +					       &bit);
>  			ret = regmap_update_bits(pc->reg_pullen, reg,
>  						 BIT(bit), 0);
>  			if (ret)
> 

I saw it aswell,

Acked-by: Neil Armstrong <narmstrong@baylibre.com>

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] pinctrl: meson: fix pull enable register calculation
  2018-11-13 10:55 [PATCH] pinctrl: meson: fix pull enable register calculation Jerome Brunet
  2018-11-13 13:34 ` Neil Armstrong
@ 2018-11-19 13:18 ` Linus Walleij
  1 sibling, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2018-11-19 13:18 UTC (permalink / raw)
  To: Jerome Brunet
  Cc: Kevin Hilman, Carlo Caione, open list:GPIO SUBSYSTEM,
	open list:ARM/Amlogic Meson...,
	linux-kernel

On Tue, Nov 13, 2018 at 11:55 AM Jerome Brunet <jbrunet@baylibre.com> wrote:

> We just changed the code so we apply bias disable on the correct
> register but forgot to align the register calculation. The result
> is that we apply the change on the correct register, but possibly
> at the incorrect offset/bit
>
> This went undetected because offsets tends to be the same between
> REG_PULL and REG_PULLEN for a given pin the EE controller. This
> is not true for the AO controller.
>
> Fixes: e39f9dd8206a ("pinctrl: meson: fix pinconf bias disable")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

Patch applied for fixes.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2018-11-19 13:18 UTC | newest]

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2018-11-13 10:55 [PATCH] pinctrl: meson: fix pull enable register calculation Jerome Brunet
2018-11-13 13:34 ` Neil Armstrong
2018-11-19 13:18 ` Linus Walleij

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