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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	npiggin@gmail.com
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v2 16/43] powerpc/32: Enable instruction translation at the same time as data translation
Date: Tue,  9 Mar 2021 12:09:42 +0000 (UTC)	[thread overview]
Message-ID: <cffffac0528ece664b2b49bfb50c476c5a3a057d.1615291472.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <cover.1615291471.git.christophe.leroy@csgroup.eu>

On 40x and 8xx, kernel text is pinned.
On book3s/32, kernel text is mapped by BATs.

Enable instruction translation at the same time as data translation, it
makes things simpler.

In syscall handler, MSR_RI can also be set at the same time because
srr0/srr1 are already saved and r1 is set properly.

On booke, translation is always on, so at the end all PPC32
have translation on early. Just update msr.

Also update comment in power_save_ppc32_restore().

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/kernel/entry_32.S   | 30 ++++++++++++------------------
 arch/powerpc/kernel/head_32.h    | 13 ++++++++-----
 arch/powerpc/kernel/head_40x.S   | 10 +++++++---
 arch/powerpc/kernel/head_booke.h |  6 ++++--
 4 files changed, 31 insertions(+), 28 deletions(-)

diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 33e97032ca25..01a064c8a96a 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -153,19 +153,11 @@ transfer_to_handler:
 transfer_to_handler_cont:
 3:
 	mflr	r9
-	tovirt(r9, r9)
 	lwz	r11,0(r9)		/* virtual address of handler */
 	lwz	r9,4(r9)		/* where to go when done */
-#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PERF_EVENTS)
-	mtspr	SPRN_NRI, r0
-#endif
-	mtspr	SPRN_SRR0,r11
-	mtspr	SPRN_SRR1,r10
+	mtctr	r11
 	mtlr	r9
-	rfi				/* jump to handler, enable MMU */
-#ifdef CONFIG_40x
-	b .	/* Prevent prefetch past rfi */
-#endif
+	bctr				/* jump to handler */
 
 #if defined (CONFIG_PPC_BOOK3S_32) || defined(CONFIG_E500)
 4:	rlwinm	r12,r12,0,~_TLF_NAPPING
@@ -444,8 +436,6 @@ fee_restarts:
 	li	r10,-1
 	stw	r10,_TRAP(r11)
 	addi	r3,r1,STACK_FRAME_OVERHEAD
-	lis	r10,MSR_KERNEL@h
-	ori	r10,r10,MSR_KERNEL@l
 	bl	transfer_to_handler_full
 	.long	unrecoverable_exception
 	.long	ret_from_except
@@ -945,16 +935,20 @@ _GLOBAL(enter_rtas)
 	mtspr	SPRN_SRR1,r9
 	rfi
 1:
-	li	r0, MSR_KERNEL & ~MSR_IR	/* can take DTLB miss */
-	mtmsr	r0
-	isync
+	lis	r8, 1f@h
+	ori	r8, r8, 1f@l
+	LOAD_REG_IMMEDIATE(r9,MSR_KERNEL)
+	mtspr	SPRN_SRR0,r8
+	mtspr	SPRN_SRR1,r9
+	rfi			/* Reactivate MMU translation */
+1:
 	lwz	r8,INT_FRAME_SIZE+4(r1)	/* get return address */
 	lwz	r9,8(r1)	/* original msr value */
 	addi	r1,r1,INT_FRAME_SIZE
 	li	r0,0
 	stw	r0, THREAD + RTAS_SP(r2)
-	mtspr	SPRN_SRR0,r8
-	mtspr	SPRN_SRR1,r9
-	rfi			/* return to caller */
+	mtlr	r8
+	mtmsr	r9
+	blr			/* return to caller */
 _ASM_NOKPROBE_SYMBOL(enter_rtas)
 #endif /* CONFIG_PPC_RTAS */
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h
index 910f86642eec..88b02bd91e8e 100644
--- a/arch/powerpc/kernel/head_32.h
+++ b/arch/powerpc/kernel/head_32.h
@@ -63,10 +63,14 @@
 	mtspr	SPRN_DAR, r11	/* Tag DAR, to be used in DTLB Error */
 	.endif
 #endif
-	LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~(MSR_IR | MSR_RI)) /* can take DTLB miss */
-	mtmsr	r11
-	isync
+	LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~MSR_RI) /* re-enable MMU */
+	mtspr	SPRN_SRR1, r11
+	lis	r11, 1f@h
+	ori	r11, r11, 1f@l
+	mtspr	SPRN_SRR0, r11
 	mfspr	r11, SPRN_SPRG_SCRATCH2
+	rfi
+1:
 	stw	r11,GPR1(r1)
 	stw	r11,0(r1)
 	mr	r11, r1
@@ -94,7 +98,7 @@
 #elif defined(CONFIG_PPC_8xx)
 	mtspr	SPRN_EID, r2		/* Set MSR_RI */
 #else
-	li	r10, MSR_KERNEL & ~MSR_IR /* can take exceptions */
+	li	r10, MSR_KERNEL		/* can take exceptions */
 	mtmsr	r10			/* (except for mach check in rtas) */
 #endif
 	stw	r0,GPR0(r11)
@@ -179,7 +183,6 @@
 #define EXC_XFER_TEMPLATE(hdlr, trap, msr, tfer, ret)		\
 	li	r10,trap;					\
 	stw	r10,_TRAP(r11);					\
-	LOAD_REG_IMMEDIATE(r10, msr);				\
 	bl	tfer;						\
 	.long	hdlr;						\
 	.long	ret
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 7da673ec63ef..55fa99c5085c 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -126,9 +126,13 @@ _ENTRY(crit_esr)
 	lwz	r11,TASK_STACK-THREAD(r11) /* this thread's kernel stack */
 1:	stw	r1,crit_r1@l(0)
 	addi	r1,r11,THREAD_SIZE-INT_FRAME_SIZE /* Alloc an excpt frm  */
-	LOAD_REG_IMMEDIATE(r11,MSR_KERNEL & ~(MSR_IR | MSR_RI))
-	mtmsr	r11
-	isync
+	LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)) /* re-enable MMU */
+	mtspr	SPRN_SRR1, r11
+	lis	r11, 1f@h
+	ori	r11, r11, 1f@l
+	mtspr	SPRN_SRR0, r11
+	rfi
+1:
 	lwz	r11,crit_r1@l(0)
 	stw	r11,GPR1(r1)
 	stw	r11,0(r1)
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index 4a5f0c9b652b..f712b9bc6d62 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -53,6 +53,8 @@ END_BTB_FLUSH_SECTION
 	mfspr	r11, SPRN_SRR1;		                                     \
 	DO_KVM	BOOKE_INTERRUPT_##intno SPRN_SRR1;			     \
 	andi.	r11, r11, MSR_PR;	/* check whether user or kernel    */\
+	LOAD_REG_IMMEDIATE(r11, MSR_KERNEL);				\
+	mtmsr	r11;							\
 	mr	r11, r1;						     \
 	beq	1f;							     \
 	BOOKE_CLEAR_BTB(r11)						\
@@ -192,6 +194,8 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 	DO_KVM	BOOKE_INTERRUPT_##intno exc_level_srr1;		             \
 	BOOKE_CLEAR_BTB(r10)						\
 	andi.	r11,r11,MSR_PR;						     \
+	LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE));	\
+	mtmsr	r11;							\
 	mfspr	r11,SPRN_SPRG_THREAD;	/* if from user, start at top of   */\
 	lwz	r11, TASK_STACK - THREAD(r11); /* this thread's kernel stack */\
 	addi	r11,r11,EXC_LVL_FRAME_OVERHEAD;	/* allocate stack frame    */\
@@ -282,8 +286,6 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 #define EXC_XFER_TEMPLATE(hdlr, trap, msr, tfer, ret)	\
 	li	r10,trap;					\
 	stw	r10,_TRAP(r11);					\
-	lis	r10,msr@h;					\
-	ori	r10,r10,msr@l;					\
 	bl	tfer;		 				\
 	.long	hdlr;						\
 	.long	ret
-- 
2.25.0


  parent reply	other threads:[~2021-03-09 12:10 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-09 12:09 [PATCH v2 00/43] powerpc/32: Switch to interrupt entry/exit in C Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 01/43] powerpc/traps: unrecoverable_exception() is not an interrupt handler Christophe Leroy
2021-03-10  1:16   ` Nicholas Piggin
2021-03-09 12:09 ` [PATCH v2 02/43] powerpc/traps: Declare unrecoverable_exception() as __noreturn Christophe Leroy
2021-03-10  1:22   ` Nicholas Piggin
2021-03-12  8:40     ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 03/43] powerpc/40x: Don't use SPRN_SPRG_SCRATCH0/1 in TLB miss handlers Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 04/43] powerpc/40x: Change CRITICAL_EXCEPTION_PROLOG macro to a gas macro Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 05/43] powerpc/40x: Save SRR0/SRR1 and r10/r11 earlier in critical exception Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 06/43] powerpc/40x: Reorder a few instructions in critical exception prolog Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 07/43] powerpc/40x: Prepare for enabling MMU " Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 08/43] powerpc/40x: Prepare normal exception handler for enabling MMU early Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 09/43] powerpc/32: Reconcile interrupts in C Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 10/43] powerpc/32: Entry cpu time accounting " Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 11/43] powerpc/32: Handle bookE debugging in C in exception entry Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 12/43] powerpc/32: Use fast instruction to set MSR RI in exception prolog on 8xx Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 13/43] powerpc/32: Remove ksp_limit Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 14/43] powerpc/32: Always enable data translation in exception prolog Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 15/43] powerpc/32: Tag DAR in EXCEPTION_PROLOG_2 for the 8xx Christophe Leroy
2021-03-09 12:09 ` Christophe Leroy [this message]
2021-03-09 12:09 ` [PATCH v2 17/43] powerpc/32: Statically initialise first emergency context Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 18/43] powerpc/32: Add vmap_stack_overflow label inside the macro Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 19/43] powerpc/32: Use START_EXCEPTION() as much as possible Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 20/43] powerpc/32: Move exception prolog code into .text once MMU is back on Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 21/43] powerpc/32: Provide a name to exception prolog continuation in virtual mode Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 22/43] powerpc/32: Refactor booke critical registers saving Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 23/43] powerpc/32: Perform normal function call in exception entry Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 24/43] powerpc/32: Always save non volatile registers on " Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 25/43] powerpc/32: Replace ASM exception exit by C exception exit from ppc64 Christophe Leroy
2021-03-11 13:46   ` Michael Ellerman
2021-03-11 19:39     ` Christophe Leroy
2021-03-11 23:26       ` Michael Ellerman
2021-03-12  8:28         ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 26/43] powerpc/32: Set regs parameter in r3 in transfer_to_handler Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 27/43] powerpc/32: Call bad_page_fault() from do_page_fault() Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 28/43] powerpc/64e: " Christophe Leroy
2021-03-10  1:29   ` Nicholas Piggin
2021-03-12  8:39     ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 29/43] powerpc/32: Save trap number on stack in exception prolog Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 30/43] powerpc/32: Add a prepare_transfer_to_handler macro for exception prologs Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 31/43] powerpc/32: Only restore non volatile registers when required Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 32/43] powerpc/32: Dismantle EXC_XFER_STD/LITE/TEMPLATE Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 33/43] powerpc/32: Remove the xfer parameter in EXCEPTION() macro Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 34/43] powerpc/32: Refactor saving of volatile registers in exception prologs Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 35/43] powerpc/32: Save remaining registers in exception prolog Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 36/43] powerpc/32: Set current->thread.regs in C interrupt entry Christophe Leroy
2021-03-10  1:33   ` Nicholas Piggin
2021-03-11 10:38     ` Christophe Leroy
2021-03-11 12:38       ` Christophe Leroy
2021-03-12  1:00         ` Nicholas Piggin
2021-03-09 12:10 ` [PATCH v2 37/43] powerpc/32: Return directly from power_save_ppc32_restore() Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 38/43] powerpc/32: Only use prepare_transfer_to_handler function on book3s/32 and e500 Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 39/43] powerpc/32s: Move KUEP locking/unlocking in C Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 40/43] powerpc/64s: Make kuap_check_amr() and kuap_get_and_check_amr() generic Christophe Leroy
2021-03-10  1:37   ` Nicholas Piggin
2021-03-12  8:37     ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 41/43] powerpc/32s: Create C version of kuap save/restore/check helpers Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 42/43] powerpc/8xx: " Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 43/43] powerpc/32: Manage KUAP in C Christophe Leroy
2021-03-14 10:01 ` [PATCH v2 00/43] powerpc/32: Switch to interrupt entry/exit " Michael Ellerman

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