From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
scottwood@freescale.com
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v2 00/25] powerpc/8xx: Use large pages for RAM and IMMR and other improvments
Date: Tue, 22 Sep 2015 18:50:27 +0200 (CEST) [thread overview]
Message-ID: <cover.1442939410.git.christophe.leroy@c-s.fr> (raw)
The main purpose of this patchset is to dramatically reduce the time
spent in DTLB miss handler. This is achieved by:
1/ Mapping RAM with 8M pages
2/ Mapping IMMR with a fixed 512K page
On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we get 87 millions DTLB misses
and approximatly 35 secondes are spent in DTLB handler.
This represents 5.8% of the overall time and even 10.8% of the
non-idle time.
Among those 87 millions DTLB misses, 15% are on user addresses and
85% are on kernel addresses. And within the kernel addresses, 93%
are on addresses from the linear address space and only 7% are on
addresses from the virtual address space.
Once the full patchset applied, the number of DTLB misses during the
period is reduced to 11.8 millions for a duration of 5.8s, which
represents 2% of the non-idle time.
This patch also includes other miscellaneous improvements:
1/ Handling of CPU6 ERRATA directly in mtspr() C macro to reduce code
specific to PPC8xx
2/ Rewrite of a few non critical ASM functions in C
3/ Removal of some unused items
See related patches for details
Christophe Leroy (25):
powerpc/8xx: Save r3 all the time in DTLB miss handler
powerpc/8xx: Map linear kernel RAM with 8M pages
powerpc: Update documentation for noltlbs kernel parameter
powerpc/8xx: move setup_initial_memory_limit() into 8xx_mmu.c
powerpc/8xx: Fix vaddr for IMMR early remap
powerpc32: iounmap() cannot vunmap() area mapped by TLBCAMs either
powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam()
together
powerpc/8xx: Map IMMR area with 512k page at a fixed address
powerpc/8xx: show IMMR area in startup memory layout
powerpc/8xx: CONFIG_PIN_TLB unneeded for CONFIG_PPC_EARLY_DEBUG_CPM
powerpc/8xx: map 16M RAM at startup
powerpc32: Remove useless/wrong MMU:setio progress message
powerpc/8xx: also use r3 in the ITLB miss in all situations
powerpc32: remove ioremap_base
powerpc/8xx: move 8xx SPRN defines into reg_8xx.h and add some missing
ones
powerpc/8xx: Handle CPU6 ERRATA directly in mtspr() macro
powerpc/8xx: remove special handling of CPU6 errata in set_dec()
powerpc/8xx: rewrite set_context() in C
powerpc/8xx: rewrite flush_instruction_cache() in C
powerpc32: Remove clear_pages() and define clear_page() inline
powerpc: add inline functions for cache related instructions
powerpc32: move xxxxx_dcache_range() functions inline
powerpc: Simplify test in __dma_sync()
powerpc32: small optimisation in flush_icache_range()
powerpc32: Remove one insn in mulhdu
Documentation/kernel-parameters.txt | 2 +-
arch/powerpc/Kconfig.debug | 2 -
arch/powerpc/include/asm/cache.h | 19 +++
arch/powerpc/include/asm/cacheflush.h | 55 +++++++-
arch/powerpc/include/asm/mmu-8xx.h | 26 ++--
arch/powerpc/include/asm/page_32.h | 17 ++-
arch/powerpc/include/asm/pgtable-ppc32.h | 5 +
arch/powerpc/include/asm/reg.h | 2 +
arch/powerpc/include/asm/reg_8xx.h | 106 +++++++++++++++
arch/powerpc/include/asm/time.h | 6 +-
arch/powerpc/kernel/head_8xx.S | 167 ++++++++++++------------
arch/powerpc/kernel/misc_32.S | 107 ++--------------
arch/powerpc/kernel/ppc_ksyms.c | 2 +
arch/powerpc/kernel/ppc_ksyms_32.c | 1 -
arch/powerpc/mm/8xx_mmu.c | 191 ++++++++++++++++++++++++++++
arch/powerpc/mm/Makefile | 1 +
arch/powerpc/mm/dma-noncoherent.c | 2 +-
arch/powerpc/mm/init_32.c | 23 ----
arch/powerpc/mm/mem.c | 4 +
arch/powerpc/mm/mmu_decl.h | 16 +--
arch/powerpc/mm/pgtable_32.c | 54 +++++++-
arch/powerpc/platforms/embedded6xx/mpc10x.h | 8 --
22 files changed, 553 insertions(+), 263 deletions(-)
create mode 100644 arch/powerpc/mm/8xx_mmu.c
--
2.1.0
next reply other threads:[~2015-09-22 16:50 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-22 16:50 Christophe Leroy [this message]
2015-09-22 16:50 ` [PATCH v2 01/25] powerpc/8xx: Save r3 all the time in DTLB miss handler Christophe Leroy
2015-09-28 22:07 ` Scott Wood
2015-10-06 13:35 ` Christophe Leroy
2015-10-06 16:39 ` Scott Wood
2015-10-06 16:46 ` Scott Wood
2015-10-06 20:30 ` christophe leroy
2015-10-06 20:38 ` Scott Wood
2015-09-22 16:50 ` [PATCH v2 02/25] powerpc/8xx: Map linear kernel RAM with 8M pages Christophe Leroy
2015-09-22 16:50 ` [PATCH v2 03/25] powerpc: Update documentation for noltlbs kernel parameter Christophe Leroy
2015-09-22 16:50 ` [PATCH v2 04/25] powerpc/8xx: move setup_initial_memory_limit() into 8xx_mmu.c Christophe Leroy
2015-09-22 16:50 ` [PATCH v2 05/25] powerpc/8xx: Fix vaddr for IMMR early remap Christophe Leroy
2015-09-28 23:39 ` Scott Wood
2015-10-08 12:34 ` Christophe Leroy
2015-10-08 19:13 ` Scott Wood
2015-09-22 16:50 ` [PATCH v2 06/25] powerpc32: iounmap() cannot vunmap() area mapped by TLBCAMs either Christophe Leroy
2015-09-28 23:41 ` Scott Wood
2015-10-06 13:50 ` Christophe Leroy
2015-09-22 16:50 ` [PATCH v2 07/25] powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam() together Christophe Leroy
2015-09-28 23:47 ` Scott Wood
2015-10-06 14:02 ` Christophe Leroy
2015-10-06 15:16 ` Scott Wood
2015-09-22 16:50 ` [PATCH v2 08/25] powerpc/8xx: Map IMMR area with 512k page at a fixed address Christophe Leroy
2015-09-24 11:41 ` David Laight
2015-09-24 20:14 ` Scott Wood
2015-09-25 14:46 ` David Laight
2015-09-25 17:09 ` Scott Wood
2015-09-28 23:53 ` Scott Wood
2015-09-22 16:50 ` [PATCH v2 09/25] powerpc/8xx: show IMMR area in startup memory layout Christophe Leroy
2015-09-22 16:50 ` [PATCH v2 10/25] powerpc/8xx: CONFIG_PIN_TLB unneeded for CONFIG_PPC_EARLY_DEBUG_CPM Christophe Leroy
2015-09-22 16:50 ` [PATCH v2 11/25] powerpc/8xx: map 16M RAM at startup Christophe Leroy
2015-09-28 23:58 ` Scott Wood
2015-10-06 14:10 ` Christophe Leroy
2015-10-06 15:17 ` Scott Wood
2015-09-22 16:50 ` [PATCH v2 12/25] powerpc32: Remove useless/wrong MMU:setio progress message Christophe Leroy
2015-09-22 16:50 ` [PATCH v2 13/25] powerpc/8xx: also use r3 in the ITLB miss in all situations Christophe Leroy
2015-09-29 0:00 ` Scott Wood
2015-10-06 14:12 ` Christophe Leroy
2015-10-06 16:48 ` Scott Wood
2015-09-22 16:50 ` [PATCH v2 14/25] powerpc32: remove ioremap_base Christophe Leroy
2015-09-29 0:38 ` Scott Wood
2015-09-22 16:50 ` [PATCH v2 15/25] powerpc/8xx: move 8xx SPRN defines into reg_8xx.h and add some missing ones Christophe Leroy
2015-09-29 0:03 ` Scott Wood
2015-10-06 14:35 ` Christophe Leroy
2015-10-06 16:56 ` Scott Wood
2015-09-22 16:51 ` [PATCH v2 16/25] powerpc/8xx: Handle CPU6 ERRATA directly in mtspr() macro Christophe Leroy
2015-09-22 16:51 ` [PATCH v2 17/25] powerpc/8xx: remove special handling of CPU6 errata in set_dec() Christophe Leroy
2015-09-22 16:51 ` [PATCH v2 18/25] powerpc/8xx: rewrite set_context() in C Christophe Leroy
2015-09-22 16:51 ` [PATCH v2 19/25] powerpc/8xx: rewrite flush_instruction_cache() " Christophe Leroy
2015-09-22 16:51 ` [PATCH v2 20/25] powerpc32: Remove clear_pages() and define clear_page() inline Christophe Leroy
2015-09-22 17:57 ` Joakim Tjernlund
2015-09-29 0:23 ` Scott Wood
2015-09-22 16:51 ` [PATCH v2 21/25] powerpc: add inline functions for cache related instructions Christophe Leroy
2015-09-29 0:25 ` Scott Wood
2015-09-22 16:51 ` [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline Christophe Leroy
2015-09-22 18:12 ` Joakim Tjernlund
2015-09-22 18:58 ` Scott Wood
2015-09-22 19:34 ` Joakim Tjernlund
2015-09-22 19:42 ` Scott Wood
2015-09-22 19:55 ` Joakim Tjernlund
2015-09-22 20:07 ` Joakim Tjernlund
2015-09-22 20:14 ` Scott Wood
2015-09-22 20:32 ` Joakim Tjernlund
2015-09-22 20:35 ` Scott Wood
2015-09-22 20:38 ` Joakim Tjernlund
2015-09-22 20:57 ` Christophe Leroy
2015-09-22 22:34 ` Scott Wood
2015-09-22 22:49 ` Christophe Leroy
2015-09-22 22:52 ` Scott Wood
2015-09-29 0:29 ` Scott Wood
2015-10-07 12:49 ` Christophe Leroy
2015-10-08 19:12 ` Scott Wood
2015-10-12 18:08 ` christophe leroy
2015-09-22 16:51 ` [PATCH v2 23/25] powerpc: Simplify test in __dma_sync() Christophe Leroy
2015-09-22 16:51 ` [PATCH v2 24/25] powerpc32: small optimisation in flush_icache_range() Christophe Leroy
2015-09-22 16:51 ` [PATCH v2 25/25] powerpc32: Remove one insn in mulhdu Christophe Leroy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1442939410.git.christophe.leroy@c-s.fr \
--to=christophe.leroy@c-s.fr \
--cc=benh@kernel.crashing.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mpe@ellerman.id.au \
--cc=paulus@samba.org \
--cc=scottwood@freescale.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).