From: Zong Li <zong.li@sifive.com>
To: palmer@dabbelt.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, mhiramat@kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Zong Li <zong.li@sifive.com>
Subject: [PATCH v5 0/9] Support strict kernel memory permissions for security
Date: Wed, 8 Apr 2020 15:56:55 +0800 [thread overview]
Message-ID: <cover.1586332296.git.zong.li@sifive.com> (raw)
The main purpose of this patch series is changing the kernel mapping permission
, make sure that code is not writeable, data is not executable, and read-only
data is neither writable nor executable.
This patch series also supports the relevant implementations such as
ARCH_HAS_SET_MEMORY, ARCH_HAS_SET_DIRECT_MAP,
ARCH_SUPPORTS_DEBUG_PAGEALLOC and DEBUG_WX.
Changes in v5:
- Add lockdep_assert_held and more comments for text_mutex.
Changes in v4:
- Use NOKPROBE_SYMBOL instead of __kprobe annotation
- Use text_mutex instead of patch_lock
- Remove 'riscv_' prefix of function name
Changes in v3:
- Fix build error on nommu configuration. We already support nommu on
RISC-V, so we should consider nommu case and test not only rv32/64,
but also nommu.
Changes in v2:
- Use _data to specify the start of data section with write permission.
- Change ftrace patch text implementaion.
- Separate DEBUG_WX patch to another patchset.
Zong Li (9):
riscv: add macro to get instruction length
riscv: introduce interfaces to patch kernel code
riscv: patch code by fixmap mapping
riscv: add ARCH_HAS_SET_MEMORY support
riscv: add ARCH_HAS_SET_DIRECT_MAP support
riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support
riscv: move exception table immediately after RO_DATA
riscv: add alignment for text, rodata and data sections
riscv: add STRICT_KERNEL_RWX support
arch/riscv/Kconfig | 6 +
arch/riscv/include/asm/bug.h | 8 ++
arch/riscv/include/asm/fixmap.h | 2 +
arch/riscv/include/asm/patch.h | 12 ++
arch/riscv/include/asm/set_memory.h | 48 +++++++
arch/riscv/kernel/Makefile | 4 +-
arch/riscv/kernel/ftrace.c | 26 ++--
arch/riscv/kernel/patch.c | 128 +++++++++++++++++++
arch/riscv/kernel/traps.c | 3 +-
arch/riscv/kernel/vmlinux.lds.S | 11 +-
arch/riscv/mm/Makefile | 2 +-
arch/riscv/mm/init.c | 44 +++++++
arch/riscv/mm/pageattr.c | 187 ++++++++++++++++++++++++++++
13 files changed, 466 insertions(+), 15 deletions(-)
create mode 100644 arch/riscv/include/asm/patch.h
create mode 100644 arch/riscv/include/asm/set_memory.h
create mode 100644 arch/riscv/kernel/patch.c
create mode 100644 arch/riscv/mm/pageattr.c
--
2.26.0
next reply other threads:[~2020-04-08 7:57 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-08 7:56 Zong Li [this message]
2020-04-08 7:56 ` [PATCH v5 1/9] riscv: add macro to get instruction length Zong Li
2020-04-18 0:22 ` Palmer Dabbelt
2020-04-08 7:56 ` [PATCH v5 2/9] riscv: introduce interfaces to patch kernel code Zong Li
2020-04-09 1:12 ` Masami Hiramatsu
2020-04-18 0:22 ` Palmer Dabbelt
2020-04-08 7:56 ` [PATCH v5 3/9] riscv: patch code by fixmap mapping Zong Li
2020-04-18 0:22 ` Palmer Dabbelt
2020-04-08 7:56 ` [PATCH v5 4/9] riscv: add ARCH_HAS_SET_MEMORY support Zong Li
2020-04-08 7:57 ` [PATCH v5 5/9] riscv: add ARCH_HAS_SET_DIRECT_MAP support Zong Li
2020-04-08 7:57 ` [PATCH v5 6/9] riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support Zong Li
2020-04-08 7:57 ` [PATCH v5 7/9] riscv: move exception table immediately after RO_DATA Zong Li
2020-04-08 7:57 ` [PATCH v5 8/9] riscv: add alignment for text, rodata and data sections Zong Li
2020-04-08 7:57 ` [PATCH v5 9/9] riscv: add STRICT_KERNEL_RWX support Zong Li
2020-04-18 0:30 ` Palmer Dabbelt
2020-04-19 23:50 ` Damien Le Moal
2020-04-20 18:27 ` [PATCH v5 0/9] Support strict kernel memory permissions for security Palmer Dabbelt
2020-04-21 5:36 ` Zong Li
2020-04-21 6:20 ` Anup Patel
2020-04-21 6:29 ` Zong Li
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