* [PATCH v2 1/4] arm: dts: owl-s500: Fix incorrect PPI interrupt specifiers
2020-08-28 13:53 [PATCH v2 0/4] Add initial support for RoseapplePi SBC Cristian Ciocaltea
@ 2020-08-28 13:53 ` Cristian Ciocaltea
2020-08-31 9:19 ` Manivannan Sadhasivam
2020-08-28 13:53 ` [PATCH v2 2/4] dt-bindings: Add vendor prefix for RoseapplePi.org Cristian Ciocaltea
` (2 subsequent siblings)
3 siblings, 1 reply; 11+ messages in thread
From: Cristian Ciocaltea @ 2020-08-28 13:53 UTC (permalink / raw)
To: Andreas Färber, Manivannan Sadhasivam, Rob Herring, Peter Korsgaard
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-actions
The PPI interrupts for cortex-a9 were incorrectly specified, fix them.
Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
---
arch/arm/boot/dts/owl-s500.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 5ceb6cc4451d..1dbe4e8b38ac 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -84,21 +84,21 @@ scu: scu@b0020000 {
global_timer: timer@b0020200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xb0020200 0x100>;
- interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+ interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
status = "disabled";
};
twd_timer: timer@b0020600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xb0020600 0x20>;
- interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
status = "disabled";
};
twd_wdt: wdt@b0020620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0xb0020620 0xe0>;
- interrupts = <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+ interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
status = "disabled";
};
--
2.28.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/4] arm: dts: owl-s500: Fix incorrect PPI interrupt specifiers
2020-08-28 13:53 ` [PATCH v2 1/4] arm: dts: owl-s500: Fix incorrect PPI interrupt specifiers Cristian Ciocaltea
@ 2020-08-31 9:19 ` Manivannan Sadhasivam
2020-08-31 17:05 ` Cristian Ciocaltea
0 siblings, 1 reply; 11+ messages in thread
From: Manivannan Sadhasivam @ 2020-08-31 9:19 UTC (permalink / raw)
To: Cristian Ciocaltea
Cc: Andreas Färber, Rob Herring, Peter Korsgaard,
linux-arm-kernel, devicetree, linux-kernel, linux-actions
On 0828, Cristian Ciocaltea wrote:
> The PPI interrupts for cortex-a9 were incorrectly specified, fix them.
>
> Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm/boot/dts/owl-s500.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
> index 5ceb6cc4451d..1dbe4e8b38ac 100644
> --- a/arch/arm/boot/dts/owl-s500.dtsi
> +++ b/arch/arm/boot/dts/owl-s500.dtsi
> @@ -84,21 +84,21 @@ scu: scu@b0020000 {
> global_timer: timer@b0020200 {
> compatible = "arm,cortex-a9-global-timer";
> reg = <0xb0020200 0x100>;
> - interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> + interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> status = "disabled";
> };
>
> twd_timer: timer@b0020600 {
> compatible = "arm,cortex-a9-twd-timer";
> reg = <0xb0020600 0x20>;
> - interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> status = "disabled";
> };
>
> twd_wdt: wdt@b0020620 {
> compatible = "arm,cortex-a9-twd-wdt";
> reg = <0xb0020620 0xe0>;
> - interrupts = <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> + interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> status = "disabled";
> };
>
> --
> 2.28.0
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/4] arm: dts: owl-s500: Fix incorrect PPI interrupt specifiers
2020-08-31 9:19 ` Manivannan Sadhasivam
@ 2020-08-31 17:05 ` Cristian Ciocaltea
0 siblings, 0 replies; 11+ messages in thread
From: Cristian Ciocaltea @ 2020-08-31 17:05 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Andreas Färber, Rob Herring, Peter Korsgaard,
linux-arm-kernel, devicetree, linux-kernel, linux-actions
On Mon, Aug 31, 2020 at 02:49:25PM +0530, Manivannan Sadhasivam wrote:
> On 0828, Cristian Ciocaltea wrote:
> > The PPI interrupts for cortex-a9 were incorrectly specified, fix them.
> >
> > Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
> > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> > Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Cristi
> Thanks,
> Mani
>
> > ---
> > arch/arm/boot/dts/owl-s500.dtsi | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
> > index 5ceb6cc4451d..1dbe4e8b38ac 100644
> > --- a/arch/arm/boot/dts/owl-s500.dtsi
> > +++ b/arch/arm/boot/dts/owl-s500.dtsi
> > @@ -84,21 +84,21 @@ scu: scu@b0020000 {
> > global_timer: timer@b0020200 {
> > compatible = "arm,cortex-a9-global-timer";
> > reg = <0xb0020200 0x100>;
> > - interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> > + interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> > status = "disabled";
> > };
> >
> > twd_timer: timer@b0020600 {
> > compatible = "arm,cortex-a9-twd-timer";
> > reg = <0xb0020600 0x20>;
> > - interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> > status = "disabled";
> > };
> >
> > twd_wdt: wdt@b0020620 {
> > compatible = "arm,cortex-a9-twd-wdt";
> > reg = <0xb0020620 0xe0>;
> > - interrupts = <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> > + interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
> > status = "disabled";
> > };
> >
> > --
> > 2.28.0
> >
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 2/4] dt-bindings: Add vendor prefix for RoseapplePi.org
2020-08-28 13:53 [PATCH v2 0/4] Add initial support for RoseapplePi SBC Cristian Ciocaltea
2020-08-28 13:53 ` [PATCH v2 1/4] arm: dts: owl-s500: Fix incorrect PPI interrupt specifiers Cristian Ciocaltea
@ 2020-08-28 13:53 ` Cristian Ciocaltea
2020-08-31 9:28 ` Manivannan Sadhasivam
2020-09-22 8:13 ` Manivannan Sadhasivam
2020-08-28 13:53 ` [PATCH v2 3/4] dt-bindings: arm: actions: Document RoseapplePi Cristian Ciocaltea
2020-08-28 13:53 ` [PATCH v2 4/4] arm: dts: owl-s500: Add RoseapplePi Cristian Ciocaltea
3 siblings, 2 replies; 11+ messages in thread
From: Cristian Ciocaltea @ 2020-08-28 13:53 UTC (permalink / raw)
To: Andreas Färber, Manivannan Sadhasivam, Rob Herring, Peter Korsgaard
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-actions, Rob Herring
Add devicetree vendor prefix for RoseapplePi.org Foundation.
Website: http://roseapplepi.org/
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 63996ab03521..0b5bd97b4211 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -894,6 +894,8 @@ patternProperties:
description: Ronbo Electronics
"^roofull,.*":
description: Shenzhen Roofull Technology Co, Ltd
+ "^roseapplepi,.*":
+ description: RoseapplePi.org
"^samsung,.*":
description: Samsung Semiconductor
"^samtec,.*":
--
2.28.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: Add vendor prefix for RoseapplePi.org
2020-08-28 13:53 ` [PATCH v2 2/4] dt-bindings: Add vendor prefix for RoseapplePi.org Cristian Ciocaltea
@ 2020-08-31 9:28 ` Manivannan Sadhasivam
2020-09-22 8:13 ` Manivannan Sadhasivam
1 sibling, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2020-08-31 9:28 UTC (permalink / raw)
To: Cristian Ciocaltea
Cc: Andreas Färber, Rob Herring, Peter Korsgaard,
linux-arm-kernel, devicetree, linux-kernel, linux-actions,
Rob Herring
On 0828, Cristian Ciocaltea wrote:
> Add devicetree vendor prefix for RoseapplePi.org Foundation.
> Website: http://roseapplepi.org/
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> Acked-by: Rob Herring <robh@kernel.org>
Rob, are you going to take this patch? Else I'll take this through arm-soc tree!
Thanks,
Mani
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> index 63996ab03521..0b5bd97b4211 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> @@ -894,6 +894,8 @@ patternProperties:
> description: Ronbo Electronics
> "^roofull,.*":
> description: Shenzhen Roofull Technology Co, Ltd
> + "^roseapplepi,.*":
> + description: RoseapplePi.org
> "^samsung,.*":
> description: Samsung Semiconductor
> "^samtec,.*":
> --
> 2.28.0
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: Add vendor prefix for RoseapplePi.org
2020-08-28 13:53 ` [PATCH v2 2/4] dt-bindings: Add vendor prefix for RoseapplePi.org Cristian Ciocaltea
2020-08-31 9:28 ` Manivannan Sadhasivam
@ 2020-09-22 8:13 ` Manivannan Sadhasivam
1 sibling, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2020-09-22 8:13 UTC (permalink / raw)
To: Cristian Ciocaltea
Cc: Andreas Färber, Rob Herring, Peter Korsgaard,
linux-arm-kernel, devicetree, linux-kernel, linux-actions,
Rob Herring
On Fri, Aug 28, 2020 at 04:53:18PM +0300, Cristian Ciocaltea wrote:
> Add devicetree vendor prefix for RoseapplePi.org Foundation.
> Website: http://roseapplepi.org/
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> Acked-by: Rob Herring <robh@kernel.org>
Applied for v5.10!
Thanks,
Mani
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> index 63996ab03521..0b5bd97b4211 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> @@ -894,6 +894,8 @@ patternProperties:
> description: Ronbo Electronics
> "^roofull,.*":
> description: Shenzhen Roofull Technology Co, Ltd
> + "^roseapplepi,.*":
> + description: RoseapplePi.org
> "^samsung,.*":
> description: Samsung Semiconductor
> "^samtec,.*":
> --
> 2.28.0
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 3/4] dt-bindings: arm: actions: Document RoseapplePi
2020-08-28 13:53 [PATCH v2 0/4] Add initial support for RoseapplePi SBC Cristian Ciocaltea
2020-08-28 13:53 ` [PATCH v2 1/4] arm: dts: owl-s500: Fix incorrect PPI interrupt specifiers Cristian Ciocaltea
2020-08-28 13:53 ` [PATCH v2 2/4] dt-bindings: Add vendor prefix for RoseapplePi.org Cristian Ciocaltea
@ 2020-08-28 13:53 ` Cristian Ciocaltea
2020-08-28 13:53 ` [PATCH v2 4/4] arm: dts: owl-s500: Add RoseapplePi Cristian Ciocaltea
3 siblings, 0 replies; 11+ messages in thread
From: Cristian Ciocaltea @ 2020-08-28 13:53 UTC (permalink / raw)
To: Andreas Färber, Manivannan Sadhasivam, Rob Herring, Peter Korsgaard
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-actions, Rob Herring
Define compatible strings for RoseapplePi, a SBC manufactured
in Taiwan, based on Actions Semi S500 reference design.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/actions.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml
index ace3fdaa8396..787cd1b4f26c 100644
--- a/Documentation/devicetree/bindings/arm/actions.yaml
+++ b/Documentation/devicetree/bindings/arm/actions.yaml
@@ -18,6 +18,7 @@ properties:
- enum:
- allo,sparky # Allo.com Sparky
- cubietech,cubieboard6 # Cubietech CubieBoard6
+ - roseapplepi,roseapplepi # RoseapplePi.org RoseapplePi
- const: actions,s500
- items:
- enum:
--
2.28.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 4/4] arm: dts: owl-s500: Add RoseapplePi
2020-08-28 13:53 [PATCH v2 0/4] Add initial support for RoseapplePi SBC Cristian Ciocaltea
` (2 preceding siblings ...)
2020-08-28 13:53 ` [PATCH v2 3/4] dt-bindings: arm: actions: Document RoseapplePi Cristian Ciocaltea
@ 2020-08-28 13:53 ` Cristian Ciocaltea
2020-08-31 9:26 ` Manivannan Sadhasivam
3 siblings, 1 reply; 11+ messages in thread
From: Cristian Ciocaltea @ 2020-08-28 13:53 UTC (permalink / raw)
To: Andreas Färber, Manivannan Sadhasivam, Rob Herring, Peter Korsgaard
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-actions
Add a Device Tree for the RoseapplePi SBC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/owl-s500-roseapplepi.dts | 47 ++++++++++++++++++++++
2 files changed, 48 insertions(+)
create mode 100644 arch/arm/boot/dts/owl-s500-roseapplepi.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4572db3fa5ae..bff9ef996fbb 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -868,6 +868,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
dtb-$(CONFIG_ARCH_ACTIONS) += \
owl-s500-cubieboard6.dtb \
owl-s500-guitar-bb-rev-b.dtb \
+ owl-s500-roseapplepi.dtb \
owl-s500-sparky.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += \
prima2-evb.dtb
diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
new file mode 100644
index 000000000000..a2087e617cb2
--- /dev/null
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Roseapple Pi
+ *
+ * Copyright (C) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "owl-s500.dtsi"
+
+/ {
+ compatible = "roseapplepi,roseapplepi", "actions,s500";
+ model = "Roseapple Pi";
+
+ aliases {
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x80000000>; /* 2GB */
+ };
+
+ uart2_clk: uart2-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <921600>;
+ #clock-cells = <0>;
+ };
+};
+
+&twd_timer {
+ status = "okay";
+};
+
+&timer {
+ clocks = <&hosc>;
+};
+
+&uart2 {
+ status = "okay";
+ clocks = <&uart2_clk>;
+};
--
2.28.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 4/4] arm: dts: owl-s500: Add RoseapplePi
2020-08-28 13:53 ` [PATCH v2 4/4] arm: dts: owl-s500: Add RoseapplePi Cristian Ciocaltea
@ 2020-08-31 9:26 ` Manivannan Sadhasivam
2020-08-31 17:06 ` Cristian Ciocaltea
0 siblings, 1 reply; 11+ messages in thread
From: Manivannan Sadhasivam @ 2020-08-31 9:26 UTC (permalink / raw)
To: Cristian Ciocaltea
Cc: Andreas Färber, Rob Herring, Peter Korsgaard,
linux-arm-kernel, devicetree, linux-kernel, linux-actions
On 0828, Cristian Ciocaltea wrote:
> Add a Device Tree for the RoseapplePi SBC.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/owl-s500-roseapplepi.dts | 47 ++++++++++++++++++++++
> 2 files changed, 48 insertions(+)
> create mode 100644 arch/arm/boot/dts/owl-s500-roseapplepi.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 4572db3fa5ae..bff9ef996fbb 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -868,6 +868,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
> dtb-$(CONFIG_ARCH_ACTIONS) += \
> owl-s500-cubieboard6.dtb \
> owl-s500-guitar-bb-rev-b.dtb \
> + owl-s500-roseapplepi.dtb \
> owl-s500-sparky.dtb
> dtb-$(CONFIG_ARCH_PRIMA2) += \
> prima2-evb.dtb
> diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
> new file mode 100644
> index 000000000000..a2087e617cb2
> --- /dev/null
> +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
> @@ -0,0 +1,47 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Roseapple Pi
> + *
> + * Copyright (C) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> + */
> +
> +/dts-v1/;
> +
> +#include "owl-s500.dtsi"
> +
> +/ {
> + compatible = "roseapplepi,roseapplepi", "actions,s500";
> + model = "Roseapple Pi";
> +
> + aliases {
> + serial2 = &uart2;
> + };
> +
> + chosen {
> + stdout-path = "serial2:115200n8";
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x80000000>; /* 2GB */
> + };
> +
> + uart2_clk: uart2-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <921600>;
> + #clock-cells = <0>;
> + };
> +};
> +
> +&twd_timer {
> + status = "okay";
> +};
> +
> +&timer {
> + clocks = <&hosc>;
> +};
> +
> +&uart2 {
> + status = "okay";
> + clocks = <&uart2_clk>;
> +};
> --
> 2.28.0
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 4/4] arm: dts: owl-s500: Add RoseapplePi
2020-08-31 9:26 ` Manivannan Sadhasivam
@ 2020-08-31 17:06 ` Cristian Ciocaltea
0 siblings, 0 replies; 11+ messages in thread
From: Cristian Ciocaltea @ 2020-08-31 17:06 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Andreas Färber, Rob Herring, Peter Korsgaard,
linux-arm-kernel, devicetree, linux-kernel, linux-actions
On Mon, Aug 31, 2020 at 02:56:48PM +0530, Manivannan Sadhasivam wrote:
> On 0828, Cristian Ciocaltea wrote:
> > Add a Device Tree for the RoseapplePi SBC.
> >
> > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> > Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Cristi
> Thanks,
> Mani
>
> > ---
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/owl-s500-roseapplepi.dts | 47 ++++++++++++++++++++++
> > 2 files changed, 48 insertions(+)
> > create mode 100644 arch/arm/boot/dts/owl-s500-roseapplepi.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 4572db3fa5ae..bff9ef996fbb 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -868,6 +868,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
> > dtb-$(CONFIG_ARCH_ACTIONS) += \
> > owl-s500-cubieboard6.dtb \
> > owl-s500-guitar-bb-rev-b.dtb \
> > + owl-s500-roseapplepi.dtb \
> > owl-s500-sparky.dtb
> > dtb-$(CONFIG_ARCH_PRIMA2) += \
> > prima2-evb.dtb
> > diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
> > new file mode 100644
> > index 000000000000..a2087e617cb2
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
> > @@ -0,0 +1,47 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Roseapple Pi
> > + *
> > + * Copyright (C) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "owl-s500.dtsi"
> > +
> > +/ {
> > + compatible = "roseapplepi,roseapplepi", "actions,s500";
> > + model = "Roseapple Pi";
> > +
> > + aliases {
> > + serial2 = &uart2;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial2:115200n8";
> > + };
> > +
> > + memory@0 {
> > + device_type = "memory";
> > + reg = <0x0 0x80000000>; /* 2GB */
> > + };
> > +
> > + uart2_clk: uart2-clk {
> > + compatible = "fixed-clock";
> > + clock-frequency = <921600>;
> > + #clock-cells = <0>;
> > + };
> > +};
> > +
> > +&twd_timer {
> > + status = "okay";
> > +};
> > +
> > +&timer {
> > + clocks = <&hosc>;
> > +};
> > +
> > +&uart2 {
> > + status = "okay";
> > + clocks = <&uart2_clk>;
> > +};
> > --
> > 2.28.0
> >
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