[PATCH v6 0/2] hwspinlock: add sun6i hardware spinlock support

[PATCH v6 0/2] hwspinlock: add sun6i hardware spinlock support

[Wilken Gottwalt]

Most of the Allwinner sun6i compatible devices contain a spinlock unit
which can be used to sync access to devices shared between the ARM cores
and the embedded companion core. According to the datasheets at least 32
spinlocks are supported. The implementation supports 32, 64, 128 and 256
spinlock setups, but there is no known SoC yet, which implements more
than 32 spinlocks.

This driver adds support for this hardware spinlock unit to Linux
including all 4 possible setups. The driver reports the found setup via
debugfs. It can be build as a builtin and normal module by using the
HWSPINLOCK_SUN8I symbol.

This driver is the first step to enable hwspinlock support in Linux, but
also requires support in the firmware of the companion core. This patch
provides the driver and binding documentation but is not yet included
into the sunxi files. Also not every sunxi seem to have support for this
hardware, but it can be found in sun6i, sun8i, sun9i and sun50i devices.

The spinlock hardware has two ways to figure out if a lock is taken. The
lock can simply be readi, or bits of a 32bit wide status register can be
checked. The status register only supports the first 32 locks and may
not cover bigger spinlock setups. Therefore reading/writing a specific
spinlock is used in the driver for checking the status of a lock.

The status register is now free for debugging/testing purposes and can
completely bypass the Linux hwspinlock ABI. This status register will be
used in some additional kernel modules to test the hwspinlock driver.

Testing the driver.

To run all tests it is necessary to take locks on the companion core and
show on the Linux side that the locks were taken by an external event.
This can be achived by using an Allwinner SoC which includes an OpenRisc
companion core and can use the free crust firmware. For this the crust
firmware needs to be changed to take and release spinlocks (a simple
MMIO operation on the hwlock registers), which is currently not
supported by the current crust firmware. The necessary crust fork can
be found here https://github.com/wgottwalt/crust (hwspinlock branch).
It is also necessary to build u-boot with support for this crust/SCP
firmware. This u-boot fork can be found here
https://github.com/crust-firmware/u-boot (crust branch).

To test this driver it is also necessary to pick a device that is fully
supported by the crust firmware. For this the H5 based Friendlyarm
NanoPi NEO2 was used. It is fully supported by u-boot (and the fork),
the crust firmware (via H5 target) and current Linux kernels. In the
crust fork it is necessary to go into debug menu of "make nconfig" and
select the hwspinlock test loop. This debug option enables a loop that
goes through the first 32 spinlocks. It takes/releases a lock one after
another using the timeout functions (and hw timers) of the crust
firmware. A timeout can be set in the debug menu.

Test 1:

This test was done using a mainline u-boot and a crust enabled u-boot.
For this a simple second kernel module was used, which can be found here
https://github.com/wgottwalt/sunxi_hwspinlock/tree/main/test.

Using mainline u-boot it shows that the Linux side correctly takes a
lock, tries to recursively take a lock again (which does not happen) and
releases a lock. This is done for all 32 locks several times.

# modprobe sun6i_hwspinlock_test
[  472.182172] [init]--- SUN6I HWSPINLOCK DRIVER TEST ---
[  472.187491] [run ]--- testing locks 0 to 31 ---
[  472.192058] [test] testing lock 0
[  472.195371] [test]+++ attempt #0 succeded
[  472.199394] [test]+++ attempt #1 succeded
[  472.203411] [test]+++ attempt #2 succeded
[  472.207433] [test] testing lock 1
[  472.210755] [test]+++ attempt #0 succeded
...
[  472.665684] [test]+++ attempt #2 succeded
[  472.669704] [test] testing lock 31
[  472.673117] [test]+++ attempt #0 succeded
[  472.677137] [test]+++ attempt #1 succeded
[  472.681152] [test]+++ attempt #2 succeded

If the same test is done with the hwspinlock loop enabled crust firmware
and the crust enabled u-boot fork, the Linux test kernel module hits the
one lock taken by the crust firmware.

# modprobe sun6i_hwspinlock_test
...
[  945.871840] [test]+++ attempt #1 succeded
[  945.875854] [test]+++ attempt #2 succeded
[  945.879875] [test] testing lock 18
[  945.883273] [test]+++ attempt #0 succeded
[  945.887293] [test]+++ attempt #1 succeded
[  945.891310] [test]+++ attempt #2 succeded
[  945.895329] [test] testing lock 19
[  945.898738] [test] taking lock attempt #0 failed (-16)
[  945.903886] [run ]--- testing specific lock 19 failed (-14) ---
[  945.909811] [test] testing lock 20
[  945.913224] [test]+++ attempt #0 succeded
[  945.917245] [test]+++ attempt #1 succeded
[  945.921265] [test]+++ attempt #2 succeded
[  945.925281] [test] testing lock 21
[  945.928694] [test]+++ attempt #0 succeded
[  945.932709] [test]+++ attempt #1 succeded
...

Test 2:

This is a more complex test which uses the status register to bypass the
Linux hwspinlock ABI. For this to work a slightly modified driver is
used. It can be found here
https://github.com/wgottwalt/sunxi_hwspinlock/tree/main/modified.
This modified driver splits the 4K memory range into two and leaves the
status register untouched. It can now be used by another test kernel
module, which can be found here
https://github.com/wgottwalt/sunxi_hwspinlock/tree/main/test2.
It is also necessary to change the device tree entries to get both
kernel modules working in parallel.

hwspinlock-mod@1c18000 {
        compatible = "allwinner,sun6i-a31-hwspinlock-mod";
        reg = <0x01c18000 0x4 0x01c18100 0x400>;
        clocks = <&ccu CLK_BUS_SPINLOCK>;
        clock-names = "ahb";
        resets = <&ccu RST_BUS_SPINLOCK>;
        reset-names = "ahb";
        status = "okay";
};

hwspinlock-stat@1c18010 {
        compatible = "allwinner,sun6i-a31-hwspinlock-stat";
        reg = <0x01c18010 0x4>;
        status = "okay";
};

The extended test kernel module supports four different modes to test
the hwspinlocks. Two of them are sufficient to show the spinlock
mechanism working.

Test 2 Mode 1:

This test reads and prints the status register continuously. The crust
firmware and the test are set to a hwspinlock timeout of one second. The
test kernel module code runs a bit slower because of more code executed
and all the printing. Because of that you can see how one lock is missed
completely between entry 8 and 9.

# modprobe sun6i_hwspinlock_test2 mode=1 loops=10
[  179.611838] [init]--- SUN6I HWSPINLOCK DRIVER ENHANCED TEST ---
[  179.618114] [sreg] 10000000_00000000_00000000_00000000
[  180.643989] [sreg] 01000000_00000000_00000000_00000000
[  181.668006] [sreg] 00100000_00000000_00000000_00000000
[  182.691985] [sreg] 00010000_00000000_00000000_00000000
[  183.715985] [sreg] 00001000_00000000_00000000_00000000
[  184.739987] [sreg] 00000100_00000000_00000000_00000000
[  185.763986] [sreg] 00000010_00000000_00000000_00000000
[  186.787985] [sreg] 00000001_00000000_00000000_00000000
[  187.811985] [sreg] 00000000_01000000_00000000_00000000
[  188.835985] [sreg] 00000000_00100000_00000000_00000000

Test 2 Mode 3:

This test combines the Linux hwspinlock ABI approach from the first test
and the status register access. The "after" reads show the locks taken
by both sides until the Linux hwspinlock driver tries to take the lock
taken by the crust firmware.

# modprobe sun6i_hwspinlock_test2 mode=3
[  454.734821] [init]--- SUN6I HWSPINLOCK DRIVER ENHANCED TEST ---
...
[  455.897153] [test]+++ attempt #1 succeded
[  455.901178] [sreg] before take 00000000_00000000_00000000_00100000
[  455.907372] [sreg] after take 00000000_00000000_00000000_01100000
[  455.913478] [sreg] after recursive take 00000000_00000000_00000000_01100000
[  455.920455] [sreg] after untake 00000000_00000000_00000000_00100000
[  455.926721] [test]+++ attempt #2 succeded
[  455.930741] [test] testing lock 26
[  455.934157] [sreg] before take 00000000_00000000_00000000_00100000
[  455.940345] [test] taking lock attempt #0 failed (-16)
[  455.945492] [run ]--- testing specific lock 26 failed (-14) ---
[  455.951419] [test] testing lock 27
[  455.954836] [sreg] before take 00000000_00000000_00000000_00100000
[  455.961034] [sreg] after take 00000000_00000000_00000000_00110000
[  455.967135] [sreg] after recursive take 00000000_00000000_00000000_00110000
[  455.974109] [sreg] after untake 00000000_00000000_00000000_00100000
[  455.980375] [test]+++ attempt #0 succeded
[  455.984400] [sreg] before take 00000000_00000000_00000000_00100000

This patch adds:
- hwspinlock driver sun6i_hwspinlock
- updates makefiles
- hwspinlock dt bindings documentation
- updates MAINTAINERS

Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>

Changes in v6:
  - fixed formating and name issues in dt documentation
  - changed probe/remove function to use classic functions to better handle
    failure situations

Changes in v5:
  - changed symbols to earliest known supported SoC (A31)
  - simplified dt documentation
  - fixed several types
  - updated test description
  - changed init back to classic probe/remove callbacks

Changes in v4:
  - changed binding from sun8i-hwspinlock to sun8i-a33-hwspinlock
  - fixed several issues in the dt documentation
  - further simplified driver
  - fixed an add_action_and_reset_* function issue
  - fixed some typos

Changes in v3:
  - moved test description to cover letter
  - changed name and symbols from sunxi to sun8i
  - improved driver description
  - further simplified driver
  - fully switched to devm_* and devm_add_action_* functions

Changes in v2:
  - redone coverletter
  - fixed ranges in the device tree description
  - added suggestions from Bjorn Andersson and Maxime Ripard to the driver
  - provided better driver and test description

Wilken Gottwalt (2):
  dt-bindings: hwlock: add sun6i_hwspinlock
  hwspinlock: add sun6i hardware spinlock support

 .../hwlock/allwinner,sun6i-hwspinlock.yaml    |  45 ++++
 MAINTAINERS                                   |   6 +
 drivers/hwspinlock/Kconfig                    |   9 +
 drivers/hwspinlock/Makefile                   |   1 +
 drivers/hwspinlock/sun6i_hwspinlock.c         | 217 ++++++++++++++++++
 5 files changed, 278 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwlock/allwinner,sun6i-hwspinlock.yaml
 create mode 100644 drivers/hwspinlock/sun6i_hwspinlock.c

-- 
2.30.1

[PATCH v6 1/2] dt-bindings: hwlock: add sun6i_hwspinlock

[Wilken Gottwalt]

Adds documentation on how to use the sun6i_hwspinlock driver for sun6i
compatible series SoCs.

Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
---
Changes in v6:
  - fixed formating and name issues in dt documentation

Changes in v5:
  - changed binding to earliest known supported SoC sun6i-a31
  - dropped unnecessary entries

Changes in v4:
  - changed binding to sun8i-a33-hwpinlock
  - added changes suggested by Maxime Ripard

Changes in v3:
  - changed symbols from sunxi to sun8i

Changes in v2:
  - fixed memory ranges
---
 .../hwlock/allwinner,sun6i-hwspinlock.yaml    | 45 +++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwlock/allwinner,sun6i-hwspinlock.yaml

diff --git a/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-hwspinlock.yaml
new file mode 100644
index 000000000000..733c3d01e56c
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-hwspinlock.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwlock/allwinner,sun6i-hwspinlock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SUN6I hardware spinlock driver for Allwinner sun6i compatible SoCs
+
+maintainers:
+  - Wilken Gottwalt <wilken.gottwalt@posteo.net>
+
+description:
+  The hardware unit provides semaphores between the ARM cores and the embedded
+  companion core on the SoC.
+
+properties:
+  compatible:
+    const: allwinner,sun6i-a31-hwspinlock
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+
+additionalProperties: false
+
+examples:
+  - |
+    hwlock@1c18000 {
+        compatible = "allwinner,sun6i-a31-hwspinlock";
+        reg = <0x01c18000 0x1000>;
+        clocks = <&ccu CLK_BUS_SPINLOCK>;
+        resets = <&ccu RST_BUS_SPINLOCK>;
+    };
+...
-- 
2.30.1

[PATCH v6 2/2] hwspinlock: add sun6i hardware spinlock support

[Wilken Gottwalt]

Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in
most of the sun6i compatible SoCs.

This unit provides at least 32 spinlocks in hardware. The implementation
supports 32, 64, 128 or 256 32bit registers. A lock can be taken by
reading a register and released by writing a 0 to it. This driver
supports all 4 spinlock setups, but for now only the first setup (32
locks) seem to exist in available devices. This spinlock unit is shared
between all ARM cores and the embedded companion core. All of them can
take/release a lock with a single cycle operation. It can be used to
sync access to devices shared by the ARM cores and the companion core.

There are two ways to check if a lock is taken. The first way is to read
a lock. If a 0 is returned, the lock was free and is taken now. If an 1
is returned, the caller has to try again. Which means the lock is taken.
The second way is to read a 32bit wide status register where every bit
represents one of the 32 first locks. According to the datasheets this
status register supports only the 32 first locks. This is the reason the
first way (lock read/write) approach is used to be able to cover all 256
locks in future devices. The driver also reports the amount of supported
locks via debugfs.

Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
---
Changes in v6:
  - changed probe/remove function to use classic functions to better
    handle failure situations

Changes in v5:
  - changed symbols to the earliest known supported SoC (sun6i/a31)
  - changed init back to classic probe/remove callbacks

Changes in v4:
  - further simplified driver
  - fixed an add_action_and_reset_ function issue
  - changed bindings from sun8i-hwspinlock to sun8i-a33-hwspinlock

Changes in v3:
  - moved test description to cover letter
  - changed name and symbols from sunxi to sun8i
  - improved driver description
  - further simplified driver
  - fully switched to devm_* and devm_add_action_* functions

Changes in v2:
  - added suggestions from Bjorn Andersson and Maxime Ripard
  - provided better driver and test description
---
 MAINTAINERS                           |   6 +
 drivers/hwspinlock/Kconfig            |   9 ++
 drivers/hwspinlock/Makefile           |   1 +
 drivers/hwspinlock/sun6i_hwspinlock.c | 217 ++++++++++++++++++++++++++
 4 files changed, 233 insertions(+)
 create mode 100644 drivers/hwspinlock/sun6i_hwspinlock.c

diff --git a/MAINTAINERS b/MAINTAINERS
index d92f85ca831d..d5821c52c502 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -734,6 +734,12 @@ L:	linux-crypto@vger.kernel.org
 S:	Maintained
 F:	drivers/crypto/allwinner/
 
+ALLWINNER HARDWARE SPINLOCK SUPPORT
+M:	Wilken Gottwalt <wilken.gottwalt@posteo.net>
+S:	Maintained
+F:	Documentation/devicetree/bindings/hwlock/allwinner,sun6i-hwspinlock.yaml
+F:	drivers/hwspinlock/sun6i_hwspinlock.c
+
 ALLWINNER THERMAL DRIVER
 M:	Vasily Khoruzhick <anarsoul@gmail.com>
 M:	Yangtao Li <tiny.windzz@gmail.com>
diff --git a/drivers/hwspinlock/Kconfig b/drivers/hwspinlock/Kconfig
index 32cd26352f38..56ecc1aa3166 100644
--- a/drivers/hwspinlock/Kconfig
+++ b/drivers/hwspinlock/Kconfig
@@ -55,6 +55,15 @@ config HWSPINLOCK_STM32
 
 	  If unsure, say N.
 
+config HWSPINLOCK_SUN6I
+	tristate "SUN6I Hardware Spinlock device"
+	depends on ARCH_SUNXI || COMPILE_TEST
+	help
+	  Say y here to support the SUN6I Hardware Spinlock device which can be
+	  found in most of the sun6i compatible Allwinner SoCs.
+
+	  If unsure, say N.
+
 config HSEM_U8500
 	tristate "STE Hardware Semaphore functionality"
 	depends on ARCH_U8500 || COMPILE_TEST
diff --git a/drivers/hwspinlock/Makefile b/drivers/hwspinlock/Makefile
index ed053e3f02be..83ec4f03decc 100644
--- a/drivers/hwspinlock/Makefile
+++ b/drivers/hwspinlock/Makefile
@@ -9,4 +9,5 @@ obj-$(CONFIG_HWSPINLOCK_QCOM)		+= qcom_hwspinlock.o
 obj-$(CONFIG_HWSPINLOCK_SIRF)		+= sirf_hwspinlock.o
 obj-$(CONFIG_HWSPINLOCK_SPRD)		+= sprd_hwspinlock.o
 obj-$(CONFIG_HWSPINLOCK_STM32)		+= stm32_hwspinlock.o
+obj-$(CONFIG_HWSPINLOCK_SUN6I)		+= sun6i_hwspinlock.o
 obj-$(CONFIG_HSEM_U8500)		+= u8500_hsem.o
diff --git a/drivers/hwspinlock/sun6i_hwspinlock.c b/drivers/hwspinlock/sun6i_hwspinlock.c
new file mode 100644
index 000000000000..98193c75d81b
--- /dev/null
+++ b/drivers/hwspinlock/sun6i_hwspinlock.c
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * sun6i_hwspinlock.c - hardware spinlock driver for sun6i compatible Allwinner SoCs
+ * Copyright (C) 2020 Wilken Gottwalt <wilken.gottwalt@posteo.net>
+ */
+
+#include <linux/clk.h>
+#include <linux/debugfs.h>
+#include <linux/errno.h>
+#include <linux/hwspinlock.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
+#include "hwspinlock_internal.h"
+
+#define DRIVER_NAME		"sun6i_hwspinlock"
+
+#define SPINLOCK_BASE_ID	0 /* there is only one hwspinlock device per SoC */
+#define SPINLOCK_SYSSTATUS_REG	0x0000
+#define SPINLOCK_LOCK_REGN	0x0100
+#define SPINLOCK_NOTTAKEN	0
+
+struct sun6i_hwspinlock_data {
+	struct hwspinlock_device *bank;
+	struct reset_control *reset;
+	struct clk *ahb_clk;
+	struct dentry *debugfs;
+	int nlocks;
+};
+
+#ifdef CONFIG_DEBUG_FS
+
+static int hwlocks_supported_show(struct seq_file *seqf, void *unused)
+{
+	struct sun6i_hwspinlock_data *priv = seqf->private;
+
+	seq_printf(seqf, "%d\n", priv->nlocks);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(hwlocks_supported);
+
+static void sun6i_hwspinlock_debugfs_init(struct sun6i_hwspinlock_data *priv)
+{
+	priv->debugfs = debugfs_create_dir(DRIVER_NAME, NULL);
+	debugfs_create_file("supported", 0444, priv->debugfs, priv, &hwlocks_supported_fops);
+}
+
+#else
+
+static void sun6i_hwspinlock_debugfs_init(struct sun6i_hwspinlock_data *priv)
+{
+}
+
+#endif
+
+static int sun6i_hwspinlock_trylock(struct hwspinlock *lock)
+{
+	void __iomem *lock_addr = lock->priv;
+
+	return (readl(lock_addr) == SPINLOCK_NOTTAKEN);
+}
+
+static void sun6i_hwspinlock_unlock(struct hwspinlock *lock)
+{
+	void __iomem *lock_addr = lock->priv;
+
+	writel(SPINLOCK_NOTTAKEN, lock_addr);
+}
+
+static const struct hwspinlock_ops sun6i_hwspinlock_ops = {
+	.trylock	= sun6i_hwspinlock_trylock,
+	.unlock		= sun6i_hwspinlock_unlock,
+};
+
+static int sun6i_hwspinlock_probe(struct platform_device *pdev)
+{
+	struct sun6i_hwspinlock_data *priv;
+	struct hwspinlock *hwlock;
+	void __iomem *io_base;
+	u32 num_banks;
+	int err, i;
+
+	io_base = devm_platform_ioremap_resource(pdev, SPINLOCK_BASE_ID);
+	if (IS_ERR(io_base))
+		return PTR_ERR(io_base);
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->ahb_clk = devm_clk_get(&pdev->dev, "ahb");
+	if (IS_ERR(priv->ahb_clk)) {
+		err = PTR_ERR(priv->ahb_clk);
+		dev_err(&pdev->dev, "unable to get AHB clock (%d)\n", err);
+		return err;
+	}
+
+	priv->reset = devm_reset_control_get(&pdev->dev, "ahb");
+	if (IS_ERR(priv->reset))
+		return dev_err_probe(&pdev->dev, PTR_ERR(priv->reset),
+				     "unable to get reset control\n");
+
+	err = reset_control_deassert(priv->reset);
+	if (err) {
+		dev_err(&pdev->dev, "deassert reset control failure (%d)\n", err);
+		return err;
+	}
+
+	err = clk_prepare_enable(priv->ahb_clk);
+	if (err) {
+		dev_err(&pdev->dev, "unable to prepare AHB clk (%d)\n", err);
+		goto clk_fail;
+	}
+
+	/*
+	 * bit 28 and 29 represents the hwspinlock setup
+	 *
+	 * every datasheet (A64, A80, A83T, H3, H5, H6 ...) says the default value is 0x1 and 0x1
+	 * to 0x4 represent 32, 64, 128 and 256 locks
+	 * but later datasheets (H5, H6) say 00, 01, 10, 11 represent 32, 64, 128 and 256 locks,
+	 * but that would mean H5 and H6 have 64 locks, while their datasheets talk about 32 locks
+	 * all the time, not a single mentioning of 64 locks
+	 * the 0x4 value is also not representable by 2 bits alone, so some datasheets are not
+	 * correct
+	 * one thing have all in common, default value of the sysstatus register is 0x10000000,
+	 * which results in bit 28 being set
+	 * this is the reason 0x1 is considered being 32 locks and bit 30 is taken into account
+	 * verified on H2+ (datasheet 0x1 = 32 locks) and H5 (datasheet 01 = 64 locks)
+	 */
+	num_banks = readl(io_base + SPINLOCK_SYSSTATUS_REG) >> 28;
+	switch (num_banks) {
+	case 1 ... 4:
+		priv->nlocks = 1 << (4 + num_banks);
+		break;
+	default:
+		err = -EINVAL;
+		dev_err(&pdev->dev, "unsupported hwspinlock setup (%d)\n", num_banks);
+		goto bank_fail;
+	}
+
+	priv->bank = devm_kzalloc(&pdev->dev, struct_size(priv->bank, lock, priv->nlocks),
+				  GFP_KERNEL);
+	if (!priv->bank) {
+		err = -ENOMEM;
+		goto bank_fail;
+	}
+
+	for (i = 0; i < priv->nlocks; ++i) {
+		hwlock = &priv->bank->lock[i];
+		hwlock->priv = io_base + SPINLOCK_LOCK_REGN + sizeof(u32) * i;
+	}
+
+	/* failure of debugfs is considered non-fatal */
+	sun6i_hwspinlock_debugfs_init(priv);
+	if (IS_ERR(priv->debugfs))
+		priv->debugfs = NULL;
+
+	platform_set_drvdata(pdev, priv);
+
+	err = hwspin_lock_register(priv->bank, &pdev->dev, &sun6i_hwspinlock_ops, SPINLOCK_BASE_ID,
+				   priv->nlocks);
+	if (err == 0)
+		return 0;
+
+bank_fail:
+	clk_disable_unprepare(priv->ahb_clk);
+clk_fail:
+	reset_control_assert(priv->reset);
+
+	return err;
+}
+
+static int sun6i_hwspinlock_remove(struct platform_device *pdev)
+{
+	struct sun6i_hwspinlock_data *priv = platform_get_drvdata(pdev);
+	int err;
+
+	debugfs_remove_recursive(priv->debugfs);
+
+	err = hwspin_lock_unregister(priv->bank);
+	if (err) {
+		dev_err(&pdev->dev, "unregister device failed (%d)\n", err);
+		return err;
+	}
+
+	clk_disable_unprepare(priv->ahb_clk);
+	reset_control_assert(priv->reset);
+
+	return 0;
+}
+
+static const struct of_device_id sun6i_hwspinlock_ids[] = {
+	{ .compatible = "allwinner,sun6i-a31-hwspinlock", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, sun6i_hwspinlock_ids);
+
+static struct platform_driver sun6i_hwspinlock_driver = {
+	.probe	= sun6i_hwspinlock_probe,
+	.remove	= sun6i_hwspinlock_remove,
+	.driver	= {
+		.name		= DRIVER_NAME,
+		.of_match_table	= sun6i_hwspinlock_ids,
+	},
+};
+module_platform_driver(sun6i_hwspinlock_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("SUN6I hardware spinlock driver");
+MODULE_AUTHOR("Wilken Gottwalt <wilken.gottwalt@posteo.net>");
-- 
2.30.1

Re: [PATCH v6 1/2] dt-bindings: hwlock: add sun6i_hwspinlock

[Maxime Ripard]

On Sat, Feb 27, 2021 at 02:03:28PM +0100, Wilken Gottwalt wrote:
> Adds documentation on how to use the sun6i_hwspinlock driver for sun6i
> compatible series SoCs.
>
> Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> ---
> Changes in v6:
>   - fixed formating and name issues in dt documentation
>
> Changes in v5:
>   - changed binding to earliest known supported SoC sun6i-a31
>   - dropped unnecessary entries
>
> Changes in v4:
>   - changed binding to sun8i-a33-hwpinlock
>   - added changes suggested by Maxime Ripard
>
> Changes in v3:
>   - changed symbols from sunxi to sun8i
>
> Changes in v2:
>   - fixed memory ranges
> ---
>  .../hwlock/allwinner,sun6i-hwspinlock.yaml    | 45 +++++++++++++++++++

The name of the file doesn't match the compatible, once fixed:
Acked-by: Maxime Ripard <mripard@kernel.org>

Maxime

Re: [PATCH v6 2/2] hwspinlock: add sun6i hardware spinlock support

[Maxime Ripard]

On Sat, Feb 27, 2021 at 02:03:54PM +0100, Wilken Gottwalt wrote:
> Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in
> most of the sun6i compatible SoCs.
>
> This unit provides at least 32 spinlocks in hardware. The implementation
> supports 32, 64, 128 or 256 32bit registers. A lock can be taken by
> reading a register and released by writing a 0 to it. This driver
> supports all 4 spinlock setups, but for now only the first setup (32
> locks) seem to exist in available devices. This spinlock unit is shared
> between all ARM cores and the embedded companion core. All of them can
> take/release a lock with a single cycle operation. It can be used to
> sync access to devices shared by the ARM cores and the companion core.
>
> There are two ways to check if a lock is taken. The first way is to read
> a lock. If a 0 is returned, the lock was free and is taken now. If an 1
> is returned, the caller has to try again. Which means the lock is taken.
> The second way is to read a 32bit wide status register where every bit
> represents one of the 32 first locks. According to the datasheets this
> status register supports only the 32 first locks. This is the reason the
> first way (lock read/write) approach is used to be able to cover all 256
> locks in future devices. The driver also reports the amount of supported
> locks via debugfs.
>
> Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>

Didn't I review this one already?
Maxime

Re: [PATCH v6 2/2] hwspinlock: add sun6i hardware spinlock support

[Wilken Gottwalt]

On Mon, 1 Mar 2021 14:13:05 +0100
Maxime Ripard <mripard@kernel.org> wrote:

> On Sat, Feb 27, 2021 at 02:03:54PM +0100, Wilken Gottwalt wrote:
> > Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in
> > most of the sun6i compatible SoCs.
> >
> > This unit provides at least 32 spinlocks in hardware. The implementation
> > supports 32, 64, 128 or 256 32bit registers. A lock can be taken by
> > reading a register and released by writing a 0 to it. This driver
> > supports all 4 spinlock setups, but for now only the first setup (32
> > locks) seem to exist in available devices. This spinlock unit is shared
> > between all ARM cores and the embedded companion core. All of them can
> > take/release a lock with a single cycle operation. It can be used to
> > sync access to devices shared by the ARM cores and the companion core.
> >
> > There are two ways to check if a lock is taken. The first way is to read
> > a lock. If a 0 is returned, the lock was free and is taken now. If an 1
> > is returned, the caller has to try again. Which means the lock is taken.
> > The second way is to read a 32bit wide status register where every bit
> > represents one of the 32 first locks. According to the datasheets this
> > status register supports only the 32 first locks. This is the reason the
> > first way (lock read/write) approach is used to be able to cover all 256
> > locks in future devices. The driver also reports the amount of supported
> > locks via debugfs.
> >
> > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>

Nope, I had to replace the devm_hwspin_lock_register function by the
hwspin_lock_register function because like Bjorn pointed out that it can
fail and needs to handled correctly. And having a devm_* function does not
play well with the non-devm clock/reset functions and winding back if an
error occurs. It also messes with the call order in the remove function. So
I went back to the classic way where I have full control over the call order.

> Didn't I review this one already?
> Maxime

Re: [PATCH v6 1/2] dt-bindings: hwlock: add sun6i_hwspinlock

[Wilken Gottwalt]

On Mon, 1 Mar 2021 14:12:44 +0100
Maxime Ripard <mripard@kernel.org> wrote:

> On Sat, Feb 27, 2021 at 02:03:28PM +0100, Wilken Gottwalt wrote:
> > Adds documentation on how to use the sun6i_hwspinlock driver for sun6i
> > compatible series SoCs.
> >
> > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> > ---
> > Changes in v6:
> >   - fixed formating and name issues in dt documentation
> >
> > Changes in v5:
> >   - changed binding to earliest known supported SoC sun6i-a31
> >   - dropped unnecessary entries
> >
> > Changes in v4:
> >   - changed binding to sun8i-a33-hwpinlock
> >   - added changes suggested by Maxime Ripard
> >
> > Changes in v3:
> >   - changed symbols from sunxi to sun8i
> >
> > Changes in v2:
> >   - fixed memory ranges
> > ---
> >  .../hwlock/allwinner,sun6i-hwspinlock.yaml    | 45 +++++++++++++++++++
> 
> The name of the file doesn't match the compatible, once fixed:
> Acked-by: Maxime Ripard <mripard@kernel.org>

This is something that still confuses me. What if you have more than one
compatible string? This won't be solvable. See the qcom binding for example,
there are two strings and none matches. In the omap bindings are also two
strings and only one matches. In all cases, including mine, the bindings
check script is fine with that.

So, you basically want it to be called "allwinner,sun6i-a31-hwspinlock.yaml"?

Sorry if I come up with this, but I don't want to just do it, I want to
understand it.

> Maxime

Re: [PATCH v6 2/2] hwspinlock: add sun6i hardware spinlock support

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 2562 bytes --]

Hi,

On Mon, Mar 01, 2021 at 03:06:08PM +0100, Wilken Gottwalt wrote:
> On Mon, 1 Mar 2021 14:13:05 +0100
> Maxime Ripard <mripard@kernel.org> wrote:
> 
> > On Sat, Feb 27, 2021 at 02:03:54PM +0100, Wilken Gottwalt wrote:
> > > Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in
> > > most of the sun6i compatible SoCs.
> > >
> > > This unit provides at least 32 spinlocks in hardware. The implementation
> > > supports 32, 64, 128 or 256 32bit registers. A lock can be taken by
> > > reading a register and released by writing a 0 to it. This driver
> > > supports all 4 spinlock setups, but for now only the first setup (32
> > > locks) seem to exist in available devices. This spinlock unit is shared
> > > between all ARM cores and the embedded companion core. All of them can
> > > take/release a lock with a single cycle operation. It can be used to
> > > sync access to devices shared by the ARM cores and the companion core.
> > >
> > > There are two ways to check if a lock is taken. The first way is to read
> > > a lock. If a 0 is returned, the lock was free and is taken now. If an 1
> > > is returned, the caller has to try again. Which means the lock is taken.
> > > The second way is to read a 32bit wide status register where every bit
> > > represents one of the 32 first locks. According to the datasheets this
> > > status register supports only the 32 first locks. This is the reason the
> > > first way (lock read/write) approach is used to be able to cover all 256
> > > locks in future devices. The driver also reports the amount of supported
> > > locks via debugfs.
> > >
> > > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> 
> Nope, I had to replace the devm_hwspin_lock_register function by the
> hwspin_lock_register function because like Bjorn pointed out that it can
> fail and needs to handled correctly. And having a devm_* function does not
> play well with the non-devm clock/reset functions and winding back if an
> error occurs. It also messes with the call order in the remove function. So
> I went back to the classic way where I have full control over the call order.

If you're talking about the clock and reset line reassertion, I don't
really see what the trouble is. Sure, it's not going to be in the exact
same order in remove, but it's still going to execute in the proper
order (ie, clock disable, then reset disable, then clock put and reset
put). And you can use devm_add_action if you want to handle things
automatically.

Maxime

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v6 1/2] dt-bindings: hwlock: add sun6i_hwspinlock

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 1799 bytes --]

On Mon, Mar 01, 2021 at 03:06:35PM +0100, Wilken Gottwalt wrote:
> On Mon, 1 Mar 2021 14:12:44 +0100
> Maxime Ripard <mripard@kernel.org> wrote:
> 
> > On Sat, Feb 27, 2021 at 02:03:28PM +0100, Wilken Gottwalt wrote:
> > > Adds documentation on how to use the sun6i_hwspinlock driver for sun6i
> > > compatible series SoCs.
> > >
> > > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> > > ---
> > > Changes in v6:
> > >   - fixed formating and name issues in dt documentation
> > >
> > > Changes in v5:
> > >   - changed binding to earliest known supported SoC sun6i-a31
> > >   - dropped unnecessary entries
> > >
> > > Changes in v4:
> > >   - changed binding to sun8i-a33-hwpinlock
> > >   - added changes suggested by Maxime Ripard
> > >
> > > Changes in v3:
> > >   - changed symbols from sunxi to sun8i
> > >
> > > Changes in v2:
> > >   - fixed memory ranges
> > > ---
> > >  .../hwlock/allwinner,sun6i-hwspinlock.yaml    | 45 +++++++++++++++++++
> > 
> > The name of the file doesn't match the compatible, once fixed:
> > Acked-by: Maxime Ripard <mripard@kernel.org>
> 
> This is something that still confuses me. What if you have more than one
> compatible string?

In this case, it's fairly easy there's only one :)

But we're following the same rule than the compatible: the first SoC
that got the compatible wins 

> This won't be solvable. See the qcom binding for example,
> there are two strings and none matches. In the omap bindings are also two
> strings and only one matches. In all cases, including mine, the bindings
> check script is fine with that.

If other platforms want to follow other rules, good for them :)

> So, you basically want it to be called
> "allwinner,sun6i-a31-hwspinlock.yaml"?

Yes

Maxime

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v6 2/2] hwspinlock: add sun6i hardware spinlock support

[Wilken Gottwalt]

On Tue, 2 Mar 2021 18:20:02 +0100
Maxime Ripard <maxime@cerno.tech> wrote:

> Hi,
> 
> On Mon, Mar 01, 2021 at 03:06:08PM +0100, Wilken Gottwalt wrote:
> > On Mon, 1 Mar 2021 14:13:05 +0100
> > Maxime Ripard <mripard@kernel.org> wrote:
> > 
> > > On Sat, Feb 27, 2021 at 02:03:54PM +0100, Wilken Gottwalt wrote:
> > > > Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in
> > > > most of the sun6i compatible SoCs.
> > > >
> > > > This unit provides at least 32 spinlocks in hardware. The implementation
> > > > supports 32, 64, 128 or 256 32bit registers. A lock can be taken by
> > > > reading a register and released by writing a 0 to it. This driver
> > > > supports all 4 spinlock setups, but for now only the first setup (32
> > > > locks) seem to exist in available devices. This spinlock unit is shared
> > > > between all ARM cores and the embedded companion core. All of them can
> > > > take/release a lock with a single cycle operation. It can be used to
> > > > sync access to devices shared by the ARM cores and the companion core.
> > > >
> > > > There are two ways to check if a lock is taken. The first way is to read
> > > > a lock. If a 0 is returned, the lock was free and is taken now. If an 1
> > > > is returned, the caller has to try again. Which means the lock is taken.
> > > > The second way is to read a 32bit wide status register where every bit
> > > > represents one of the 32 first locks. According to the datasheets this
> > > > status register supports only the 32 first locks. This is the reason the
> > > > first way (lock read/write) approach is used to be able to cover all 256
> > > > locks in future devices. The driver also reports the amount of supported
> > > > locks via debugfs.
> > > >
> > > > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> > 
> > Nope, I had to replace the devm_hwspin_lock_register function by the
> > hwspin_lock_register function because like Bjorn pointed out that it can
> > fail and needs to handled correctly. And having a devm_* function does not
> > play well with the non-devm clock/reset functions and winding back if an
> > error occurs. It also messes with the call order in the remove function. So
> > I went back to the classic way where I have full control over the call order.
> 
> If you're talking about the clock and reset line reassertion, I don't
> really see what the trouble is. Sure, it's not going to be in the exact
> same order in remove, but it's still going to execute in the proper
> order (ie, clock disable, then reset disable, then clock put and reset
> put). And you can use devm_add_action if you want to handle things
> automatically.

See, in v5 zje result of devm_hwspin_lock_register was returned directly. The
remove callback or the bank_fail/clk_fail labels would not run, if the registering
fails. In v6 it is fixed.

+	platform_set_drvdata(pdev, priv);
+
+	return devm_hwspin_lock_register(&pdev->dev, priv->bank, &sun6i_hwspinlock_ops,
+					 SPINLOCK_BASE_ID, priv->nlocks);
+bank_fail:
+	clk_disable_unprepare(priv->ahb_clk);
+clk_fail:
+	reset_control_assert(priv->reset);
+
+	return err;
+}

So, is v6 fine for you even if it uses a more classic approach?

greetings,
Will

Re: [PATCH v6 1/2] dt-bindings: hwlock: add sun6i_hwspinlock

[Wilken Gottwalt]

On Tue, 2 Mar 2021 18:22:33 +0100
Maxime Ripard <maxime@cerno.tech> wrote:

> On Mon, Mar 01, 2021 at 03:06:35PM +0100, Wilken Gottwalt wrote:
> > On Mon, 1 Mar 2021 14:12:44 +0100
> > Maxime Ripard <mripard@kernel.org> wrote:
> > 
> > > On Sat, Feb 27, 2021 at 02:03:28PM +0100, Wilken Gottwalt wrote:
> > > > Adds documentation on how to use the sun6i_hwspinlock driver for sun6i
> > > > compatible series SoCs.
> > > >
> > > > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> > > > ---
> > > > Changes in v6:
> > > >   - fixed formating and name issues in dt documentation
> > > >
> > > > Changes in v5:
> > > >   - changed binding to earliest known supported SoC sun6i-a31
> > > >   - dropped unnecessary entries
> > > >
> > > > Changes in v4:
> > > >   - changed binding to sun8i-a33-hwpinlock
> > > >   - added changes suggested by Maxime Ripard
> > > >
> > > > Changes in v3:
> > > >   - changed symbols from sunxi to sun8i
> > > >
> > > > Changes in v2:
> > > >   - fixed memory ranges
> > > > ---
> > > >  .../hwlock/allwinner,sun6i-hwspinlock.yaml    | 45 +++++++++++++++++++
> > > 
> > > The name of the file doesn't match the compatible, once fixed:
> > > Acked-by: Maxime Ripard <mripard@kernel.org>
> > 
> > This is something that still confuses me. What if you have more than one
> > compatible string?
> 
> In this case, it's fairly easy there's only one :)
> 
> But we're following the same rule than the compatible: the first SoC
> that got the compatible wins 
> 
> > This won't be solvable. See the qcom binding for example,
> > there are two strings and none matches. In the omap bindings are also two
> > strings and only one matches. In all cases, including mine, the bindings
> > check script is fine with that.
> 
> If other platforms want to follow other rules, good for them :)
> 
> > So, you basically want it to be called
> > "allwinner,sun6i-a31-hwspinlock.yaml"?
> 
> Yes

Is it okay if I provide only the fixed bindings? I assume the v6 driver is
fine now.

greetings,
Will

Re: [PATCH v6 2/2] hwspinlock: add sun6i hardware spinlock support

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 3815 bytes --]

On Sat, Mar 06, 2021 at 12:05:22PM +0100, Wilken Gottwalt wrote:
> On Tue, 2 Mar 2021 18:20:02 +0100
> Maxime Ripard <maxime@cerno.tech> wrote:
> 
> > Hi,
> > 
> > On Mon, Mar 01, 2021 at 03:06:08PM +0100, Wilken Gottwalt wrote:
> > > On Mon, 1 Mar 2021 14:13:05 +0100
> > > Maxime Ripard <mripard@kernel.org> wrote:
> > > 
> > > > On Sat, Feb 27, 2021 at 02:03:54PM +0100, Wilken Gottwalt wrote:
> > > > > Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in
> > > > > most of the sun6i compatible SoCs.
> > > > >
> > > > > This unit provides at least 32 spinlocks in hardware. The implementation
> > > > > supports 32, 64, 128 or 256 32bit registers. A lock can be taken by
> > > > > reading a register and released by writing a 0 to it. This driver
> > > > > supports all 4 spinlock setups, but for now only the first setup (32
> > > > > locks) seem to exist in available devices. This spinlock unit is shared
> > > > > between all ARM cores and the embedded companion core. All of them can
> > > > > take/release a lock with a single cycle operation. It can be used to
> > > > > sync access to devices shared by the ARM cores and the companion core.
> > > > >
> > > > > There are two ways to check if a lock is taken. The first way is to read
> > > > > a lock. If a 0 is returned, the lock was free and is taken now. If an 1
> > > > > is returned, the caller has to try again. Which means the lock is taken.
> > > > > The second way is to read a 32bit wide status register where every bit
> > > > > represents one of the 32 first locks. According to the datasheets this
> > > > > status register supports only the 32 first locks. This is the reason the
> > > > > first way (lock read/write) approach is used to be able to cover all 256
> > > > > locks in future devices. The driver also reports the amount of supported
> > > > > locks via debugfs.
> > > > >
> > > > > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> > > 
> > > Nope, I had to replace the devm_hwspin_lock_register function by the
> > > hwspin_lock_register function because like Bjorn pointed out that it can
> > > fail and needs to handled correctly. And having a devm_* function does not
> > > play well with the non-devm clock/reset functions and winding back if an
> > > error occurs. It also messes with the call order in the remove function. So
> > > I went back to the classic way where I have full control over the call order.
> > 
> > If you're talking about the clock and reset line reassertion, I don't
> > really see what the trouble is. Sure, it's not going to be in the exact
> > same order in remove, but it's still going to execute in the proper
> > order (ie, clock disable, then reset disable, then clock put and reset
> > put). And you can use devm_add_action if you want to handle things
> > automatically.
> 
> See, in v5 zje result of devm_hwspin_lock_register was returned directly. The
> remove callback or the bank_fail/clk_fail labels would not run, if the registering
> fails. In v6 it is fixed.

Yeah, and it's indeed an issue...

> +	platform_set_drvdata(pdev, priv);
> +
> +	return devm_hwspin_lock_register(&pdev->dev, priv->bank, &sun6i_hwspinlock_ops,
> +					 SPINLOCK_BASE_ID, priv->nlocks);
> +bank_fail:
> +	clk_disable_unprepare(priv->ahb_clk);
> +clk_fail:
> +	reset_control_assert(priv->reset);
> +
> +	return err;
> +}
> 
> So, is v6 fine for you even if it uses a more classic approach?

... but completely getting rid of the devm_ calls isn't a solution, if
that's what you're calling the more classic approach.

if (devm_hwspin_lock_register(..))
   goto bank_fail

return 0;

works, and using devm_add_action like I suggested works as well to fix
the issue you mentioned above

Maxime

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]