From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753242AbeDKOo1 (ORCPT ); Wed, 11 Apr 2018 10:44:27 -0400 Received: from mail-ve1eur01on0100.outbound.protection.outlook.com ([104.47.1.100]:34822 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752664AbeDKOoZ (ORCPT ); Wed, 11 Apr 2018 10:44:25 -0400 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=peda@axentia.se; Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma To: Nicolas Ferre Cc: Boris Brezillon , Alexandre Belloni , Richard Weinberger , Josh Wu , linux-kernel@vger.kernel.org, Marek Vasut , linux-mtd@lists.infradead.org, Cyrille Pitchen , Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org References: <20180329131054.22506-1-peda@axentia.se> <20180329153322.5e2fc1e7@bbrezillon> <20180329154416.5c1a0013@bbrezillon> <20180402142249.7e076a64@bbrezillon> <20180402212843.164d5d21@bbrezillon> <20180402222020.1d344c14@bbrezillon> <20180403091813.5fb5c18c@bbrezillon> From: Peter Rosin Organization: Axentia Technologies AB Message-ID: Date: Wed, 11 Apr 2018 16:44:10 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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X-Microsoft-Exchange-Diagnostics: =?utf-8?B?MTtBTTRQUjAyMDJNQjI3NzE7MjM6OW1EMVowYTdqTnQ5V2NDZ3haS3FYTDJC?= =?utf-8?B?b3I2UW9xRE1tbHBoOGtwRUo4OVdSYkNvTUZCVWpzVzNWU01VU0NJUEZhRytX?= =?utf-8?B?enhaWEF6d3BlR1QwYU1MT3FKdG8vOEUzT21MdCtONzNDOTdnbm1qMFIvWkRn?= =?utf-8?B?dUtuK3lEVi9KaHJsQXQ5UGJvTERkM3V4OVJ0cjZOLzVhVlE3ZDNPQ0xIclBh?= =?utf-8?B?S0JJZ29OSGZBSW1oOUYxTlMzdURlSHVIRGd3Zk1PRURYNW5VZWxLNVh4ODZZ?= =?utf-8?B?QkI3bzRpSDBVeDZOV2pUYnVvUzRYTEg2SG5DS1dabEt4ejJpUCtObDBsbVY4?= =?utf-8?B?b0x1cjNwVDYxcUZzZXF3Z0ZPdmNGMFBURFF3dHNDWFJVUmt5YmlnNllZSi9r?= =?utf-8?B?d0J4SnZtSEQzalF4RUt3U0VMRGRMNjBKUzRvQjhyNm1XQTQ5SUExdkFLb1c4?= =?utf-8?B?eURjaS9lOFhJV3dzYkV4aHFQcVB0VjRhTGZDM3J5NFR1OGtoMXZtVVQ4T2ZI?= =?utf-8?B?c0xIQlV4QzVsbzVQWmFKTFBHVlBoZjF3OGpIZnY1Q0R6YTdEcXJCWmFaTzZQ?= =?utf-8?B?b0ErdzFGYXQxeWRJQUtmcWlVWEk0VktuekRYdnRtcEtpSmRsTDR4YzVKWVZH?= =?utf-8?B?N0FyREU1WWtUQTJWRVpscEtQVzFzZkV1WGtaazE0RWlpejZtZWJUVURiZDRu?= =?utf-8?B?ckxIYmNhaWQ5UWNtSUVSZFZEdlFDNzNIMytTclJLRk96Mmw4cHN5UnlUSHpT?= =?utf-8?B?dHc4Rksrcy9ESVRyUk1wSWNFWFdyVWNGUFZ6VEk5V2xneVRJcmdsejFhNjNT?= =?utf-8?B?WWNSL0xiTUJNRU0wcDRlODgxZGVwNmI2ZkRLWkZiR3laemxjWGptNlJhSFAy?= =?utf-8?B?dXhhS2dGWUhzYk1mN2ZGSlo2ZlRxbDZJcnJxOHNrWGRxalBlTlN5WUtkOEhY?= =?utf-8?B?aGE5QmI1ZGM3SjNOb29ZTXAxWHlRWWFXZnJUd0hvdXZwZHRqL2EzNzQxRU52?= =?utf-8?B?QzlObGhDR1NKKzFIOTlNb1hGTlYxRUdpZ25la29CVFJuMG8xTTB4ZmJ2cUNN?= =?utf-8?B?ODl6T1dxQmdCUG5UUFI2UUpnSXIyQU5kMVB6RGVrdEpIODZ5amk0N2YzQ1Jx?= =?utf-8?B?Y1QzVWV5NU9IcDJMYmw4emYxS0UrUk4zdFExK2kwMnovbGMwRWJ2ZEZ4OHYr?= =?utf-8?B?MTd0OUtSZzd1cy9pc2g0TUFOZENCVE5nNnBiU0Nlb2RzMUFINDk3YzUydUJQ?= =?utf-8?B?ZDhWOHhMY25wbU5KREtqUG9DR0VWbGpIY3BiMjNrQ2Q3bk1mdWdXVXQ5Um1C?= =?utf-8?B?em1yUHM3TlVLeWRuN2JvMm9KL3IzWVI4aVZXWXRITnp2bG5JSjJNajdqZVlZ?= =?utf-8?B?TGNQRUtVeWMxeDcxM21FNVFlSUdPVDdLeVIyS1duYUN4SUlNUURsREF3bndn?= =?utf-8?B?WGZVSlE2b203WFNyMktVT2Vseno1SWViMjFnZlJHZ2JxZ2ovNEdKcTc1N25i?= =?utf-8?B?bDhZd2ZQeXBSY2xrbnBZN3VuQTBHVzFONVB5YnFGa2RmRERiUXpjSWo1REY0?= =?utf-8?B?T2VjU0xWaUFheHh1NjNjTTRFYTJ2OGhxbk9yWlNzWDhBZFJBNXIvRk4ybEdL?= =?utf-8?B?SU93TFNRTDBHR3RWQ0xBVzZxSDVCWlI0aTVKUWZkUDJuQUQ3OXVHT1Bmd1U2?= =?utf-8?B?djIyY05mZStadTdtY2ZpbEd5QUpFSGJrRGJhWDhucUhHVjZzMlVnWTFOK25l?= =?utf-8?B?UndwVDY0akhJbjArRG9NUG84bjMwNFZ4bmJQR2JCeVdpbnNBNkMvQmhPRUo0?= =?utf-8?B?MnA5d21Mb2IvdXpPS0YzMU9tcWRyNVlDd2hDQzBxNkRaQjUvbkN1cU9qRURk?= =?utf-8?B?clduTUx6V2RIRVVheUlZbUNYUklNMll3N24vbDg0OGNEeUY3OE45Y2JldHlC?= =?utf-8?B?dXAwSWVFRVdCcXFQOFc0ZjN3U2xYbUF6REpMdWZOd0plclc4MFRpaWRwSkxq?= =?utf-8?B?eXg2bW9XUUFqdVIxbytqb1YvTVVKMSt2TWJpRUJDZUljN01ZaDVkbU1vYTdN?= =?utf-8?B?elJ6NE5oV3VxcDA3akdtOXBCbXhDSTB0cXNSNitYSVRrdGJJZk9lMnR6OFN5?= =?utf-8?B?bEdaQVg5WmQ2NFVZNnFGcFNjc3ZNU2lmdm1TcVVESTBzQ3NDdnRlV013WWEz?= =?utf-8?B?ZlROTTFOK1NwTzlUeVBWbUJKVkF4UWdzUnNzZmc3eWxRbVhrUmY1alQ4Mldo?= =?utf-8?B?dDByWGFWQWovV0NyZkl3ckN4M3JrVGVlYzF2WVRUMEdCd09obVFRRkRRPT0=?= X-Microsoft-Antispam-Message-Info: 3v7k/ziiTmRewQNGc+Ib7ewn7WD4vP7/B9UByvbjeCe69nbU8gshHKDInePo2ZbRj/EUdWKyQWskTckngFuLbegIcs339/Ue8niwGObYXpgJvkH3a1RnJoUh/+LeVTppQV9jJoTc1qo5MhCj8lVsaM3BGB3854yP433MTb35+8BSmimLK2NtGUtYyxzji2NX X-Microsoft-Exchange-Diagnostics: 1;AM4PR0202MB2771;6:148GiHyYHg10B2HhUjZUXRT8qGPprMAybLChdAHlNrXfWzGorlpT6wqqjaMSEBOkDRFDUyf1jkEJfqNkh2WXasM5hgIcgpIWBuXBxDsJLZVDD9Q7w3UTB1kftbiWAZugjFGtOcaywtN3+AXh1xqPQhPG+gPCxRHoWg6zkmGVMsZc+8W+5AYfk07GrEpg/Qm8MfBe4NFrytJCX52emZa+CeGREfLijBjvHZmGP9HyZqJhQD1Q6LCdOqD68dSi6Nh6q+lPCeTYqGU2cHpW0VUk/iys9+REvROLzboidJh+uXKk/r8aL0fIt1u26lsNDASI3lUq2SQLFRhV1bRm+fDy+4Kd/8fXrbXO0QxOEr5dVUBucqlfCO8bTeV796w0CZFhffIJ0KuUGJxmUF1eqi1nm84KKOwrbYOKzGaUXlhecZ+LNA6ZcnTuwrO4AsyFkwIHjx5sXPlKUL46ur44EYIRRQ==;5:uT6Or0qT6M8knsejfh8zHshX/h7FEcQXtHM8oLoCt+NpsDNtngNOjXdzphMqmn4fCwiMEfuYhlmAL+R0L28IXt/6v+EJKqOfX8mMAH85zQCnZCwxd9eW4LCzJZnC86boqFIrOPKFBTGY5g8zmJ12ApqTjokHAGGN1N629ge10vc=;24:Jk5rrg70J4u5ceEMCuo2tElJdgqAO1rCVN96EsjhxnNwkRVVvb8BnwQ3LJoHwE06sgxxD+zJ3ygNlfralh/KaShz7ePMj8zlJqFPaoF9tV8= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1;AM4PR0202MB2771;7:RzGN4bFmkb04HrT1nbdhEoqZ1jEifhXZjw8OwMW+/9PyhOtQk2elhZZsQTLrDtNC/anZm7ZyCaa0Vqq1EgCHlT77d2znDVQDpE2Uz9Ad71DZ/dkMxlNP65rA6LtKGmLX19KQQ5HQ7WEV6VH1FVMSe70xNGQdw4+0XNuSBxxAWw1S+mkQNSQILc75qkBsaxHQHw+oyCvuAlgve8RMVzVd7PbLHtpO73TQ0dY0YNALwFv00wXgejiKnU2CFhaJh6QU X-MS-Office365-Filtering-Correlation-Id: c40d5e44-af2b-45bb-187c-08d59fbab4d0 X-OriginatorOrg: axentia.se X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Apr 2018 14:44:17.9695 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c40d5e44-af2b-45bb-187c-08d59fbab4d0 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 4ee68585-03e1-4785-942a-df9c1871a234 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR0202MB2771 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Nicolas, Boris asked for your input on this (the datasheet difference appears to have no bearing on the issue) elsewhere in the tree of messages. It's now been a week or so and I'm starting to wonder if you missed this altogether or if you are simply out of office or something? Cheers, Peter On 2018-04-03 09:18, Boris Brezillon wrote: > On Tue, 3 Apr 2018 08:11:30 +0200 > Peter Rosin wrote: > >> On 2018-04-02 22:20, Boris Brezillon wrote: >>> On Mon, 2 Apr 2018 21:28:43 +0200 >>> Boris Brezillon wrote: >>> >>>> On Mon, 2 Apr 2018 19:59:39 +0200 >>>> Peter Rosin wrote: >>>> >>>>> On 2018-04-02 14:22, Boris Brezillon wrote: >>>>>> On Thu, 29 Mar 2018 16:27:12 +0200 >>>>>> Peter Rosin wrote: >>>>>> >>>>>>> On 2018-03-29 15:44, Boris Brezillon wrote: >>>>>>>> On Thu, 29 Mar 2018 15:37:43 +0200 >>>>>>>> Peter Rosin wrote: >>>>>>>> >>>>>>>>> On 2018-03-29 15:33, Boris Brezillon wrote: >>>>>>>>>> On Thu, 29 Mar 2018 15:10:54 +0200 >>>>>>>>>> Peter Rosin wrote: >>>>>>>>>> >>>>>>>>>>> On a sama5d31 with a Full-HD dual LVDS panel (132MHz pixel clock) NAND >>>>>>>>>>> flash accesses have a tendency to cause display disturbances. Add a >>>>>>>>>>> module param to disable DMA from the NAND controller, since that fixes >>>>>>>>>>> the display problem for me. >>>>>>>>>>> >>>>>>>>>>> Signed-off-by: Peter Rosin >>>>>>>>>>> --- >>>>>>>>>>> drivers/mtd/nand/raw/atmel/nand-controller.c | 7 ++++++- >>>>>>>>>>> 1 file changed, 6 insertions(+), 1 deletion(-) >>>>>>>>>>> >>>>>>>>>>> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c >>>>>>>>>>> index b2f00b398490..2ff7a77c7b8e 100644 >>>>>>>>>>> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c >>>>>>>>>>> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c >>>>>>>>>>> @@ -129,6 +129,11 @@ >>>>>>>>>>> #define DEFAULT_TIMEOUT_MS 1000 >>>>>>>>>>> #define MIN_DMA_LEN 128 >>>>>>>>>>> >>>>>>>>>>> +static bool atmel_nand_avoid_dma __read_mostly; >>>>>>>>>>> + >>>>>>>>>>> +MODULE_PARM_DESC(avoiddma, "Avoid using DMA"); >>>>>>>>>>> +module_param_named(avoiddma, atmel_nand_avoid_dma, bool, 0400); >>>>>>>>>> >>>>>>>>>> I'm not a big fan of those driver specific cmdline parameters. Can't we >>>>>>>>>> instead give an higher priority to HLCDC master using the bus matrix? >>>>>>>>> >>>>>>>>> I don't know if it will be enough, but we sure can try. However, I have >>>>>>>>> no idea how to do that. I will happily test stuff though... >>>>>>>> >>>>>>>> There's no interface to configure that from Linux, but you can try to >>>>>>>> tweak it with devmem and if that does the trick, maybe we can expose a >>>>>>>> way to configure that from Linux. For more details, see the "Bus Matrix >>>>>>>> (MATRIX)" section in Atmel datasheets. >>>>>>> >>>>>>> I don't seem to succeed in changing the registers I think I need to change. >>>>>>> I can poke the "Write Protection Mode Register" by writing MAT0 and MAT1 to >>>>>>> it. >>>>>> >>>>>> You mean 0x4D415400, right? ("MAT0" != 0x4D415400). >>>>> >>>>> Bits 1 through 7 do not matter, so even though not equal they are (or >>>>> should be) equivalent. But I did use 0x4d415400. I simply used the >>>>> shorter syntax since that was easier to type and conveyed the relevant >>>>> info. >>>> >>>> Ok. >>>> >>>>> >>>>>>> But when I try to write to "Priority Registers B For Slaves" it doesn't >>>>>>> take, regardless of write protect mode. >>>>>> >>>>>> Did you check MATRIX_WPSR after writing to MATRIX_PRXSY? >>>>> >>>>> No, but did it again and checked, see transcript below. >>>> >>>> I don't use devmem2. Is 'readback' information accurate or is it >>>> always what's been written? Because when you write 0x33 to 0xFFFFECBC, >>>> 0x33 is read back, but just after that, when you read it again it's 0. >>>> >>>>> BTW, how do I >>>>> know which master is in use for the LCD controller? 8 or 9? Both? >>>> >>>> It's configurable on a per-layer basis through the SIF bit in >>>> LCDC_CFG0. The driver tries to dispatch the load on those 2 AHB >>>> masters [1]. >>>> >>>>> And >>>>> which DDR slave is the target? 7, 8, 9 or 10? More than one? >>>> >>>> This, I don't know. I guess all of them can be used. >>> >>> Looks like I was wrong. According to "Table 15-3. SAMA5D3 Master to >>> Slave Access", LCDC port 0 can only access DDR port 2 and LCDC port 1 >>> can only access DDR port 3. >> >> About that table, someone with HW-knowledge should have a real close >> look at it! Why? >> >> I peeked at all the PRxSy registers and there are a lot of '3' entries >> for all the MxPR fields. In fact, the '3' entries align very neatly >> with the checks in this "Master to Slave Access" table. Except they >> don't, after a while. >> >> Here's how the table looks in my datasheet: >> >> 0 vv--v--v--vvvv- >> 1 vv--v--v--vvvv- >> 2 vv------------- >> 3 vv--------vvv-- >> 4 vv------------- >> 5 v-------------- >> 6 vv--vv-vvvvvvvv >> v-------------- >> 7 v-------------- >> 8 --v-v--v------- >> 9 -v---v--v--v--- >> 10 ---------vv-vvv >> 11 v--v----------- >> 12 v-----v-------- >> >> And here's the '3' entries when digging in the registers (the extra >> dash at the end is for the 16th non-existent slave): >> >> 0 33--3--3--3333-- >> 1 33--3--3--3333-- >> 2 33-------------- >> 3 -3--------333--- >> 4 33-------------- >> 5 3--------------- >> 6 33--33-33333333- >> 7 --3-3--3-------- >> 8 -3---3--3--3---- >> 9 --3-3--3-33-333- >> 10 3--3------------ >> 11 3-----3--------- >> 12 ---------------- >> 13 ---------------- >> 14 ---------------- >> 15 ---------------- >> >> There's a big mismatch for the four DDR2 lines in the table; they >> seem to map to only three registers. Other than that, the only tweak >> or anomaly is that first entry (Cortex A5) for master 3 (Int ROM). >> >> *time passes* >> >> Arrrgh!! You say "Table 15-3". This is Table 14-3 for me! I believe >> I'm using the latest datasheet (02-Feb-16). What are you reading???!? > > Oops, I was reading an old datasheet (from 2014).