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From: Prasanna Vengateshan <prasanna.vengateshan@microchip.com>
To: Vladimir Oltean <olteanv@gmail.com>,
	"Russell King (Oracle)" <linux@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>, <netdev@vger.kernel.org>,
	<robh+dt@kernel.org>, <UNGLinuxDriver@microchip.com>,
	<Woojung.Huh@microchip.com>, <hkallweit1@gmail.com>,
	<davem@davemloft.net>, <kuba@kernel.org>,
	<linux-kernel@vger.kernel.org>, <vivien.didelot@gmail.com>,
	<f.fainelli@gmail.com>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v3 net-next 05/10] net: dsa: microchip: add DSA support for microchip lan937x
Date: Wed, 4 Aug 2021 19:58:15 +0530	[thread overview]
Message-ID: <d10aa31f1258aa2975e3837acb09f26265da91eb.camel@microchip.com> (raw)
In-Reply-To: <20210804104625.d2qw3gr7algzppz5@skbuf>

On Wed, 2021-08-04 at 13:46 +0300, Vladimir Oltean wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> The problem is that I have no clear migration path for the drivers I
> maintain, like sja1105, and I suspect that others might be in the exact
> same situation.
> 
> Currently, if the sja1105 needs to add internal delays in a MAC-to-MAC
> (fixed-link) setup, it does that based on the phy-mode string. So
> "rgmii-id" + "fixed-link" means for sja1105 "add RX and TX RGMII
> internal delays", even though the documentation now says "the MAC should
> not add the RX or TX delays in this case".
> 
> There are 2 cases to think about, old driver with new DT blob and new
> driver with old DT blob. If breakage is involved, I am not actually very
> interested in doing the migration, because even though the interpretation
> of the phy-mode string is inconsistent between the phy-handle and fixed-link
> case (which was deliberate), at least it currently does all that I need it to.
> 
> I am not even clear what is the expected canonical behavior for a MAC
> driver. It parses rx-internal-delay-ps and tx-internal-delay-ps, and
> then what? It treats all "rgmii*" phy-mode strings identically? Or is it
> an error to have "rgmii-rxid" for phy-mode and non-zero rx-internal-delay-ps?
> If it is an error, should all MAC drivers check for it? And if it is an
> error, does it not make migration even more difficult (adding an
> rx-internal-delay-ps property to a MAC OF node which already uses
> "rgmii-id" would be preferable to also having to change the "rgmii-id"
> to "rgmii", because an old kernel might also need to work with that DT
> blob, and that will ignore the new rx-internal-delay-ps property).


Considering the PHY is responsible to add internal delays w.r.to phy-mode, "*-
tx-internal-delay-ps" approach that i was applying to different connections as
shown below by bringing up different examples.

1) Fixed-link MAC-MAC: 
       port@4 {
            .....
            phy-mode = "rgmii";
            rx-internal-delay-ps = <xxx>;
            tx-internal-delay-ps = <xxx>;
            ethernet = <&ethernet>;
            fixed-link {
           	......
            };
          };

2) Fixed-link MAC-Unknown:
        port@5 {
            ......
            phy-mode = "rgmii-id";
            rx-internal-delay-ps = <xxx>;
            tx-internal-delay-ps = <xxx>;
            fixed-link {
           .	....
            };
          };

3) Fixed-link :
        port@5 {
            ......
            phy-mode = "rgmii-id";
            fixed-link {
              .....
            };
          };

From above examples,
	a) MAC node is responsible to add RGMII delay by parsing "*-internal-
delay-ps" for (1) & (2). Its a known item in this discussion.
	b) Is rgmii-* to be ignored by the MAC in (2) and just apply the delays
from MAC side? Because if its forced to have "rgmii", would it become just -
>interface=*_MODE_RGMII and affects legacy?
	c) if MAC follows standard delay, then it needs to be validated against
"*-internal-delay-ps", may be validating against single value and throw an
error. Might be okay.
	d) For 3), Neither MAC nor other side will apply delays. Expected.


3) MAC-PHY

	i) &test3 {
		phy-handle = <&phy0>;
		phy-mode = "rgmii-id";
		phy0: ethernet-phy@xx {
			.....
			rx-internal-delay = <xxx>;
			tx-internal-delay = <xxx>;
		};
	  };

	ii) &test4 {
		phy-handle = <&phy0>;
		phy-mode = "rgmii";
        	rx-internal-delay-ps = <xxx>;
        	tx-internal-delay-ps = <xxx>;
		phy0: ethernet-phy@xx {
			reg = <x>;
	        };
	     };


For 3(i), I assume phy would apply internal delay values by checking its phydev-
>interface.
For 3(ii), MAC would apply the delays.

Overall, only (b) need a right decision? or any other items are missed?


Prasanna V


  reply	other threads:[~2021-08-04 14:32 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-23 17:30 [PATCH v3 net-next 00/10] net: dsa: microchip: DSA driver support for LAN937x switch Prasanna Vengateshan
2021-07-23 17:30 ` [PATCH v3 net-next 01/10] dt-bindings: net: dsa: dt bindings for microchip lan937x Prasanna Vengateshan
2021-07-26 22:49   ` Rob Herring
2021-07-23 17:31 ` [PATCH v3 net-next 02/10] net: dsa: move mib->cnt_ptr reset code to ksz_common.c Prasanna Vengateshan
2021-07-23 18:53   ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 03/10] net: phy: Add support for LAN937x T1 phy driver Prasanna Vengateshan
2021-08-11 17:52   ` Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 04/10] net: dsa: tag_ksz: add tag handling for Microchip LAN937x Prasanna Vengateshan
2021-07-23 19:23   ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 05/10] net: dsa: microchip: add DSA support for microchip lan937x Prasanna Vengateshan
2021-07-31 15:04   ` Vladimir Oltean
2021-07-31 22:05     ` Andrew Lunn
2021-08-02 21:33       ` Vladimir Oltean
2021-08-03 14:43         ` Andrew Lunn
2021-08-03 15:05           ` Vladimir Oltean
2021-08-02 10:45     ` Prasanna Vengateshan
2021-08-02 12:15       ` Vladimir Oltean
2021-08-02 13:13         ` Andrew Lunn
2021-08-02 13:59           ` Vladimir Oltean
2021-08-02 20:47             ` Andrew Lunn
2021-08-03 16:54             ` Prasanna Vengateshan
2021-08-03 23:54               ` Vladimir Oltean
2021-08-04  9:59                 ` Russell King (Oracle)
2021-08-04 10:46                   ` Vladimir Oltean
2021-08-04 14:28                     ` Prasanna Vengateshan [this message]
2021-08-04 14:51                       ` Vladimir Oltean
2021-08-07 15:40                     ` Andrew Lunn
2021-08-07 17:00                       ` Vladimir Oltean
2021-08-11 17:44                       ` Prasanna Vengateshan
2021-08-11 18:23                         ` Andrew Lunn
2021-08-11 20:14                           ` Russell King (Oracle)
2021-08-11 20:20                             ` Vladimir Oltean
2021-08-11 20:22                               ` Andrew Lunn
2021-07-23 17:31 ` [PATCH v3 net-next 06/10] net: dsa: microchip: add support for phylink management Prasanna Vengateshan
2021-07-31 15:27   ` Vladimir Oltean
2021-08-03 17:04     ` Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 07/10] net: dsa: microchip: add support for ethtool port counters Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 08/10] net: dsa: microchip: add support for port mirror operations Prasanna Vengateshan
2021-07-31 15:24   ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 09/10] net: dsa: microchip: add support for fdb and mdb management Prasanna Vengateshan
2021-07-31 15:19   ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 10/10] net: dsa: microchip: add support for vlan operations Prasanna Vengateshan
2021-07-31 15:08   ` Vladimir Oltean
2021-08-02 10:48     ` Prasanna Vengateshan

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