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* [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5
@ 2020-10-01 12:34 Schrempf Frieder
  2020-10-01 12:34 ` [PATCH 2/2] arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card Schrempf Frieder
  2020-10-01 12:53 ` [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5 Mark Brown
  0 siblings, 2 replies; 6+ messages in thread
From: Schrempf Frieder @ 2020-10-01 12:34 UTC (permalink / raw)
  To: Robin Gong, Fabio Estevam, Frieder Schrempf, Liam Girdwood,
	Mark Brown, NXP Linux Team, Pengutronix Kernel Team,
	Sascha Hauer, Shawn Guo
  Cc: devicetree, linux-arm-kernel, linux-kernel

From: Frieder Schrempf <frieder.schrempf@kontron.de>

LDO5 has two separate control registers. LDO5CTRL_L is used if the
input signal SD_VSEL is low and LDO5CTRL_H if it is high.
The current driver implementation only uses LDO5CTRL_H. To make this
work on boards that have SD_VSEL connected to a GPIO, we add support
for specifying an optional GPIO and setting it to high at probe time.

In the future we might also want to add support for boards that have
SD_VSEL set to a fixed low level. In this case we need to change the
driver to be able to use the LDO5CTRL_L register.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
---
 drivers/regulator/pca9450-regulator.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9450-regulator.c
index eb5822bf53e0..fec7acc606f4 100644
--- a/drivers/regulator/pca9450-regulator.c
+++ b/drivers/regulator/pca9450-regulator.c
@@ -5,6 +5,7 @@
  */
 
 #include <linux/err.h>
+#include <linux/gpio/consumer.h>
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
@@ -32,6 +33,7 @@ struct pca9450_regulator_desc {
 struct pca9450 {
 	struct device *dev;
 	struct regmap *regmap;
+	struct gpio_desc *sd_vsel_gpio;
 	enum pca9450_chip_type type;
 	unsigned int rcnt;
 	int irq;
@@ -795,6 +797,18 @@ static int pca9450_i2c_probe(struct i2c_client *i2c,
 		return ret;
 	}
 
+	/*
+	 * The driver uses the LDO5CTRL_H register to control the LDO5 regulator.
+	 * This is only valid if the SD_VSEL input of the PMIC is high. Let's
+	 * check if the pin is available as GPIO and set it to high.
+	 */
+	pca9450->sd_vsel_gpio = gpiod_get_optional(pca9450->dev, "sd-vsel", GPIOD_OUT_HIGH);
+
+	if (IS_ERR(pca9450->sd_vsel_gpio)) {
+		dev_err(&i2c->dev, "Failed to get SD_VSEL GPIO\n");
+		return ret;
+	}
+
 	dev_info(&i2c->dev, "%s probed.\n",
 		type == PCA9450_TYPE_PCA9450A ? "pca9450a" : "pca9450bc");
 
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/2] arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card
  2020-10-01 12:34 [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5 Schrempf Frieder
@ 2020-10-01 12:34 ` Schrempf Frieder
  2020-10-01 12:38   ` Frieder Schrempf
  2020-10-01 13:15   ` Frieder Schrempf
  2020-10-01 12:53 ` [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5 Mark Brown
  1 sibling, 2 replies; 6+ messages in thread
From: Schrempf Frieder @ 2020-10-01 12:34 UTC (permalink / raw)
  To: Robin Gong, Fabio Estevam, Frieder Schrempf, Liam Girdwood,
	Mark Brown, NXP Linux Team, Pengutronix Kernel Team,
	Sascha Hauer, Shawn Guo
  Cc: devicetree, linux-arm-kernel, linux-kernel

From: Frieder Schrempf <frieder.schrempf@kontron.de>

In order to use ultra high speed modes (UHS) on the SD card slot, we
add matching pinctrls and fix the voltage switching for LDO5 of the
PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
---
 .../dts/freescale/imx8mm-kontron-n801x-s.dts  | 27 +++++++++++++++++++
 .../freescale/imx8mm-kontron-n801x-som.dtsi   |  2 ++
 2 files changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
index 389e735b2880..6913aefa56aa 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
@@ -190,8 +190,11 @@
 };
 
 &usdhc2 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc2>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
 	vmmc-supply = <&reg_vdd_3v3>;
 	vqmmc-supply = <&reg_nvcc_sd>;
 	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
@@ -320,4 +323,28 @@
 			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
 		>;
 	};
+
+	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+		fsl,pins = <
+			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x194
+			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d4
+			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d4
+			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d4
+			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d4
+			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d4
+			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
+		>;
+	};
+
+	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+		fsl,pins = <
+			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x196
+			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d6
+			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d6
+			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d6
+			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d6
+			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d6
+			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
+		>;
+	};
 };
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
index 5c6a660f4395..282a56fb3949 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
@@ -85,6 +85,7 @@
 		pinctrl-0 = <&pinctrl_pmic>;
 		interrupt-parent = <&gpio1>;
 		interrupts = <0 GPIO_ACTIVE_LOW>;
+		sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 
 		regulators {
 			reg_vdd_soc: BUCK1 {
@@ -224,6 +225,7 @@
 	pinctrl_pmic: pmicgrp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x41
+			MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4		0x41
 		>;
 	};
 
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card
  2020-10-01 12:34 ` [PATCH 2/2] arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card Schrempf Frieder
@ 2020-10-01 12:38   ` Frieder Schrempf
  2020-10-01 13:15   ` Frieder Schrempf
  1 sibling, 0 replies; 6+ messages in thread
From: Frieder Schrempf @ 2020-10-01 12:38 UTC (permalink / raw)
  To: Robin Gong, Fabio Estevam, Liam Girdwood, Mark Brown,
	NXP Linux Team, Pengutronix Kernel Team, Sascha Hauer, Shawn Guo
  Cc: devicetree, linux-arm-kernel, linux-kernel

On 01.10.20 14:34, Schrempf Frieder wrote:
> From: Frieder Schrempf <frieder.schrempf@kontron.de>
> 
> In order to use ultra high speed modes (UHS) on the SD card slot, we
> add matching pinctrls and fix the voltage switching for LDO5 of the
> PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
> 
> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Sorry, forgot to mention that this depends on the board support patch:
https://patchwork.kernel.org/patch/11811347/

> ---
>   .../dts/freescale/imx8mm-kontron-n801x-s.dts  | 27 +++++++++++++++++++
>   .../freescale/imx8mm-kontron-n801x-som.dtsi   |  2 ++
>   2 files changed, 29 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> index 389e735b2880..6913aefa56aa 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> @@ -190,8 +190,11 @@
>   };
>   
>   &usdhc2 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&pinctrl_usdhc2>;
> +	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
>   	vmmc-supply = <&reg_vdd_3v3>;
>   	vqmmc-supply = <&reg_nvcc_sd>;
>   	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> @@ -320,4 +323,28 @@
>   			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
>   		>;
>   	};
> +
> +	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x194
> +			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d4
> +			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d4
> +			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d4
> +			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d4
> +			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d4
> +			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
> +		>;
> +	};
> +
> +	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x196
> +			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d6
> +			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d6
> +			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d6
> +			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d6
> +			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d6
> +			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
> +		>;
> +	};
>   };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> index 5c6a660f4395..282a56fb3949 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> @@ -85,6 +85,7 @@
>   		pinctrl-0 = <&pinctrl_pmic>;
>   		interrupt-parent = <&gpio1>;
>   		interrupts = <0 GPIO_ACTIVE_LOW>;
> +		sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
>   
>   		regulators {
>   			reg_vdd_soc: BUCK1 {
> @@ -224,6 +225,7 @@
>   	pinctrl_pmic: pmicgrp {
>   		fsl,pins = <
>   			MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x41
> +			MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4		0x41
>   		>;
>   	};
>   
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5
  2020-10-01 12:34 [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5 Schrempf Frieder
  2020-10-01 12:34 ` [PATCH 2/2] arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card Schrempf Frieder
@ 2020-10-01 12:53 ` Mark Brown
  2020-10-01 13:00   ` Frieder Schrempf
  1 sibling, 1 reply; 6+ messages in thread
From: Mark Brown @ 2020-10-01 12:53 UTC (permalink / raw)
  To: Schrempf Frieder
  Cc: Robin Gong, Fabio Estevam, Liam Girdwood, NXP Linux Team,
	Pengutronix Kernel Team, Sascha Hauer, Shawn Guo, devicetree,
	linux-arm-kernel, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 214 bytes --]

On Thu, Oct 01, 2020 at 02:34:31PM +0200, Schrempf Frieder wrote:

> +	pca9450->sd_vsel_gpio = gpiod_get_optional(pca9450->dev, "sd-vsel", GPIOD_OUT_HIGH);

We need a patch adding this to the binding document too.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5
  2020-10-01 12:53 ` [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5 Mark Brown
@ 2020-10-01 13:00   ` Frieder Schrempf
  0 siblings, 0 replies; 6+ messages in thread
From: Frieder Schrempf @ 2020-10-01 13:00 UTC (permalink / raw)
  To: Mark Brown
  Cc: Robin Gong, Fabio Estevam, Liam Girdwood, NXP Linux Team,
	Pengutronix Kernel Team, Sascha Hauer, Shawn Guo, devicetree,
	linux-arm-kernel, linux-kernel



On 01.10.20 14:53, Mark Brown wrote:
> On Thu, Oct 01, 2020 at 02:34:31PM +0200, Schrempf Frieder wrote:
> 
>> +	pca9450->sd_vsel_gpio = gpiod_get_optional(pca9450->dev, "sd-vsel", GPIOD_OUT_HIGH);
> 
> We need a patch adding this to the binding document too.

Right, totally forgot about that. Thanks for the reminder.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card
  2020-10-01 12:34 ` [PATCH 2/2] arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card Schrempf Frieder
  2020-10-01 12:38   ` Frieder Schrempf
@ 2020-10-01 13:15   ` Frieder Schrempf
  1 sibling, 0 replies; 6+ messages in thread
From: Frieder Schrempf @ 2020-10-01 13:15 UTC (permalink / raw)
  To: Robin Gong, Fabio Estevam, Liam Girdwood, Mark Brown,
	NXP Linux Team, Pengutronix Kernel Team, Sascha Hauer, Shawn Guo
  Cc: devicetree, linux-arm-kernel, linux-kernel

On 01.10.20 14:34, Schrempf Frieder wrote:
> From: Frieder Schrempf <frieder.schrempf@kontron.de>
> 
> In order to use ultra high speed modes (UHS) on the SD card slot, we
> add matching pinctrls and fix the voltage switching for LDO5 of the
> PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
> 
> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
> ---
>   .../dts/freescale/imx8mm-kontron-n801x-s.dts  | 27 +++++++++++++++++++
>   .../freescale/imx8mm-kontron-n801x-som.dtsi   |  2 ++
>   2 files changed, 29 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> index 389e735b2880..6913aefa56aa 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> @@ -190,8 +190,11 @@
>   };
>   
>   &usdhc2 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
>   	pinctrl-names = "default";

And before anyone complains: The above line needs to be dropped of course.

>   	pinctrl-0 = <&pinctrl_usdhc2>;
> +	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
>   	vmmc-supply = <&reg_vdd_3v3>;
>   	vqmmc-supply = <&reg_nvcc_sd>;
>   	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> @@ -320,4 +323,28 @@
>   			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
>   		>;
>   	};
> +
> +	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x194
> +			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d4
> +			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d4
> +			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d4
> +			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d4
> +			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d4
> +			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
> +		>;
> +	};
> +
> +	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x196
> +			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d6
> +			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d6
> +			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d6
> +			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d6
> +			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d6
> +			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
> +		>;
> +	};
>   };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> index 5c6a660f4395..282a56fb3949 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> @@ -85,6 +85,7 @@
>   		pinctrl-0 = <&pinctrl_pmic>;
>   		interrupt-parent = <&gpio1>;
>   		interrupts = <0 GPIO_ACTIVE_LOW>;
> +		sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
>   
>   		regulators {
>   			reg_vdd_soc: BUCK1 {
> @@ -224,6 +225,7 @@
>   	pinctrl_pmic: pmicgrp {
>   		fsl,pins = <
>   			MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x41
> +			MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4		0x41
>   		>;
>   	};
>   
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2020-10-01 13:15 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-01 12:34 [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5 Schrempf Frieder
2020-10-01 12:34 ` [PATCH 2/2] arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card Schrempf Frieder
2020-10-01 12:38   ` Frieder Schrempf
2020-10-01 13:15   ` Frieder Schrempf
2020-10-01 12:53 ` [PATCH 1/2] regulator: pca9450: Add SD_VSEL GPIO for LDO5 Mark Brown
2020-10-01 13:00   ` Frieder Schrempf

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