From: Reinette Chatre <reinette.chatre@intel.com>
To: dave.hansen@linux.intel.com, jarkko@kernel.org,
tglx@linutronix.de, bp@alien8.de, luto@kernel.org,
mingo@redhat.com, linux-sgx@vger.kernel.org, x86@kernel.org,
shuah@kernel.org, linux-kselftest@vger.kernel.org
Cc: seanjc@google.com, kai.huang@intel.com, cathy.zhang@intel.com,
cedric.xing@intel.com, haitao.huang@intel.com,
mark.shanahan@intel.com, vijay.dhanraj@intel.com, hpa@zytor.com,
linux-kernel@vger.kernel.org
Subject: [PATCH V5 07/31] x86/sgx: Rename sgx_encl_ewb_cpumask() as sgx_encl_cpumask()
Date: Tue, 10 May 2022 11:08:43 -0700 [thread overview]
Message-ID: <d4d08c449450a13d8dd3bb6c2b1af03895586d4f.1652137848.git.reinette.chatre@intel.com> (raw)
In-Reply-To: <cover.1652137848.git.reinette.chatre@intel.com>
sgx_encl_ewb_cpumask() is no longer unique to the reclaimer where it
is used during the EWB ENCLS leaf function when EPC pages are written
out to main memory and sgx_encl_ewb_cpumask() is used to learn which
CPUs might have executed the enclave to ensure that TLBs are cleared.
Upcoming SGX2 enabling will use sgx_encl_ewb_cpumask() during the
EMODPR and EMODT ENCLS leaf functions that make changes to enclave
pages. The function is needed for the same reason it is used now: to
learn which CPUs might have executed the enclave to ensure that TLBs
no longer point to the changed pages.
Rename sgx_encl_ewb_cpumask() to sgx_encl_cpumask() to reflect the
broader usage.
Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
No changes since V4.
Changes since V3:
- Add Jarkko's Reviewed-by tag.
Changes since V1:
- New patch split from original "x86/sgx: Use more generic name for
enclave cpumask function" (Jarkko).
arch/x86/kernel/cpu/sgx/encl.c | 6 +++---
arch/x86/kernel/cpu/sgx/encl.h | 2 +-
arch/x86/kernel/cpu/sgx/main.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/sgx/encl.c b/arch/x86/kernel/cpu/sgx/encl.c
index 04d8212ce400..1bbd76d91554 100644
--- a/arch/x86/kernel/cpu/sgx/encl.c
+++ b/arch/x86/kernel/cpu/sgx/encl.c
@@ -710,7 +710,7 @@ int sgx_encl_mm_add(struct sgx_encl *encl, struct mm_struct *mm)
}
/**
- * sgx_encl_ewb_cpumask() - Query which CPUs might be accessing the enclave
+ * sgx_encl_cpumask() - Query which CPUs might be accessing the enclave
* @encl: the enclave
*
* Some SGX functions require that no cached linear-to-physical address
@@ -735,7 +735,7 @@ int sgx_encl_mm_add(struct sgx_encl *encl, struct mm_struct *mm)
* The following flow is used to support SGX functions that require that
* no cached linear-to-physical address mappings are present:
* 1) Execute ENCLS[ETRACK] to initiate hardware tracking.
- * 2) Use this function (sgx_encl_ewb_cpumask()) to query which CPUs might be
+ * 2) Use this function (sgx_encl_cpumask()) to query which CPUs might be
* accessing the enclave.
* 3) Send IPI to identified CPUs, kicking them out of the enclave and
* thus flushing all locally cached linear-to-physical address mappings.
@@ -752,7 +752,7 @@ int sgx_encl_mm_add(struct sgx_encl *encl, struct mm_struct *mm)
*
* Return: cpumask of CPUs that might be accessing @encl
*/
-const cpumask_t *sgx_encl_ewb_cpumask(struct sgx_encl *encl)
+const cpumask_t *sgx_encl_cpumask(struct sgx_encl *encl)
{
cpumask_t *cpumask = &encl->cpumask;
struct sgx_encl_mm *encl_mm;
diff --git a/arch/x86/kernel/cpu/sgx/encl.h b/arch/x86/kernel/cpu/sgx/encl.h
index c6afa58ea3e6..ef8cf106904b 100644
--- a/arch/x86/kernel/cpu/sgx/encl.h
+++ b/arch/x86/kernel/cpu/sgx/encl.h
@@ -105,7 +105,7 @@ int sgx_encl_may_map(struct sgx_encl *encl, unsigned long start,
void sgx_encl_release(struct kref *ref);
int sgx_encl_mm_add(struct sgx_encl *encl, struct mm_struct *mm);
-const cpumask_t *sgx_encl_ewb_cpumask(struct sgx_encl *encl);
+const cpumask_t *sgx_encl_cpumask(struct sgx_encl *encl);
int sgx_encl_get_backing(struct sgx_encl *encl, unsigned long page_index,
struct sgx_backing *backing);
void sgx_encl_put_backing(struct sgx_backing *backing);
diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c
index d1af5828635d..736ca652caab 100644
--- a/arch/x86/kernel/cpu/sgx/main.c
+++ b/arch/x86/kernel/cpu/sgx/main.c
@@ -251,7 +251,7 @@ static void sgx_encl_ewb(struct sgx_epc_page *epc_page,
* miss cpus that entered the enclave between
* generating the mask and incrementing epoch.
*/
- on_each_cpu_mask(sgx_encl_ewb_cpumask(encl),
+ on_each_cpu_mask(sgx_encl_cpumask(encl),
sgx_ipi_cb, NULL, 1);
ret = __sgx_encl_ewb(epc_page, va_slot, backing);
}
--
2.25.1
next prev parent reply other threads:[~2022-05-10 18:10 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-10 18:08 [PATCH V5 00/31] x86/sgx and selftests/sgx: Support SGX2 Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 01/31] x86/sgx: Add short descriptions to ENCLS wrappers Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 02/31] x86/sgx: Add wrapper for SGX2 EMODPR function Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 03/31] x86/sgx: Add wrapper for SGX2 EMODT function Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 04/31] x86/sgx: Add wrapper for SGX2 EAUG function Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 05/31] x86/sgx: Support loading enclave page without VMA permissions check Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 06/31] x86/sgx: Export sgx_encl_ewb_cpumask() Reinette Chatre
2022-05-10 18:08 ` Reinette Chatre [this message]
2022-05-10 18:08 ` [PATCH V5 08/31] x86/sgx: Move PTE zap code to new sgx_zap_enclave_ptes() Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 09/31] x86/sgx: Make sgx_ipi_cb() available internally Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 10/31] x86/sgx: Create utility to validate user provided offset and length Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 11/31] x86/sgx: Keep record of SGX page type Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 12/31] x86/sgx: Export sgx_encl_{grow,shrink}() Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 13/31] x86/sgx: Export sgx_encl_page_alloc() Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 14/31] x86/sgx: Support VA page allocation without reclaiming Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 15/31] x86/sgx: Support restricting of enclave page permissions Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 16/31] x86/sgx: Support adding of pages to an initialized enclave Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 17/31] x86/sgx: Tighten accessible memory range after enclave initialization Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 18/31] x86/sgx: Support modifying SGX page type Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 19/31] x86/sgx: Support complete page removal Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 20/31] x86/sgx: Free up EPC pages directly to support large page ranges Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 21/31] Documentation/x86: Introduce enclave runtime management section Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 22/31] selftests/sgx: Add test for EPCM permission changes Reinette Chatre
2022-05-10 18:08 ` [PATCH V5 23/31] selftests/sgx: Add test for TCS page " Reinette Chatre
2022-05-10 18:09 ` [PATCH V5 24/31] selftests/sgx: Test two different SGX2 EAUG flows Reinette Chatre
2022-05-10 18:09 ` [PATCH V5 25/31] selftests/sgx: Introduce dynamic entry point Reinette Chatre
2022-05-10 18:09 ` [PATCH V5 26/31] selftests/sgx: Introduce TCS initialization enclave operation Reinette Chatre
2022-05-10 18:09 ` [PATCH V5 27/31] selftests/sgx: Test complete changing of page type flow Reinette Chatre
2022-05-10 18:09 ` [PATCH V5 28/31] selftests/sgx: Test faulty enclave behavior Reinette Chatre
2022-05-10 18:09 ` [PATCH V5 29/31] selftests/sgx: Test invalid access to removed enclave page Reinette Chatre
2022-05-10 18:09 ` [PATCH V5 30/31] selftests/sgx: Test reclaiming of untouched page Reinette Chatre
2022-05-10 18:09 ` [PATCH V5 31/31] selftests/sgx: Page removal stress test Reinette Chatre
2022-05-10 22:22 ` [PATCH V5 00/31] x86/sgx and selftests/sgx: Support SGX2 Jarkko Sakkinen
2022-05-11 18:47 ` Reinette Chatre
2022-05-12 18:11 ` Jarkko Sakkinen
2022-06-01 2:01 ` Jarkko Sakkinen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d4d08c449450a13d8dd3bb6c2b1af03895586d4f.1652137848.git.reinette.chatre@intel.com \
--to=reinette.chatre@intel.com \
--cc=bp@alien8.de \
--cc=cathy.zhang@intel.com \
--cc=cedric.xing@intel.com \
--cc=dave.hansen@linux.intel.com \
--cc=haitao.huang@intel.com \
--cc=hpa@zytor.com \
--cc=jarkko@kernel.org \
--cc=kai.huang@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=linux-sgx@vger.kernel.org \
--cc=luto@kernel.org \
--cc=mark.shanahan@intel.com \
--cc=mingo@redhat.com \
--cc=seanjc@google.com \
--cc=shuah@kernel.org \
--cc=tglx@linutronix.de \
--cc=vijay.dhanraj@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).