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Subject: Re: [PATCH v2 3/6] dt-bindings: ata: tegra: Convert binding
 documentation to YAML
From:   Sowjanya Komatineni <skomatineni@nvidia.com>
To:     Rob Herring <robh+dt@kernel.org>
CC:     Thierry Reding <thierry.reding@gmail.com>,
        Jon Hunter <jonathanh@nvidia.com>,
        <devicetree@vger.kernel.org>,
        "open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)" 
        <linux-ide@vger.kernel.org>,
        linux-tegra <linux-tegra@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
References: <1605296218-2510-1-git-send-email-skomatineni@nvidia.com>
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On 11/23/20 11:01 AM, Sowjanya Komatineni wrote:
>
> On 11/20/20 12:17 PM, Rob Herring wrote:
>> On Fri, Nov 13, 2020 at 1:36 PM Sowjanya Komatineni
>> <skomatineni@nvidia.com> wrote:
>>> This patch converts text based dt-binding document to YAML based
>>> dt-binding document.
>>>
>>> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
>>> ---
>>> =C2=A0 .../devicetree/bindings/ata/nvidia,tegra-ahci.yaml | 137=20
>>> +++++++++++++++++++++
>>> =C2=A0 .../bindings/ata/nvidia,tegra124-ahci.txt=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 44 -------
>>> =C2=A0 2 files changed, 137 insertions(+), 44 deletions(-)
>>> =C2=A0 create mode 100644=20
>>> Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
>>> =C2=A0 delete mode 100644=20
>>> Documentation/devicetree/bindings/ata/nvidia,tegra124-ahci.txt
>>>
>>> diff --git=20
>>> a/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml=20
>>> b/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
>>> new file mode 100644
>>> index 0000000..dbbe460
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
>>> @@ -0,0 +1,137 @@
>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Tegra AHCI SATA Controller
>>> +
>>> +maintainers:
>>> +=C2=A0 - Thierry Reding <thierry.reding@gmail.com>
>>> +=C2=A0 - Jonathan Hunter <jonathanh@nvidia.com>
>>> +
>>> +properties:
>>> +=C2=A0 compatible:
>>> +=C2=A0=C2=A0=C2=A0 enum:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - nvidia,tegra124-ahci
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - nvidia,tegra132-ahci
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - nvidia,tegra210-ahci
>>> +
>>> +=C2=A0 reg:
>>> +=C2=A0=C2=A0=C2=A0 minItems: 2
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 3
>>> +=C2=A0=C2=A0=C2=A0 items:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - description: AHCI registers
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - description: SATA configuration and I=
PFS registers
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - description: SATA AUX registers
>>> +
>>> +=C2=A0 interrupts:
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 1
>>> +
>>> +=C2=A0 clock-names:
>>> +=C2=A0=C2=A0=C2=A0 items:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: sata
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: sata-oob
>>> +
>>> +=C2=A0 clocks:
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 2
>>> +
>>> +=C2=A0 reset-names:
>>> +=C2=A0=C2=A0=C2=A0 items:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: sata
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: sata-cold
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: sata-oob
>>> +
>>> +=C2=A0 resets:
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 3
>>> +
>>> +=C2=A0 phy-names:
>>> +=C2=A0=C2=A0=C2=A0 items:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: sata-0
>>> +
>>> +=C2=A0 phys:
>>> +=C2=A0=C2=A0=C2=A0 maxItems: 1
>>> +
>>> +=C2=A0 hvdd-supply:
>>> +=C2=A0=C2=A0=C2=A0 description: SATA HVDD regulator supply.
>>> +
>>> +=C2=A0 vddio-supply:
>>> +=C2=A0=C2=A0=C2=A0 description: SATA VDDIO regulator supply.
>>> +
>>> +=C2=A0 avdd-supply:
>>> +=C2=A0=C2=A0=C2=A0 description: SATA AVDD regulator supply.
>>> +
>>> +=C2=A0 target-5v-supply:
>>> +=C2=A0=C2=A0=C2=A0 description: SATA 5V power regulator supply.
>>> +
>>> +=C2=A0 target-12v-supply:
>>> +=C2=A0=C2=A0=C2=A0 description: SATA 12V power regulator supply.
>>> +
>>> +required:
>>> +=C2=A0 - compatible
>>> +=C2=A0 - reg
>>> +=C2=A0 - interrupts
>>> +=C2=A0 - clock-names
>>> +=C2=A0 - clocks
>>> +=C2=A0 - reset-names
>>> +=C2=A0 - resets
>>> +
>>> +allOf:
>>> +=C2=A0 - if:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 properties:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 compatible:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 contains:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 enu=
m:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 - nvidia,tegra124-ahci
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 - nvidia,tegra132-ahci
>>> +=C2=A0=C2=A0=C2=A0 then:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 properties:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reg:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 maxItems: 2
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reset-names:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 minItems: 3
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 resets:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 minItems: 3
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 required:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - phys
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - phy-names
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - hvdd-supply
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - vddio-supply
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - avdd-supply
>>> +
>>> +=C2=A0 - if:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 properties:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 compatible:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 contains:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 enu=
m:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 - nvidia,tegra210-ahci
>>> +=C2=A0=C2=A0=C2=A0 then:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 properties:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reg:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 minItems: 3
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reset-names:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 minItems: 3
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 resets:
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 minItems: 3
>>> +
>>> +additionalProperties: true
>>> +
>>> +examples:
>>> +=C2=A0 - |
>>> +=C2=A0=C2=A0=C2=A0 #include <dt-bindings/clock/tegra210-car.h>
>>> +=C2=A0=C2=A0=C2=A0 #include <dt-bindings/reset/tegra210-car.h>
>>> +
>>> +=C2=A0=C2=A0=C2=A0 sata@70020000 {
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 com=
patible =3D "nvidia,tegra210-ahci";
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reg=
 =3D <0x0 0x70027000 0x0 0x00002000>, /* AHCI */
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <0x0 0x70020000 0x0 0x00007000>, /* SATA =
*/
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <0x0 0x70001100 0x0 0x00010000>; /* SATA =
AUX */
>> The default sizes are 1 cell for address and size, so this will give
>> you warnings. You either need to adjust the entries here or add a
>> parent node setting the sizes to 2 cells.
>
> Thanks Rob.
>
> tegra210.dtsi already has address and size set to 2 cells in parent=20
> node of sata.
>
> Do you mean to add parent node and address and size cells set to 2 in=20
> this yaml example as well?

>>
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int=
errupts =3D <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
>> The error is because you need the include files for these defines.
> Will add header file for interrupts in yaml example.
>>
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clo=
cks =3D <&tegra_car TEGRA210_CLK_SATA>,
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <&tegra_car TEGRA210_CL=
K_SATA_OOB>;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clo=
ck-names =3D "sata", "sata-oob";
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 res=
ets =3D <&tegra_car 124>,
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <&tegra_car 129>,
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <&tegra_car 123>;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 res=
et-names =3D "sata", "sata-cold", "sata-oob";
>>> +=C2=A0=C2=A0=C2=A0 };

updated reg value with single address and single size along with=20
interrupt header file.

dt_binding_check pass without errors. Will send v3.