From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 971E3C48BCF for ; Wed, 9 Jun 2021 13:47:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8124661364 for ; Wed, 9 Jun 2021 13:47:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236621AbhFINtt (ORCPT ); Wed, 9 Jun 2021 09:49:49 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:53554 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233773AbhFINtr (ORCPT ); Wed, 9 Jun 2021 09:49:47 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 159DliYZ001608; Wed, 9 Jun 2021 08:47:44 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1623246464; bh=r81EU4YF9chVd2IZTA3TUdq4Zmxh9TGeZjs2q9m+MBs=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=UQqr66EFN8exKq9pMM5lyRHN+Qa1wg9WAKXMXHxtnpkfap6Wt6dat0F3vwTaU+4yZ 7x+wk9y2VYqIbZHZ3IBRYrCmtzkMWiKefbJkZuxPMs834EQbB/UA2r3U1R4KUQnkSe YQIF340v3eGKO5/2IH+rDUe08KDcUtHXcnGgTmKs= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 159DliEl003702 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Jun 2021 08:47:44 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 9 Jun 2021 08:47:44 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 9 Jun 2021 08:47:44 -0500 Received: from [10.250.234.148] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 159Dld5r126278; Wed, 9 Jun 2021 08:47:41 -0500 Subject: Re: [PATCH v2 2/2] arm64: dts: ti: k3-am642-evm: align ti,pindir-d0-out-d1-in property with dt-shema To: Aswath Govindraju CC: Lokesh Vutla , Kishon Vijay Abraham I , Nishanth Menon , Tero Kristo , Rob Herring , Jan Kiszka , , , References: <20210608051414.14873-1-a-govindraju@ti.com> <20210608051414.14873-3-a-govindraju@ti.com> From: Vignesh Raghavendra Message-ID: Date: Wed, 9 Jun 2021 19:17:38 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210608051414.14873-3-a-govindraju@ti.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/8/21 10:44 AM, Aswath Govindraju wrote: > ti,pindir-d0-out-d1-in property is expected to be of type boolean. > Therefore, fix the property accordingly. > > Fixes: 4fb6c04683aa ("arm64: dts: ti: k3-am642-evm: Add support for SPI EEPROM") > Signed-off-by: Aswath Govindraju > --- > arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts > index dad0efa961ed..2fd0de905e61 100644 > --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts > +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts > @@ -334,7 +334,7 @@ > &main_spi0 { > pinctrl-names = "default"; > pinctrl-0 = <&main_spi0_pins_default>; > - ti,pindir-d0-out-d1-in = <1>; > + ti,pindir-d0-out-d1-in; > eeprom@0 { > compatible = "microchip,93lc46b"; > reg = <0>; > Reviewed-by: Vignesh Raghavendra