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From: Marc Zyngier <marc.zyngier@arm.com>
To: Brian Norris <briannorris@chromium.org>
Cc: Derek Basehore <dbasehore@chromium.org>,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	rafael.j.wysocki@intel.com, tglx@linutronix.de,
	Sudeep Holla <sudeep.holla@arm.com>
Subject: Re: [PATCH 4/8] irqchip/gic-v3: add ability to save/restore GIC/ITS state
Date: Fri, 19 Jan 2018 09:22:06 +0000	[thread overview]
Message-ID: <d84d49ef-cd8a-ec75-498e-22826809ab67@arm.com> (raw)
In-Reply-To: <20180118233243.GA209323@google.com>

On 18/01/18 23:33, Brian Norris wrote:
> Hi,
> 
> On Sat, Jan 13, 2018 at 06:10:52PM +0000, Marc Zyngier wrote:
>> On Fri, 12 Jan 2018 21:24:18 +0000,
>> Derek Basehore wrote:
>>>
>>> Some platforms power off GIC logic in S3, so we need to save/restore
>>
>> S3 is a not a GIC concept, and is only vaguely mentioned in terms of
>> the rk3399 silicon, if grep serves me right. Please expand on what
>> state this is exactly.
>>
>>> state. This adds a DT-binding to save/restore the GICD/GICR/GITS
>>> states using the new CPU_PM_SYSTEM_ENTER/EXIT CPU PM states.
>>
>> DT binding? I can't see any in this patch.
>>
>>>
>>> Change-Id: I1fb2117296373fa67397fdd4a8960077b241462e
>>
>> It's been mentioned somewhere else in the thread: these tags have no
>> purpose in the kernel. Please sanitise your patches before posting them.
>>
>>> Signed-off-by: Derek Basehore <dbasehore@chromium.org>
>>> Signed-off-by: Brian Norris <briannorris@chromium.org>
>>
>> Who is the author of this patch? If that's a joined authorship, please
>> use the Co-Developed-by: tag.
> 
> I only did some minimal code shuffling when rebasing and working with
> this code in our downstream tree. I probably didn't actually need to
> apply my Signed-off-by at the time, but Derek carried it along anyway.
> 
> Derek is the author, and I'd be perfectly fine dropping my S-o-b from
> these patches.
> 
>>> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
>>> index 9a7a15049903..95d37fb6f458 100644
>>> --- a/drivers/irqchip/irq-gic-v3.c
>>> +++ b/drivers/irqchip/irq-gic-v3.c

[...]

>>> +		if (IS_ERR(gicr_ctx)) {
>>> +			err = PTR_ERR(gicr_ctx);
>>> +			goto out_free_gicd_ctx;
>>> +		}
>>> +	}
>>
>> You really want to kill the box because something went wrong in your
>> save area allocation? It doesn't feel quite right.
> 
> Isn't that what all drivers (including irqchip drivers) do on failed
> allocations? What else would we do? Pretend that we can limp along and
> just b0rk the system when it suspends?
It would certainly give the user a chance to diagnostic the problem
(which is otherwise pretty hard if the system doesn't boot). We kill the
system if we cannot continue. In this case, we can. So why not try it?

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2018-01-19  9:22 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-12 21:24 [PATCH 0/8] GICv3 Save and Restore Derek Basehore
2018-01-12 21:24 ` [PATCH 1/8] cpu_pm: add syscore_suspend error handling Derek Basehore
2018-01-12 22:07   ` Brian Norris
2018-01-12 21:24 ` [PATCH 2/8] lib/iomap_copy: add __ioread64_copy() Derek Basehore
2018-01-12 21:24 ` [PATCH 3/8] cpu_pm: Add SYSTEM_PM state Derek Basehore
2018-01-12 21:24 ` [PATCH 4/8] irqchip/gic-v3: add ability to save/restore GIC/ITS state Derek Basehore
2018-01-13 18:10   ` Marc Zyngier
2018-01-18 23:33     ` Brian Norris
2018-01-19  9:22       ` Marc Zyngier [this message]
2018-01-19 22:58         ` dbasehore .
2018-01-12 21:24 ` [PATCH 5/8] DT/arm,gic-v3: add save-suspend-state property Derek Basehore
2018-01-14 10:48   ` Marc Zyngier
2018-01-12 21:24 ` [PATCH 6/8] irqchip/gic-v3-its: add ability to resend MAPC on resume Derek Basehore
2018-01-14 10:56   ` Marc Zyngier
2018-01-25 23:07     ` dbasehore .
2018-01-12 21:24 ` [PATCH 7/8] DT/arm,gic-v3: add resend-mapc-on-resume property Derek Basehore
2018-01-12 21:24 ` [PATCH 8/8] irqchip/gic-v3: add power down/up sequence Derek Basehore
2018-01-14 11:04   ` Marc Zyngier

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