* [PATCH v17 0/6] support gce on mt8183 platform
@ 2019-11-21 1:54 Bibby Hsieh
2019-11-21 1:54 ` [PATCH v17 1/6] soc: mediatek: cmdq: fixup wrong input order of write api Bibby Hsieh
` (6 more replies)
0 siblings, 7 replies; 18+ messages in thread
From: Bibby Hsieh @ 2019-11-21 1:54 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh, Bibby Hsieh
Changes since v16:
- naming the poll mask enable bit
- add a patch to fiup the input order of write api
Changes since v15:
- rebase onto 5.4-rc1
- rollback the v14 change
- add a patch to fixup the combination of return value
Changes since v14:
- change input argument as pointer in append_commend()
Changes since v13:
- separate poll function as poll w/ & w/o mask function
- directly pass inst into append_command function instead
of returns a pointer
- fixup coding style
- rebase onto 5.3-rc1
[... snip ...]
Bibby Hsieh (6):
soc: mediatek: cmdq: fixup wrong input order of write api
soc: mediatek: cmdq: remove OR opertaion from err return
soc: mediatek: cmdq: define the instruction struct
soc: mediatek: cmdq: add polling function
soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
arm64: dts: add gce node for mt8183
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++
drivers/soc/mediatek/mtk-cmdq-helper.c | 147 +++++++++++++++++++----
include/linux/mailbox/mtk-cmdq-mailbox.h | 11 ++
include/linux/soc/mediatek/mtk-cmdq.h | 53 ++++++++
4 files changed, 195 insertions(+), 26 deletions(-)
--
2.18.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v17 1/6] soc: mediatek: cmdq: fixup wrong input order of write api
2019-11-21 1:54 [PATCH v17 0/6] support gce on mt8183 platform Bibby Hsieh
@ 2019-11-21 1:54 ` Bibby Hsieh
2019-11-22 8:05 ` CK Hu
2019-11-21 1:54 ` [PATCH v17 2/6] soc: mediatek: cmdq: remove OR opertaion from err return Bibby Hsieh
` (5 subsequent siblings)
6 siblings, 1 reply; 18+ messages in thread
From: Bibby Hsieh @ 2019-11-21 1:54 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh, Bibby Hsieh
Fixup a issue was caused by the previous fixup patch.
Fixes: 1a92f989126e ("soc: mediatek: cmdq: reorder the parameter")
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 7aa0517ff2f3..3c82de5f9417 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -155,7 +155,7 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
offset_mask |= CMDQ_WRITE_ENABLE_MASK;
}
- err |= cmdq_pkt_write(pkt, value, subsys, offset_mask);
+ err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
return err;
}
--
2.18.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v17 2/6] soc: mediatek: cmdq: remove OR opertaion from err return
2019-11-21 1:54 [PATCH v17 0/6] support gce on mt8183 platform Bibby Hsieh
2019-11-21 1:54 ` [PATCH v17 1/6] soc: mediatek: cmdq: fixup wrong input order of write api Bibby Hsieh
@ 2019-11-21 1:54 ` Bibby Hsieh
2019-12-11 18:26 ` Matthias Brugger
2019-11-21 1:54 ` [PATCH v17 3/6] soc: mediatek: cmdq: define the instruction struct Bibby Hsieh
` (4 subsequent siblings)
6 siblings, 1 reply; 18+ messages in thread
From: Bibby Hsieh @ 2019-11-21 1:54 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh, Bibby Hsieh
That make debugging confuseidly when we OR two error return number.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 3c82de5f9417..c8fb69787649 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -149,13 +149,16 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
u16 offset, u32 value, u32 mask)
{
u32 offset_mask = offset;
- int err = 0;
+ int err;
if (mask != 0xffffffff) {
err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
+ if (err < 0)
+ return err;
+
offset_mask |= CMDQ_WRITE_ENABLE_MASK;
}
- err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
+ err = cmdq_pkt_write(pkt, subsys, offset_mask, value);
return err;
}
@@ -197,9 +200,11 @@ static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
/* insert EOC and generate IRQ for each command iteration */
err = cmdq_pkt_append_command(pkt, CMDQ_CODE_EOC, 0, CMDQ_EOC_IRQ_EN);
+ if (err < 0)
+ return err;
/* JUMP to end */
- err |= cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
+ err = cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
return err;
}
--
2.18.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v17 3/6] soc: mediatek: cmdq: define the instruction struct
2019-11-21 1:54 [PATCH v17 0/6] support gce on mt8183 platform Bibby Hsieh
2019-11-21 1:54 ` [PATCH v17 1/6] soc: mediatek: cmdq: fixup wrong input order of write api Bibby Hsieh
2019-11-21 1:54 ` [PATCH v17 2/6] soc: mediatek: cmdq: remove OR opertaion from err return Bibby Hsieh
@ 2019-11-21 1:54 ` Bibby Hsieh
2019-11-22 8:30 ` CK Hu
2019-11-21 1:54 ` [PATCH v17 4/6] soc: mediatek: cmdq: add polling function Bibby Hsieh
` (3 subsequent siblings)
6 siblings, 1 reply; 18+ messages in thread
From: Bibby Hsieh @ 2019-11-21 1:54 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh, Bibby Hsieh
Define an instruction structure for gce driver to append command.
This structure can make the client's code more readability.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 73 ++++++++++++++++--------
include/linux/mailbox/mtk-cmdq-mailbox.h | 10 ++++
2 files changed, 59 insertions(+), 24 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index c8fb69787649..11bfcc150ebd 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -9,12 +9,24 @@
#include <linux/mailbox_controller.h>
#include <linux/soc/mediatek/mtk-cmdq.h>
-#define CMDQ_ARG_A_WRITE_MASK 0xffff
#define CMDQ_WRITE_ENABLE_MASK BIT(0)
#define CMDQ_EOC_IRQ_EN BIT(0)
#define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
<< 32 | CMDQ_EOC_IRQ_EN)
+struct cmdq_instruction {
+ union {
+ u32 value;
+ u32 mask;
+ };
+ union {
+ u16 offset;
+ u16 event;
+ };
+ u8 subsys;
+ u8 op;
+};
+
static void cmdq_client_timeout(struct timer_list *t)
{
struct cmdq_client *client = from_timer(client, t, timer);
@@ -110,10 +122,10 @@ void cmdq_pkt_destroy(struct cmdq_pkt *pkt)
}
EXPORT_SYMBOL(cmdq_pkt_destroy);
-static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
- u32 arg_a, u32 arg_b)
+static int cmdq_pkt_append_command(struct cmdq_pkt *pkt,
+ struct cmdq_instruction inst)
{
- u64 *cmd_ptr;
+ struct cmdq_instruction *cmd_ptr;
if (unlikely(pkt->cmd_buf_size + CMDQ_INST_SIZE > pkt->buf_size)) {
/*
@@ -129,8 +141,9 @@ static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
__func__, (u32)pkt->buf_size);
return -ENOMEM;
}
+
cmd_ptr = pkt->va_base + pkt->cmd_buf_size;
- (*cmd_ptr) = (u64)((code << CMDQ_OP_CODE_SHIFT) | arg_a) << 32 | arg_b;
+ *cmd_ptr = inst;
pkt->cmd_buf_size += CMDQ_INST_SIZE;
return 0;
@@ -138,21 +151,28 @@ static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
{
- u32 arg_a = (offset & CMDQ_ARG_A_WRITE_MASK) |
- (subsys << CMDQ_SUBSYS_SHIFT);
+ struct cmdq_instruction inst;
- return cmdq_pkt_append_command(pkt, CMDQ_CODE_WRITE, arg_a, value);
+ inst.op = CMDQ_CODE_WRITE;
+ inst.value = value;
+ inst.offset = offset;
+ inst.subsys = subsys;
+
+ return cmdq_pkt_append_command(pkt, inst);
}
EXPORT_SYMBOL(cmdq_pkt_write);
int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
u16 offset, u32 value, u32 mask)
{
- u32 offset_mask = offset;
+ struct cmdq_instruction inst = { {0} };
+ u16 offset_mask = offset;
int err;
if (mask != 0xffffffff) {
- err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
+ inst.op = CMDQ_CODE_MASK;
+ inst.mask = ~mask;
+ err = cmdq_pkt_append_command(pkt, inst);
if (err < 0)
return err;
@@ -166,45 +186,50 @@ EXPORT_SYMBOL(cmdq_pkt_write_mask);
int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
{
- u32 arg_b;
+ struct cmdq_instruction inst = { {0} };
if (event >= CMDQ_MAX_EVENT)
return -EINVAL;
- /*
- * WFE arg_b
- * bit 0-11: wait value
- * bit 15: 1 - wait, 0 - no wait
- * bit 16-27: update value
- * bit 31: 1 - update, 0 - no update
- */
- arg_b = CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | CMDQ_WFE_WAIT_VALUE;
+ inst.op = CMDQ_CODE_WFE;
+ inst.value = CMDQ_WFE_OPTION;
+ inst.event = event;
- return cmdq_pkt_append_command(pkt, CMDQ_CODE_WFE, event, arg_b);
+ return cmdq_pkt_append_command(pkt, inst);
}
EXPORT_SYMBOL(cmdq_pkt_wfe);
int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
{
+ struct cmdq_instruction inst = { {0} };
+
if (event >= CMDQ_MAX_EVENT)
return -EINVAL;
- return cmdq_pkt_append_command(pkt, CMDQ_CODE_WFE, event,
- CMDQ_WFE_UPDATE);
+ inst.op = CMDQ_CODE_WFE;
+ inst.value = CMDQ_WFE_UPDATE;
+ inst.event = event;
+
+ return cmdq_pkt_append_command(pkt, inst);
}
EXPORT_SYMBOL(cmdq_pkt_clear_event);
static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
{
+ struct cmdq_instruction inst = { {0} };
int err;
/* insert EOC and generate IRQ for each command iteration */
- err = cmdq_pkt_append_command(pkt, CMDQ_CODE_EOC, 0, CMDQ_EOC_IRQ_EN);
+ inst.op = CMDQ_CODE_EOC;
+ inst.value = CMDQ_EOC_IRQ_EN;
+ err = cmdq_pkt_append_command(pkt, inst);
if (err < 0)
return err;
/* JUMP to end */
- err = cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
+ inst.op = CMDQ_CODE_JUMP;
+ inst.value = CMDQ_JUMP_PASS;
+ err = cmdq_pkt_append_command(pkt, inst);
return err;
}
diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
index e6f54ef6698b..678760548791 100644
--- a/include/linux/mailbox/mtk-cmdq-mailbox.h
+++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
@@ -20,6 +20,16 @@
#define CMDQ_WFE_WAIT BIT(15)
#define CMDQ_WFE_WAIT_VALUE 0x1
+/*
+ * WFE arg_b
+ * bit 0-11: wait value
+ * bit 15: 1 - wait, 0 - no wait
+ * bit 16-27: update value
+ * bit 31: 1 - update, 0 - no update
+ */
+#define CMDQ_WFE_OPTION (CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | \
+ CMDQ_WFE_WAIT_VALUE)
+
/** cmdq event maximum */
#define CMDQ_MAX_EVENT 0x3ff
--
2.18.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v17 4/6] soc: mediatek: cmdq: add polling function
2019-11-21 1:54 [PATCH v17 0/6] support gce on mt8183 platform Bibby Hsieh
` (2 preceding siblings ...)
2019-11-21 1:54 ` [PATCH v17 3/6] soc: mediatek: cmdq: define the instruction struct Bibby Hsieh
@ 2019-11-21 1:54 ` Bibby Hsieh
2019-11-22 8:36 ` CK Hu
2019-12-14 21:45 ` Matthias Brugger
2019-11-21 1:54 ` [PATCH v17 5/6] soc: mediatek: cmdq: add cmdq_dev_get_client_reg function Bibby Hsieh
` (2 subsequent siblings)
6 siblings, 2 replies; 18+ messages in thread
From: Bibby Hsieh @ 2019-11-21 1:54 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh, Bibby Hsieh
add polling function in cmdq helper functions
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 36 ++++++++++++++++++++++++
include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
include/linux/soc/mediatek/mtk-cmdq.h | 32 +++++++++++++++++++++
3 files changed, 69 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 11bfcc150ebd..9094fda5a8fe 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -10,6 +10,7 @@
#include <linux/soc/mediatek/mtk-cmdq.h>
#define CMDQ_WRITE_ENABLE_MASK BIT(0)
+#define CMDQ_POLL_ENABLE_MASK BIT(0)
#define CMDQ_EOC_IRQ_EN BIT(0)
#define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
<< 32 | CMDQ_EOC_IRQ_EN)
@@ -214,6 +215,41 @@ int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
}
EXPORT_SYMBOL(cmdq_pkt_clear_event);
+int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
+ u16 offset, u32 value)
+{
+ struct cmdq_instruction inst = { {0} };
+ int err;
+
+ inst.op = CMDQ_CODE_POLL;
+ inst.value = value;
+ inst.offset = offset;
+ inst.subsys = subsys;
+ err = cmdq_pkt_append_command(pkt, inst);
+
+ return err;
+}
+EXPORT_SYMBOL(cmdq_pkt_poll);
+
+int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
+ u16 offset, u32 value, u32 mask)
+{
+ struct cmdq_instruction inst = { {0} };
+ int err;
+
+ inst.op = CMDQ_CODE_MASK;
+ inst.mask = ~mask;
+ err = cmdq_pkt_append_command(pkt, inst);
+ if (err < 0)
+ return err;
+
+ offset = offset | CMDQ_POLL_ENABLE_MASK;
+ err = cmdq_pkt_poll(pkt, subsys, offset, value);
+
+ return err;
+}
+EXPORT_SYMBOL(cmdq_pkt_poll_mask);
+
static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
{
struct cmdq_instruction inst = { {0} };
diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
index 678760548791..a4dc45fbec0a 100644
--- a/include/linux/mailbox/mtk-cmdq-mailbox.h
+++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
@@ -55,6 +55,7 @@
enum cmdq_code {
CMDQ_CODE_MASK = 0x02,
CMDQ_CODE_WRITE = 0x04,
+ CMDQ_CODE_POLL = 0x08,
CMDQ_CODE_JUMP = 0x10,
CMDQ_CODE_WFE = 0x20,
CMDQ_CODE_EOC = 0x40,
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index 9618debb9ceb..92bd5b5c6341 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -99,6 +99,38 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event);
*/
int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
+/**
+ * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to
+ * execute an instruction that wait for a specified
+ * hardware register to check for the value w/o mask.
+ * All GCE hardware threads will be blocked by this
+ * instruction.
+ * @pkt: the CMDQ packet
+ * @subsys: the CMDQ sub system code
+ * @offset: register offset from CMDQ sub system
+ * @value: the specified target register value
+ *
+ * Return: 0 for success; else the error code is returned
+ */
+int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
+ u16 offset, u32 value);
+
+/**
+ * cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to
+ * execute an instruction that wait for a specified
+ * hardware register to check for the value w/ mask.
+ * All GCE hardware threads will be blocked by this
+ * instruction.
+ * @pkt: the CMDQ packet
+ * @subsys: the CMDQ sub system code
+ * @offset: register offset from CMDQ sub system
+ * @value: the specified target register value
+ * @mask: the specified target register mask
+ *
+ * Return: 0 for success; else the error code is returned
+ */
+int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
+ u16 offset, u32 value, u32 mask);
/**
* cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
* packet and call back at the end of done packet
--
2.18.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v17 5/6] soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
2019-11-21 1:54 [PATCH v17 0/6] support gce on mt8183 platform Bibby Hsieh
` (3 preceding siblings ...)
2019-11-21 1:54 ` [PATCH v17 4/6] soc: mediatek: cmdq: add polling function Bibby Hsieh
@ 2019-11-21 1:54 ` Bibby Hsieh
2019-12-14 21:57 ` Matthias Brugger
2019-11-21 1:54 ` [PATCH v17 6/6] arm64: dts: add gce node for mt8183 Bibby Hsieh
2019-12-11 22:09 ` [PATCH v17 0/6] support gce on mt8183 platform Nicolas Boichat
6 siblings, 1 reply; 18+ messages in thread
From: Bibby Hsieh @ 2019-11-21 1:54 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh, Bibby Hsieh
GCE cannot know the register base address, this function
can help cmdq client to get the cmdq_client_reg structure.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Houlong Wei <houlong.wei@mediatek.com>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 29 ++++++++++++++++++++++++++
include/linux/soc/mediatek/mtk-cmdq.h | 21 +++++++++++++++++++
2 files changed, 50 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 9094fda5a8fe..9add0fd5fa6c 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -28,6 +28,35 @@ struct cmdq_instruction {
u8 op;
};
+int cmdq_dev_get_client_reg(struct device *dev,
+ struct cmdq_client_reg *client_reg, int idx)
+{
+ struct of_phandle_args spec;
+ int err;
+
+ if (!client_reg)
+ return -ENOENT;
+
+ err = of_parse_phandle_with_fixed_args(dev->of_node,
+ "mediatek,gce-client-reg",
+ 3, idx, &spec);
+ if (err < 0) {
+ dev_err(dev,
+ "error %d can't parse gce-client-reg property (%d)",
+ err, idx);
+
+ return err;
+ }
+
+ client_reg->subsys = (u8)spec.args[0];
+ client_reg->offset = (u16)spec.args[1];
+ client_reg->size = (u16)spec.args[2];
+ of_node_put(spec.np);
+
+ return 0;
+}
+EXPORT_SYMBOL(cmdq_dev_get_client_reg);
+
static void cmdq_client_timeout(struct timer_list *t)
{
struct cmdq_client *client = from_timer(client, t, timer);
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index 92bd5b5c6341..a74c1d5acdf3 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -15,6 +15,12 @@
struct cmdq_pkt;
+struct cmdq_client_reg {
+ u8 subsys;
+ u16 offset;
+ u16 size;
+};
+
struct cmdq_client {
spinlock_t lock;
u32 pkt_cnt;
@@ -24,6 +30,21 @@ struct cmdq_client {
u32 timeout_ms; /* in unit of microsecond */
};
+/**
+ * cmdq_dev_get_client_reg() - parse cmdq client reg from the device
+ * node of CMDQ client
+ * @dev: device of CMDQ mailbox client
+ * @client_reg: CMDQ client reg pointer
+ * @idx: the index of desired reg
+ *
+ * Return: 0 for success; else the error code is returned
+ *
+ * Help CMDQ client parsing the cmdq client reg
+ * from the device node of CMDQ client.
+ */
+int cmdq_dev_get_client_reg(struct device *dev,
+ struct cmdq_client_reg *client_reg, int idx);
+
/**
* cmdq_mbox_create() - create CMDQ mailbox client and channel
* @dev: device of CMDQ mailbox client
--
2.18.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v17 6/6] arm64: dts: add gce node for mt8183
2019-11-21 1:54 [PATCH v17 0/6] support gce on mt8183 platform Bibby Hsieh
` (4 preceding siblings ...)
2019-11-21 1:54 ` [PATCH v17 5/6] soc: mediatek: cmdq: add cmdq_dev_get_client_reg function Bibby Hsieh
@ 2019-11-21 1:54 ` Bibby Hsieh
2019-12-11 18:56 ` Matthias Brugger
2019-12-11 22:09 ` [PATCH v17 0/6] support gce on mt8183 platform Nicolas Boichat
6 siblings, 1 reply; 18+ messages in thread
From: Bibby Hsieh @ 2019-11-21 1:54 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh, Bibby Hsieh
add gce device node for mt8183
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 6cbbd7726d36..954bcd766c97 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/mt8183-power.h>
+#include <dt-bindings/gce/mt8183-gce.h>
#include "mt8183-pinfunc.h"
/ {
@@ -336,6 +337,15 @@
status = "disabled";
};
+ gce: mailbox@10238000 {
+ compatible = "mediatek,mt8183-gce";
+ reg = <0 0x10238000 0 0x4000>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>;
+ #mbox-cells = <3>;
+ clocks = <&infracfg CLK_INFRA_GCE>;
+ clock-names = "gce";
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8183-uart",
"mediatek,mt6577-uart";
--
2.18.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH v17 1/6] soc: mediatek: cmdq: fixup wrong input order of write api
2019-11-21 1:54 ` [PATCH v17 1/6] soc: mediatek: cmdq: fixup wrong input order of write api Bibby Hsieh
@ 2019-11-22 8:05 ` CK Hu
0 siblings, 0 replies; 18+ messages in thread
From: CK Hu @ 2019-11-22 8:05 UTC (permalink / raw)
To: Bibby Hsieh
Cc: Matthias Brugger, Rob Herring, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, srv_heupstream,
Nicolas Boichat, Dennis-YC Hsieh
Hi, Bibby:
On Thu, 2019-11-21 at 09:54 +0800, Bibby Hsieh wrote:
> Fixup a issue was caused by the previous fixup patch.
>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
> Fixes: 1a92f989126e ("soc: mediatek: cmdq: reorder the parameter")
>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 7aa0517ff2f3..3c82de5f9417 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -155,7 +155,7 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
> offset_mask |= CMDQ_WRITE_ENABLE_MASK;
> }
> - err |= cmdq_pkt_write(pkt, value, subsys, offset_mask);
> + err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
>
> return err;
> }
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 3/6] soc: mediatek: cmdq: define the instruction struct
2019-11-21 1:54 ` [PATCH v17 3/6] soc: mediatek: cmdq: define the instruction struct Bibby Hsieh
@ 2019-11-22 8:30 ` CK Hu
2019-12-11 18:39 ` Matthias Brugger
0 siblings, 1 reply; 18+ messages in thread
From: CK Hu @ 2019-11-22 8:30 UTC (permalink / raw)
To: Bibby Hsieh
Cc: Matthias Brugger, Rob Herring, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, srv_heupstream,
Nicolas Boichat, Dennis-YC Hsieh
Hi, Bibby:
On Thu, 2019-11-21 at 09:54 +0800, Bibby Hsieh wrote:
> Define an instruction structure for gce driver to append command.
> This structure can make the client's code more readability.
Even though I do not like pass struct parameter by value, but struct
cmdq_instruction is just a 64 bits integer and would not be modified in
cmdq_pkt_append_command(), so
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 73 ++++++++++++++++--------
> include/linux/mailbox/mtk-cmdq-mailbox.h | 10 ++++
> 2 files changed, 59 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index c8fb69787649..11bfcc150ebd 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -9,12 +9,24 @@
> #include <linux/mailbox_controller.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> -#define CMDQ_ARG_A_WRITE_MASK 0xffff
> #define CMDQ_WRITE_ENABLE_MASK BIT(0)
> #define CMDQ_EOC_IRQ_EN BIT(0)
> #define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
> << 32 | CMDQ_EOC_IRQ_EN)
>
> +struct cmdq_instruction {
> + union {
> + u32 value;
> + u32 mask;
> + };
> + union {
> + u16 offset;
> + u16 event;
> + };
> + u8 subsys;
> + u8 op;
> +};
> +
> static void cmdq_client_timeout(struct timer_list *t)
> {
> struct cmdq_client *client = from_timer(client, t, timer);
> @@ -110,10 +122,10 @@ void cmdq_pkt_destroy(struct cmdq_pkt *pkt)
> }
> EXPORT_SYMBOL(cmdq_pkt_destroy);
>
> -static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
> - u32 arg_a, u32 arg_b)
> +static int cmdq_pkt_append_command(struct cmdq_pkt *pkt,
> + struct cmdq_instruction inst)
> {
> - u64 *cmd_ptr;
> + struct cmdq_instruction *cmd_ptr;
>
> if (unlikely(pkt->cmd_buf_size + CMDQ_INST_SIZE > pkt->buf_size)) {
> /*
> @@ -129,8 +141,9 @@ static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
> __func__, (u32)pkt->buf_size);
> return -ENOMEM;
> }
> +
> cmd_ptr = pkt->va_base + pkt->cmd_buf_size;
> - (*cmd_ptr) = (u64)((code << CMDQ_OP_CODE_SHIFT) | arg_a) << 32 | arg_b;
> + *cmd_ptr = inst;
> pkt->cmd_buf_size += CMDQ_INST_SIZE;
>
> return 0;
> @@ -138,21 +151,28 @@ static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
>
> int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
> {
> - u32 arg_a = (offset & CMDQ_ARG_A_WRITE_MASK) |
> - (subsys << CMDQ_SUBSYS_SHIFT);
> + struct cmdq_instruction inst;
>
> - return cmdq_pkt_append_command(pkt, CMDQ_CODE_WRITE, arg_a, value);
> + inst.op = CMDQ_CODE_WRITE;
> + inst.value = value;
> + inst.offset = offset;
> + inst.subsys = subsys;
> +
> + return cmdq_pkt_append_command(pkt, inst);
> }
> EXPORT_SYMBOL(cmdq_pkt_write);
>
> int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value, u32 mask)
> {
> - u32 offset_mask = offset;
> + struct cmdq_instruction inst = { {0} };
> + u16 offset_mask = offset;
> int err;
>
> if (mask != 0xffffffff) {
> - err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
> + inst.op = CMDQ_CODE_MASK;
> + inst.mask = ~mask;
> + err = cmdq_pkt_append_command(pkt, inst);
> if (err < 0)
> return err;
>
> @@ -166,45 +186,50 @@ EXPORT_SYMBOL(cmdq_pkt_write_mask);
>
> int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
> {
> - u32 arg_b;
> + struct cmdq_instruction inst = { {0} };
>
> if (event >= CMDQ_MAX_EVENT)
> return -EINVAL;
>
> - /*
> - * WFE arg_b
> - * bit 0-11: wait value
> - * bit 15: 1 - wait, 0 - no wait
> - * bit 16-27: update value
> - * bit 31: 1 - update, 0 - no update
> - */
> - arg_b = CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | CMDQ_WFE_WAIT_VALUE;
> + inst.op = CMDQ_CODE_WFE;
> + inst.value = CMDQ_WFE_OPTION;
> + inst.event = event;
>
> - return cmdq_pkt_append_command(pkt, CMDQ_CODE_WFE, event, arg_b);
> + return cmdq_pkt_append_command(pkt, inst);
> }
> EXPORT_SYMBOL(cmdq_pkt_wfe);
>
> int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
> {
> + struct cmdq_instruction inst = { {0} };
> +
> if (event >= CMDQ_MAX_EVENT)
> return -EINVAL;
>
> - return cmdq_pkt_append_command(pkt, CMDQ_CODE_WFE, event,
> - CMDQ_WFE_UPDATE);
> + inst.op = CMDQ_CODE_WFE;
> + inst.value = CMDQ_WFE_UPDATE;
> + inst.event = event;
> +
> + return cmdq_pkt_append_command(pkt, inst);
> }
> EXPORT_SYMBOL(cmdq_pkt_clear_event);
>
> static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
> {
> + struct cmdq_instruction inst = { {0} };
> int err;
>
> /* insert EOC and generate IRQ for each command iteration */
> - err = cmdq_pkt_append_command(pkt, CMDQ_CODE_EOC, 0, CMDQ_EOC_IRQ_EN);
> + inst.op = CMDQ_CODE_EOC;
> + inst.value = CMDQ_EOC_IRQ_EN;
> + err = cmdq_pkt_append_command(pkt, inst);
> if (err < 0)
> return err;
>
> /* JUMP to end */
> - err = cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
> + inst.op = CMDQ_CODE_JUMP;
> + inst.value = CMDQ_JUMP_PASS;
> + err = cmdq_pkt_append_command(pkt, inst);
>
> return err;
> }
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index e6f54ef6698b..678760548791 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -20,6 +20,16 @@
> #define CMDQ_WFE_WAIT BIT(15)
> #define CMDQ_WFE_WAIT_VALUE 0x1
>
> +/*
> + * WFE arg_b
> + * bit 0-11: wait value
> + * bit 15: 1 - wait, 0 - no wait
> + * bit 16-27: update value
> + * bit 31: 1 - update, 0 - no update
> + */
> +#define CMDQ_WFE_OPTION (CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | \
> + CMDQ_WFE_WAIT_VALUE)
> +
> /** cmdq event maximum */
> #define CMDQ_MAX_EVENT 0x3ff
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 4/6] soc: mediatek: cmdq: add polling function
2019-11-21 1:54 ` [PATCH v17 4/6] soc: mediatek: cmdq: add polling function Bibby Hsieh
@ 2019-11-22 8:36 ` CK Hu
2019-12-14 21:45 ` Matthias Brugger
1 sibling, 0 replies; 18+ messages in thread
From: CK Hu @ 2019-11-22 8:36 UTC (permalink / raw)
To: Bibby Hsieh
Cc: Matthias Brugger, Rob Herring, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, srv_heupstream,
Nicolas Boichat, Dennis-YC Hsieh
Hi, Bibby:
On Thu, 2019-11-21 at 09:54 +0800, Bibby Hsieh wrote:
> add polling function in cmdq helper functions
>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 36 ++++++++++++++++++++++++
> include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
> include/linux/soc/mediatek/mtk-cmdq.h | 32 +++++++++++++++++++++
> 3 files changed, 69 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 11bfcc150ebd..9094fda5a8fe 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -10,6 +10,7 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #define CMDQ_WRITE_ENABLE_MASK BIT(0)
> +#define CMDQ_POLL_ENABLE_MASK BIT(0)
> #define CMDQ_EOC_IRQ_EN BIT(0)
> #define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
> << 32 | CMDQ_EOC_IRQ_EN)
> @@ -214,6 +215,41 @@ int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
> }
> EXPORT_SYMBOL(cmdq_pkt_clear_event);
>
> +int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> +
> + inst.op = CMDQ_CODE_POLL;
> + inst.value = value;
> + inst.offset = offset;
> + inst.subsys = subsys;
> + err = cmdq_pkt_append_command(pkt, inst);
> +
> + return err;
> +}
> +EXPORT_SYMBOL(cmdq_pkt_poll);
> +
> +int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value, u32 mask)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> +
> + inst.op = CMDQ_CODE_MASK;
> + inst.mask = ~mask;
> + err = cmdq_pkt_append_command(pkt, inst);
> + if (err < 0)
> + return err;
> +
> + offset = offset | CMDQ_POLL_ENABLE_MASK;
> + err = cmdq_pkt_poll(pkt, subsys, offset, value);
> +
> + return err;
> +}
> +EXPORT_SYMBOL(cmdq_pkt_poll_mask);
> +
> static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
> {
> struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 678760548791..a4dc45fbec0a 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -55,6 +55,7 @@
> enum cmdq_code {
> CMDQ_CODE_MASK = 0x02,
> CMDQ_CODE_WRITE = 0x04,
> + CMDQ_CODE_POLL = 0x08,
> CMDQ_CODE_JUMP = 0x10,
> CMDQ_CODE_WFE = 0x20,
> CMDQ_CODE_EOC = 0x40,
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 9618debb9ceb..92bd5b5c6341 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -99,6 +99,38 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event);
> */
> int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
>
> +/**
> + * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to
> + * execute an instruction that wait for a specified
> + * hardware register to check for the value w/o mask.
> + * All GCE hardware threads will be blocked by this
> + * instruction.
> + * @pkt: the CMDQ packet
> + * @subsys: the CMDQ sub system code
> + * @offset: register offset from CMDQ sub system
> + * @value: the specified target register value
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value);
> +
> +/**
> + * cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to
> + * execute an instruction that wait for a specified
> + * hardware register to check for the value w/ mask.
> + * All GCE hardware threads will be blocked by this
> + * instruction.
> + * @pkt: the CMDQ packet
> + * @subsys: the CMDQ sub system code
> + * @offset: register offset from CMDQ sub system
> + * @value: the specified target register value
> + * @mask: the specified target register mask
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value, u32 mask);
> /**
> * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
> * packet and call back at the end of done packet
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 2/6] soc: mediatek: cmdq: remove OR opertaion from err return
2019-11-21 1:54 ` [PATCH v17 2/6] soc: mediatek: cmdq: remove OR opertaion from err return Bibby Hsieh
@ 2019-12-11 18:26 ` Matthias Brugger
0 siblings, 0 replies; 18+ messages in thread
From: Matthias Brugger @ 2019-12-11 18:26 UTC (permalink / raw)
To: Bibby Hsieh, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh
On 21/11/2019 02:54, Bibby Hsieh wrote:
> That make debugging confuseidly when we OR two error return number.
>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
Queued for v5.5-next/soc
Thanks!
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 3c82de5f9417..c8fb69787649 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -149,13 +149,16 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value, u32 mask)
> {
> u32 offset_mask = offset;
> - int err = 0;
> + int err;
>
> if (mask != 0xffffffff) {
> err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
> + if (err < 0)
> + return err;
> +
> offset_mask |= CMDQ_WRITE_ENABLE_MASK;
> }
> - err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
> + err = cmdq_pkt_write(pkt, subsys, offset_mask, value);
>
> return err;
> }
> @@ -197,9 +200,11 @@ static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
>
> /* insert EOC and generate IRQ for each command iteration */
> err = cmdq_pkt_append_command(pkt, CMDQ_CODE_EOC, 0, CMDQ_EOC_IRQ_EN);
> + if (err < 0)
> + return err;
>
> /* JUMP to end */
> - err |= cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
> + err = cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
>
> return err;
> }
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 3/6] soc: mediatek: cmdq: define the instruction struct
2019-11-22 8:30 ` CK Hu
@ 2019-12-11 18:39 ` Matthias Brugger
0 siblings, 0 replies; 18+ messages in thread
From: Matthias Brugger @ 2019-12-11 18:39 UTC (permalink / raw)
To: CK Hu, Bibby Hsieh
Cc: Rob Herring, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh
On 22/11/2019 09:30, CK Hu wrote:
> Hi, Bibby:
>
> On Thu, 2019-11-21 at 09:54 +0800, Bibby Hsieh wrote:
>> Define an instruction structure for gce driver to append command.
>> This structure can make the client's code more readability.
>
> Even though I do not like pass struct parameter by value, but struct
> cmdq_instruction is just a 64 bits integer and would not be modified in
> cmdq_pkt_append_command(), so
>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
Applied to v5.5-next/soc
Thanks!
>>
>> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
>> ---
>> drivers/soc/mediatek/mtk-cmdq-helper.c | 73 ++++++++++++++++--------
>> include/linux/mailbox/mtk-cmdq-mailbox.h | 10 ++++
>> 2 files changed, 59 insertions(+), 24 deletions(-)
>>
>> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
>> index c8fb69787649..11bfcc150ebd 100644
>> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
>> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
>> @@ -9,12 +9,24 @@
>> #include <linux/mailbox_controller.h>
>> #include <linux/soc/mediatek/mtk-cmdq.h>
>>
>> -#define CMDQ_ARG_A_WRITE_MASK 0xffff
>> #define CMDQ_WRITE_ENABLE_MASK BIT(0)
>> #define CMDQ_EOC_IRQ_EN BIT(0)
>> #define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
>> << 32 | CMDQ_EOC_IRQ_EN)
>>
>> +struct cmdq_instruction {
>> + union {
>> + u32 value;
>> + u32 mask;
>> + };
>> + union {
>> + u16 offset;
>> + u16 event;
>> + };
>> + u8 subsys;
>> + u8 op;
>> +};
>> +
>> static void cmdq_client_timeout(struct timer_list *t)
>> {
>> struct cmdq_client *client = from_timer(client, t, timer);
>> @@ -110,10 +122,10 @@ void cmdq_pkt_destroy(struct cmdq_pkt *pkt)
>> }
>> EXPORT_SYMBOL(cmdq_pkt_destroy);
>>
>> -static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
>> - u32 arg_a, u32 arg_b)
>> +static int cmdq_pkt_append_command(struct cmdq_pkt *pkt,
>> + struct cmdq_instruction inst)
>> {
>> - u64 *cmd_ptr;
>> + struct cmdq_instruction *cmd_ptr;
>>
>> if (unlikely(pkt->cmd_buf_size + CMDQ_INST_SIZE > pkt->buf_size)) {
>> /*
>> @@ -129,8 +141,9 @@ static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
>> __func__, (u32)pkt->buf_size);
>> return -ENOMEM;
>> }
>> +
>> cmd_ptr = pkt->va_base + pkt->cmd_buf_size;
>> - (*cmd_ptr) = (u64)((code << CMDQ_OP_CODE_SHIFT) | arg_a) << 32 | arg_b;
>> + *cmd_ptr = inst;
>> pkt->cmd_buf_size += CMDQ_INST_SIZE;
>>
>> return 0;
>> @@ -138,21 +151,28 @@ static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
>>
>> int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
>> {
>> - u32 arg_a = (offset & CMDQ_ARG_A_WRITE_MASK) |
>> - (subsys << CMDQ_SUBSYS_SHIFT);
>> + struct cmdq_instruction inst;
>>
>> - return cmdq_pkt_append_command(pkt, CMDQ_CODE_WRITE, arg_a, value);
>> + inst.op = CMDQ_CODE_WRITE;
>> + inst.value = value;
>> + inst.offset = offset;
>> + inst.subsys = subsys;
>> +
>> + return cmdq_pkt_append_command(pkt, inst);
>> }
>> EXPORT_SYMBOL(cmdq_pkt_write);
>>
>> int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
>> u16 offset, u32 value, u32 mask)
>> {
>> - u32 offset_mask = offset;
>> + struct cmdq_instruction inst = { {0} };
>> + u16 offset_mask = offset;
>> int err;
>>
>> if (mask != 0xffffffff) {
>> - err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
>> + inst.op = CMDQ_CODE_MASK;
>> + inst.mask = ~mask;
>> + err = cmdq_pkt_append_command(pkt, inst);
>> if (err < 0)
>> return err;
>>
>> @@ -166,45 +186,50 @@ EXPORT_SYMBOL(cmdq_pkt_write_mask);
>>
>> int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
>> {
>> - u32 arg_b;
>> + struct cmdq_instruction inst = { {0} };
>>
>> if (event >= CMDQ_MAX_EVENT)
>> return -EINVAL;
>>
>> - /*
>> - * WFE arg_b
>> - * bit 0-11: wait value
>> - * bit 15: 1 - wait, 0 - no wait
>> - * bit 16-27: update value
>> - * bit 31: 1 - update, 0 - no update
>> - */
>> - arg_b = CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | CMDQ_WFE_WAIT_VALUE;
>> + inst.op = CMDQ_CODE_WFE;
>> + inst.value = CMDQ_WFE_OPTION;
>> + inst.event = event;
>>
>> - return cmdq_pkt_append_command(pkt, CMDQ_CODE_WFE, event, arg_b);
>> + return cmdq_pkt_append_command(pkt, inst);
>> }
>> EXPORT_SYMBOL(cmdq_pkt_wfe);
>>
>> int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
>> {
>> + struct cmdq_instruction inst = { {0} };
>> +
>> if (event >= CMDQ_MAX_EVENT)
>> return -EINVAL;
>>
>> - return cmdq_pkt_append_command(pkt, CMDQ_CODE_WFE, event,
>> - CMDQ_WFE_UPDATE);
>> + inst.op = CMDQ_CODE_WFE;
>> + inst.value = CMDQ_WFE_UPDATE;
>> + inst.event = event;
>> +
>> + return cmdq_pkt_append_command(pkt, inst);
>> }
>> EXPORT_SYMBOL(cmdq_pkt_clear_event);
>>
>> static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
>> {
>> + struct cmdq_instruction inst = { {0} };
>> int err;
>>
>> /* insert EOC and generate IRQ for each command iteration */
>> - err = cmdq_pkt_append_command(pkt, CMDQ_CODE_EOC, 0, CMDQ_EOC_IRQ_EN);
>> + inst.op = CMDQ_CODE_EOC;
>> + inst.value = CMDQ_EOC_IRQ_EN;
>> + err = cmdq_pkt_append_command(pkt, inst);
>> if (err < 0)
>> return err;
>>
>> /* JUMP to end */
>> - err = cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
>> + inst.op = CMDQ_CODE_JUMP;
>> + inst.value = CMDQ_JUMP_PASS;
>> + err = cmdq_pkt_append_command(pkt, inst);
>>
>> return err;
>> }
>> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
>> index e6f54ef6698b..678760548791 100644
>> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
>> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
>> @@ -20,6 +20,16 @@
>> #define CMDQ_WFE_WAIT BIT(15)
>> #define CMDQ_WFE_WAIT_VALUE 0x1
>>
>> +/*
>> + * WFE arg_b
>> + * bit 0-11: wait value
>> + * bit 15: 1 - wait, 0 - no wait
>> + * bit 16-27: update value
>> + * bit 31: 1 - update, 0 - no update
>> + */
>> +#define CMDQ_WFE_OPTION (CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | \
>> + CMDQ_WFE_WAIT_VALUE)
>> +
>> /** cmdq event maximum */
>> #define CMDQ_MAX_EVENT 0x3ff
>>
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 6/6] arm64: dts: add gce node for mt8183
2019-11-21 1:54 ` [PATCH v17 6/6] arm64: dts: add gce node for mt8183 Bibby Hsieh
@ 2019-12-11 18:56 ` Matthias Brugger
0 siblings, 0 replies; 18+ messages in thread
From: Matthias Brugger @ 2019-12-11 18:56 UTC (permalink / raw)
To: Bibby Hsieh, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh
On 21/11/2019 02:54, Bibby Hsieh wrote:
> add gce device node for mt8183
>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> ---
Applied to v5.5-next/dts64
Thanks!
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 6cbbd7726d36..954bcd766c97 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -9,6 +9,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/power/mt8183-power.h>
> +#include <dt-bindings/gce/mt8183-gce.h>
> #include "mt8183-pinfunc.h"
>
> / {
> @@ -336,6 +337,15 @@
> status = "disabled";
> };
>
> + gce: mailbox@10238000 {
> + compatible = "mediatek,mt8183-gce";
> + reg = <0 0x10238000 0 0x4000>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>;
> + #mbox-cells = <3>;
> + clocks = <&infracfg CLK_INFRA_GCE>;
> + clock-names = "gce";
> + };
> +
> uart0: serial@11002000 {
> compatible = "mediatek,mt8183-uart",
> "mediatek,mt6577-uart";
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 0/6] support gce on mt8183 platform
2019-11-21 1:54 [PATCH v17 0/6] support gce on mt8183 platform Bibby Hsieh
` (5 preceding siblings ...)
2019-11-21 1:54 ` [PATCH v17 6/6] arm64: dts: add gce node for mt8183 Bibby Hsieh
@ 2019-12-11 22:09 ` Nicolas Boichat
2019-12-12 7:49 ` Matthias Brugger
6 siblings, 1 reply; 18+ messages in thread
From: Nicolas Boichat @ 2019-12-11 22:09 UTC (permalink / raw)
To: Bibby Hsieh
Cc: Matthias Brugger, Rob Herring, CK HU, devicetree, lkml,
linux-arm Mailing List, moderated list:ARM/Mediatek SoC support,
srv_heupstream, Dennis-YC Hsieh
Hi Matthias,
Quick question, any reason you picked only patches 2+3+6 from this
series, and not the 3 others?
Thanks.
On Wed, Nov 20, 2019 at 5:54 PM Bibby Hsieh <bibby.hsieh@mediatek.com> wrote:
>
> Changes since v16:
> - naming the poll mask enable bit
> - add a patch to fiup the input order of write api
>
> Changes since v15:
> - rebase onto 5.4-rc1
> - rollback the v14 change
> - add a patch to fixup the combination of return value
>
> Changes since v14:
> - change input argument as pointer in append_commend()
>
> Changes since v13:
> - separate poll function as poll w/ & w/o mask function
> - directly pass inst into append_command function instead
> of returns a pointer
> - fixup coding style
> - rebase onto 5.3-rc1
>
> [... snip ...]
>
> Bibby Hsieh (6):
> soc: mediatek: cmdq: fixup wrong input order of write api
> soc: mediatek: cmdq: remove OR opertaion from err return
> soc: mediatek: cmdq: define the instruction struct
> soc: mediatek: cmdq: add polling function
> soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
> arm64: dts: add gce node for mt8183
>
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++
> drivers/soc/mediatek/mtk-cmdq-helper.c | 147 +++++++++++++++++++----
> include/linux/mailbox/mtk-cmdq-mailbox.h | 11 ++
> include/linux/soc/mediatek/mtk-cmdq.h | 53 ++++++++
> 4 files changed, 195 insertions(+), 26 deletions(-)
>
> --
> 2.18.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 0/6] support gce on mt8183 platform
2019-12-11 22:09 ` [PATCH v17 0/6] support gce on mt8183 platform Nicolas Boichat
@ 2019-12-12 7:49 ` Matthias Brugger
2019-12-12 9:47 ` Bibby Hsieh
0 siblings, 1 reply; 18+ messages in thread
From: Matthias Brugger @ 2019-12-12 7:49 UTC (permalink / raw)
To: Nicolas Boichat, Bibby Hsieh
Cc: Rob Herring, CK HU, devicetree, lkml, linux-arm Mailing List,
moderated list:ARM/Mediatek SoC support, srv_heupstream,
Dennis-YC Hsieh
On 11/12/2019 23:09, Nicolas Boichat wrote:
> Hi Matthias,
>
> Quick question, any reason you picked only patches 2+3+6 from this
> series, and not the 3 others?
>
The quick answer, time :)
The longer one:
1/6 went already in through fixes for v5.4
4/6 it touches mailbox code, so we will need a acked-by from Jassi
5/6 time, I want to have a better look onto this to see if that makes sense (I
slightly remember some old comment I had on this)
Regards,
Matthias
> Thanks.
>
> On Wed, Nov 20, 2019 at 5:54 PM Bibby Hsieh <bibby.hsieh@mediatek.com> wrote:
>>
>> Changes since v16:
>> - naming the poll mask enable bit
>> - add a patch to fiup the input order of write api
>>
>> Changes since v15:
>> - rebase onto 5.4-rc1
>> - rollback the v14 change
>> - add a patch to fixup the combination of return value
>>
>> Changes since v14:
>> - change input argument as pointer in append_commend()
>>
>> Changes since v13:
>> - separate poll function as poll w/ & w/o mask function
>> - directly pass inst into append_command function instead
>> of returns a pointer
>> - fixup coding style
>> - rebase onto 5.3-rc1
>>
>> [... snip ...]
>>
>> Bibby Hsieh (6):
>> soc: mediatek: cmdq: fixup wrong input order of write api
>> soc: mediatek: cmdq: remove OR opertaion from err return
>> soc: mediatek: cmdq: define the instruction struct
>> soc: mediatek: cmdq: add polling function
>> soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
>> arm64: dts: add gce node for mt8183
>>
>> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++
>> drivers/soc/mediatek/mtk-cmdq-helper.c | 147 +++++++++++++++++++----
>> include/linux/mailbox/mtk-cmdq-mailbox.h | 11 ++
>> include/linux/soc/mediatek/mtk-cmdq.h | 53 ++++++++
>> 4 files changed, 195 insertions(+), 26 deletions(-)
>>
>> --
>> 2.18.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 0/6] support gce on mt8183 platform
2019-12-12 7:49 ` Matthias Brugger
@ 2019-12-12 9:47 ` Bibby Hsieh
0 siblings, 0 replies; 18+ messages in thread
From: Bibby Hsieh @ 2019-12-12 9:47 UTC (permalink / raw)
To: Matthias Brugger, Jassi Brar
Cc: Nicolas Boichat, Rob Herring, CK HU, devicetree, lkml,
linux-arm Mailing List, moderated list:ARM/Mediatek SoC support,
srv_heupstream, Dennis-YC Hsieh
On Thu, 2019-12-12 at 08:49 +0100, Matthias Brugger wrote:
>
> On 11/12/2019 23:09, Nicolas Boichat wrote:
> > Hi Matthias,
> >
> > Quick question, any reason you picked only patches 2+3+6 from this
> > series, and not the 3 others?
> >
>
> The quick answer, time :)
> The longer one:
> 1/6 went already in through fixes for v5.4
> 4/6 it touches mailbox code, so we will need a acked-by from Jassi
Hi, Jassi,
Sorry for the mailing losing.
Could you help me to review [PATCH 4/6 soc: mediatek: cmdq: add polling
function] if you are free?
Bibby
> 5/6 time, I want to have a better look onto this to see if that makes sense (I
> slightly remember some old comment I had on this)
>
> Regards,
> Matthias
>
> > Thanks.
> >
> > On Wed, Nov 20, 2019 at 5:54 PM Bibby Hsieh <bibby.hsieh@mediatek.com> wrote:
> >>
> >> Changes since v16:
> >> - naming the poll mask enable bit
> >> - add a patch to fiup the input order of write api
> >>
> >> Changes since v15:
> >> - rebase onto 5.4-rc1
> >> - rollback the v14 change
> >> - add a patch to fixup the combination of return value
> >>
> >> Changes since v14:
> >> - change input argument as pointer in append_commend()
> >>
> >> Changes since v13:
> >> - separate poll function as poll w/ & w/o mask function
> >> - directly pass inst into append_command function instead
> >> of returns a pointer
> >> - fixup coding style
> >> - rebase onto 5.3-rc1
> >>
> >> [... snip ...]
> >>
> >> Bibby Hsieh (6):
> >> soc: mediatek: cmdq: fixup wrong input order of write api
> >> soc: mediatek: cmdq: remove OR opertaion from err return
> >> soc: mediatek: cmdq: define the instruction struct
> >> soc: mediatek: cmdq: add polling function
> >> soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
> >> arm64: dts: add gce node for mt8183
> >>
> >> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++
> >> drivers/soc/mediatek/mtk-cmdq-helper.c | 147 +++++++++++++++++++----
> >> include/linux/mailbox/mtk-cmdq-mailbox.h | 11 ++
> >> include/linux/soc/mediatek/mtk-cmdq.h | 53 ++++++++
> >> 4 files changed, 195 insertions(+), 26 deletions(-)
> >>
> >> --
> >> 2.18.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 4/6] soc: mediatek: cmdq: add polling function
2019-11-21 1:54 ` [PATCH v17 4/6] soc: mediatek: cmdq: add polling function Bibby Hsieh
2019-11-22 8:36 ` CK Hu
@ 2019-12-14 21:45 ` Matthias Brugger
1 sibling, 0 replies; 18+ messages in thread
From: Matthias Brugger @ 2019-12-14 21:45 UTC (permalink / raw)
To: Bibby Hsieh, Rob Herring, CK HU, Jassi Brar
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh
Hi Jassi,
On 21/11/2019 02:54, Bibby Hsieh wrote:
> add polling function in cmdq helper functions
>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 36 ++++++++++++++++++++++++
> include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
> include/linux/soc/mediatek/mtk-cmdq.h | 32 +++++++++++++++++++++
> 3 files changed, 69 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 11bfcc150ebd..9094fda5a8fe 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -10,6 +10,7 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #define CMDQ_WRITE_ENABLE_MASK BIT(0)
> +#define CMDQ_POLL_ENABLE_MASK BIT(0)
> #define CMDQ_EOC_IRQ_EN BIT(0)
> #define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
> << 32 | CMDQ_EOC_IRQ_EN)
> @@ -214,6 +215,41 @@ int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
> }
> EXPORT_SYMBOL(cmdq_pkt_clear_event);
>
> +int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> +
> + inst.op = CMDQ_CODE_POLL;
> + inst.value = value;
> + inst.offset = offset;
> + inst.subsys = subsys;
> + err = cmdq_pkt_append_command(pkt, inst);
> +
> + return err;
> +}
> +EXPORT_SYMBOL(cmdq_pkt_poll);
> +
> +int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value, u32 mask)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> +
> + inst.op = CMDQ_CODE_MASK;
> + inst.mask = ~mask;
> + err = cmdq_pkt_append_command(pkt, inst);
> + if (err < 0)
> + return err;
> +
> + offset = offset | CMDQ_POLL_ENABLE_MASK;
> + err = cmdq_pkt_poll(pkt, subsys, offset, value);
> +
> + return err;
> +}
> +EXPORT_SYMBOL(cmdq_pkt_poll_mask);
> +
> static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
> {
> struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 678760548791..a4dc45fbec0a 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -55,6 +55,7 @@
> enum cmdq_code {
> CMDQ_CODE_MASK = 0x02,
> CMDQ_CODE_WRITE = 0x04,
> + CMDQ_CODE_POLL = 0x08,
I understand that this is a minor change in the code, so I queued this in my
branch v5.5-next/soc for now.
Let me know if you need a stable branch with the commit to merge it into your tree.
Hope there is no problem with that.
Regards,
Matthias
> CMDQ_CODE_JUMP = 0x10,
> CMDQ_CODE_WFE = 0x20,
> CMDQ_CODE_EOC = 0x40,
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 9618debb9ceb..92bd5b5c6341 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -99,6 +99,38 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event);
> */
> int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
>
> +/**
> + * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to
> + * execute an instruction that wait for a specified
> + * hardware register to check for the value w/o mask.
> + * All GCE hardware threads will be blocked by this
> + * instruction.
> + * @pkt: the CMDQ packet
> + * @subsys: the CMDQ sub system code
> + * @offset: register offset from CMDQ sub system
> + * @value: the specified target register value
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value);
> +
> +/**
> + * cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to
> + * execute an instruction that wait for a specified
> + * hardware register to check for the value w/ mask.
> + * All GCE hardware threads will be blocked by this
> + * instruction.
> + * @pkt: the CMDQ packet
> + * @subsys: the CMDQ sub system code
> + * @offset: register offset from CMDQ sub system
> + * @value: the specified target register value
> + * @mask: the specified target register mask
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value, u32 mask);
> /**
> * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
> * packet and call back at the end of done packet
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v17 5/6] soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
2019-11-21 1:54 ` [PATCH v17 5/6] soc: mediatek: cmdq: add cmdq_dev_get_client_reg function Bibby Hsieh
@ 2019-12-14 21:57 ` Matthias Brugger
0 siblings, 0 replies; 18+ messages in thread
From: Matthias Brugger @ 2019-12-14 21:57 UTC (permalink / raw)
To: Bibby Hsieh, Rob Herring, CK HU
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Nicolas Boichat, Dennis-YC Hsieh
On 21/11/2019 02:54, Bibby Hsieh wrote:
> GCE cannot know the register base address, this function
> can help cmdq client to get the cmdq_client_reg structure.
>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> Reviewed-by: Houlong Wei <houlong.wei@mediatek.com>
Applied to v5.5-next/soc
Thanks!
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 29 ++++++++++++++++++++++++++
> include/linux/soc/mediatek/mtk-cmdq.h | 21 +++++++++++++++++++
> 2 files changed, 50 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 9094fda5a8fe..9add0fd5fa6c 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -28,6 +28,35 @@ struct cmdq_instruction {
> u8 op;
> };
>
> +int cmdq_dev_get_client_reg(struct device *dev,
> + struct cmdq_client_reg *client_reg, int idx)
> +{
> + struct of_phandle_args spec;
> + int err;
> +
> + if (!client_reg)
> + return -ENOENT;
> +
> + err = of_parse_phandle_with_fixed_args(dev->of_node,
> + "mediatek,gce-client-reg",
> + 3, idx, &spec);
> + if (err < 0) {
> + dev_err(dev,
> + "error %d can't parse gce-client-reg property (%d)",
> + err, idx);
> +
> + return err;
> + }
> +
> + client_reg->subsys = (u8)spec.args[0];
> + client_reg->offset = (u16)spec.args[1];
> + client_reg->size = (u16)spec.args[2];
> + of_node_put(spec.np);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(cmdq_dev_get_client_reg);
> +
> static void cmdq_client_timeout(struct timer_list *t)
> {
> struct cmdq_client *client = from_timer(client, t, timer);
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 92bd5b5c6341..a74c1d5acdf3 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -15,6 +15,12 @@
>
> struct cmdq_pkt;
>
> +struct cmdq_client_reg {
> + u8 subsys;
> + u16 offset;
> + u16 size;
> +};
> +
> struct cmdq_client {
> spinlock_t lock;
> u32 pkt_cnt;
> @@ -24,6 +30,21 @@ struct cmdq_client {
> u32 timeout_ms; /* in unit of microsecond */
> };
>
> +/**
> + * cmdq_dev_get_client_reg() - parse cmdq client reg from the device
> + * node of CMDQ client
> + * @dev: device of CMDQ mailbox client
> + * @client_reg: CMDQ client reg pointer
> + * @idx: the index of desired reg
> + *
> + * Return: 0 for success; else the error code is returned
> + *
> + * Help CMDQ client parsing the cmdq client reg
> + * from the device node of CMDQ client.
> + */
> +int cmdq_dev_get_client_reg(struct device *dev,
> + struct cmdq_client_reg *client_reg, int idx);
> +
> /**
> * cmdq_mbox_create() - create CMDQ mailbox client and channel
> * @dev: device of CMDQ mailbox client
>
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2019-12-14 21:57 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-21 1:54 [PATCH v17 0/6] support gce on mt8183 platform Bibby Hsieh
2019-11-21 1:54 ` [PATCH v17 1/6] soc: mediatek: cmdq: fixup wrong input order of write api Bibby Hsieh
2019-11-22 8:05 ` CK Hu
2019-11-21 1:54 ` [PATCH v17 2/6] soc: mediatek: cmdq: remove OR opertaion from err return Bibby Hsieh
2019-12-11 18:26 ` Matthias Brugger
2019-11-21 1:54 ` [PATCH v17 3/6] soc: mediatek: cmdq: define the instruction struct Bibby Hsieh
2019-11-22 8:30 ` CK Hu
2019-12-11 18:39 ` Matthias Brugger
2019-11-21 1:54 ` [PATCH v17 4/6] soc: mediatek: cmdq: add polling function Bibby Hsieh
2019-11-22 8:36 ` CK Hu
2019-12-14 21:45 ` Matthias Brugger
2019-11-21 1:54 ` [PATCH v17 5/6] soc: mediatek: cmdq: add cmdq_dev_get_client_reg function Bibby Hsieh
2019-12-14 21:57 ` Matthias Brugger
2019-11-21 1:54 ` [PATCH v17 6/6] arm64: dts: add gce node for mt8183 Bibby Hsieh
2019-12-11 18:56 ` Matthias Brugger
2019-12-11 22:09 ` [PATCH v17 0/6] support gce on mt8183 platform Nicolas Boichat
2019-12-12 7:49 ` Matthias Brugger
2019-12-12 9:47 ` Bibby Hsieh
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