From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7B18C352A2 for ; Thu, 6 Feb 2020 06:23:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7E1AE218AC for ; Thu, 6 Feb 2020 06:23:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=c-s.fr header.i=@c-s.fr header.b="Y1dU660X" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727862AbgBFGX3 (ORCPT ); Thu, 6 Feb 2020 01:23:29 -0500 Received: from pegase1.c-s.fr ([93.17.236.30]:19958 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726060AbgBFGX2 (ORCPT ); Thu, 6 Feb 2020 01:23:28 -0500 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 48CpK93w5BzB09bK; Thu, 6 Feb 2020 07:23:25 +0100 (CET) Authentication-Results: localhost; dkim=pass reason="1024-bit key; insecure key" header.d=c-s.fr header.i=@c-s.fr header.b=Y1dU660X; dkim-adsp=pass; dkim-atps=neutral X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id asWDc9O33Sil; Thu, 6 Feb 2020 07:23:25 +0100 (CET) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 48CpK92fmTzB09bJ; Thu, 6 Feb 2020 07:23:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1580970205; bh=Uq8b4GJRWETNuaD6MUNnvgK+ffhgHHEsOWcKLASMC18=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=Y1dU660XxRdZdA/27zEbpyOzaLtZOAGcSuIkJ/dj/pX+E56+LZXTBB0QWP8a4K+gh AaHGyK/mapKR1p7C6UkWKhJ8+0ru8mvW6YrfYcPBnryov7Nzxfp7efEhnOMJBPfo8m O8BFRVCXordsMjJ4rkwVuB+loP+QV7QLwGZp2vJE= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 3838D8B85F; Thu, 6 Feb 2020 07:23:26 +0100 (CET) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id R5Za9e4aaC32; Thu, 6 Feb 2020 07:23:26 +0100 (CET) Received: from [192.168.4.90] (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 6BBC78B776; Thu, 6 Feb 2020 07:23:24 +0100 (CET) Subject: Re: [PATCH v6 10/11] powerpc/mm: Adds counting method to track lockless pagetable walks To: Leonardo Bras , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Arnd Bergmann , Andrew Morton , "Aneesh Kumar K.V" , Nicholas Piggin , Steven Price , Robin Murphy , Mahesh Salgaonkar , Balbir Singh , Reza Arbab , Thomas Gleixner , Allison Randal , Greg Kroah-Hartman , Mike Rapoport , Michal Suchanek Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, kvm-ppc@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org References: <20200206030900.147032-1-leonardo@linux.ibm.com> <20200206030900.147032-11-leonardo@linux.ibm.com> From: Christophe Leroy Message-ID: Date: Thu, 6 Feb 2020 07:23:24 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <20200206030900.147032-11-leonardo@linux.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le 06/02/2020 à 04:08, Leonardo Bras a écrit : > Implements an additional feature to track lockless pagetable walks, > using a per-cpu counter: lockless_pgtbl_walk_counter. > > Before a lockless pagetable walk, preemption is disabled and the > current cpu's counter is increased. > When the lockless pagetable walk finishes, the current cpu counter > is decreased and the preemption is enabled. > > With that, it's possible to know in which cpus are happening lockless > pagetable walks, and optimize serialize_against_pte_lookup(). > > Implementation notes: > - Every counter can be changed only by it's CPU > - It makes use of the original memory barrier in the functions > - Any counter can be read by any CPU > > Due to not locking nor using atomic variables, the impact on the > lockless pagetable walk is intended to be minimum. atomic variables have a lot less impact than preempt_enable/disable. preemt_disable forces a re-scheduling, it really has impact. Why not use atomic variables instead ? Christophe > > Signed-off-by: Leonardo Bras > --- > arch/powerpc/mm/book3s64/pgtable.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c > index 535613030363..bb138b628f86 100644 > --- a/arch/powerpc/mm/book3s64/pgtable.c > +++ b/arch/powerpc/mm/book3s64/pgtable.c > @@ -83,6 +83,7 @@ static void do_nothing(void *unused) > > } > > +static DEFINE_PER_CPU(int, lockless_pgtbl_walk_counter); > /* > * Serialize against find_current_mm_pte which does lock-less > * lookup in page tables with local interrupts disabled. For huge pages > @@ -120,6 +121,15 @@ unsigned long __begin_lockless_pgtbl_walk(bool disable_irq) > if (disable_irq) > local_irq_save(irq_mask); > > + /* > + * Counts this instance of lockless pagetable walk for this cpu. > + * Disables preempt to make sure there is no cpu change between > + * begin/end lockless pagetable walk, so that percpu counting > + * works fine. > + */ > + preempt_disable(); > + (*this_cpu_ptr(&lockless_pgtbl_walk_counter))++; > + > /* > * This memory barrier pairs with any code that is either trying to > * delete page tables, or split huge pages. Without this barrier, > @@ -158,6 +168,14 @@ inline void __end_lockless_pgtbl_walk(unsigned long irq_mask, bool enable_irq) > */ > smp_mb(); > > + /* > + * Removes this instance of lockless pagetable walk for this cpu. > + * Enables preempt only after end lockless pagetable walk, > + * so that percpu counting works fine. > + */ > + (*this_cpu_ptr(&lockless_pgtbl_walk_counter))--; > + preempt_enable(); > + > /* > * Interrupts must be disabled during the lockless page table walk. > * That's because the deleting or splitting involves flushing TLBs, >