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From: Marc Zyngier <marc.zyngier@arm.com>
To: Yang Yingliang <yangyingliang@huawei.com>
Cc: Hanjun Guo <guohanjun@huawei.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	xuehuahu@hisilicon.com
Subject: Re: Supporting more IRQs than NR_IRQS + 8196 on ARM64 server
Date: Fri, 22 Jun 2018 11:38:34 +0100	[thread overview]
Message-ID: <d9fb69e1-6a25-a3a8-8073-c556f7ebcb92@arm.com> (raw)
In-Reply-To: <5B2CB5C7.1020801@huawei.com>

Hi Yang,

On 22/06/18 09:39, Yang Yingliang wrote:
> Hi, Marc
> Current system only supports (NR_IRQS + 8196) interrupts. It's not 
> enough on ARM64 server, on D06 we have several pcie devices and each
> device supports 256 VMs and each VM uses 64 interrupts. Can we set> NR_IRQS to a bigger value to support more interrupts ?
You could, but it feels quite hackish, and not future proof at all. It
would unnecessarily affect smaller systems that do not need the overhead.

I'd rather we offer the architecture a way to buy into a more dynamic
scheme which wouldn't be limited by a bitmap, or at least made the
bitmap extensible.

I'll have a think about it.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

      reply	other threads:[~2018-06-22 10:38 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-22  8:39 Supporting more IRQs than NR_IRQS + 8196 on ARM64 server Yang Yingliang
2018-06-22 10:38 ` Marc Zyngier [this message]

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