From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
To: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>,
agross@kernel.org, bjorn.andersson@linaro.org,
lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org,
plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz,
tiwai@suse.com, rohitkr@codeaurora.org,
linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
swboyd@chromium.org, judyhsiao@chromium.org
Cc: Venkata Prasad Potturu <potturu@codeaurora.org>
Subject: Re: [PATCH v2 4/5] ASoC: codecs: tx-macro: Update tx default values
Date: Tue, 28 Sep 2021 09:31:19 +0100 [thread overview]
Message-ID: <da23bfce-23cd-0869-d752-b0713136072a@linaro.org> (raw)
In-Reply-To: <20ddc4ea-e99c-5492-1931-be1999655563@codeaurora.org>
On 27/09/2021 17:42, Srinivasa Rao Mandadapu wrote:
>
> On 9/27/2021 4:12 PM, Srinivas Kandagatla wrote:
> Thanks for your time Srini!!
>>
>> On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
>>> Update mic control register default values to hardware reset values
>>>
>>> Fixes: c39667ddcfc5 (ASoC: codecs: lpass-tx-macro: add support for
>>> lpass tx macro)
>>>
>>> Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
>>> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
>>> ---
>>> sound/soc/codecs/lpass-tx-macro.c | 6 +++---
>>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/sound/soc/codecs/lpass-tx-macro.c
>>> b/sound/soc/codecs/lpass-tx-macro.c
>>> index e980b2e..66c39fb 100644
>>> --- a/sound/soc/codecs/lpass-tx-macro.c
>>> +++ b/sound/soc/codecs/lpass-tx-macro.c
>>> @@ -279,7 +279,7 @@ static const struct reg_default tx_defaults[] = {
>>> { CDC_TX_CLK_RST_CTRL_SWR_CONTROL, 0x00},
>>> { CDC_TX_TOP_CSR_TOP_CFG0, 0x00},
>>> { CDC_TX_TOP_CSR_ANC_CFG, 0x00},
>>> - { CDC_TX_TOP_CSR_SWR_CTRL, 0x00},
>>> + { CDC_TX_TOP_CSR_SWR_CTRL, 0x60},
>>
>> This does not make sense as this register only has one bit to control.
>> Why do we even need to change this, can you please explain what
>> happens if we do not change this?
>
> This register change is not making any impact. But when verified , reset
> state of this register is 0x60. so is the reason for change.
>
> Will revert it and post again.
>
>>
>>> { CDC_TX_TOP_CSR_FREQ_MCLK, 0x00},
>>> { CDC_TX_TOP_CSR_DEBUG_BUS, 0x00},
>>> { CDC_TX_TOP_CSR_DEBUG_EN, 0x00},
>>> @@ -290,8 +290,8 @@ static const struct reg_default tx_defaults[] = {
>>> { CDC_TX_TOP_CSR_SWR_DMIC1_CTL, 0x00},
>>> { CDC_TX_TOP_CSR_SWR_DMIC2_CTL, 0x00},
>>> { CDC_TX_TOP_CSR_SWR_DMIC3_CTL, 0x00},
>>> - { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x00},
>>> - { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x00},
>>> + { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x0E},
>>> + { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x0E},
>>
>> These two registers should have default value of 0x06 as this has only
>> one clk selection field with bits 2:1.
>
> In Kodiak document reset state 0x0E and clk selection field is with bits 3:1
>
> *LPASS_TX_TX_TOP_CSR_SWR_MIC1_CTL*|0x32200D4
> Offset: 0x54 Reset State: 0x0000000E
In that case you should probably consider using regmap_register_patch()
for corrections to the default registers in sm8250 case.
--srini
>
>>
>> -srini
>>
>>
>>> { CDC_TX_INP_MUX_ADC_MUX0_CFG0, 0x00},
>>> { CDC_TX_INP_MUX_ADC_MUX0_CFG1, 0x00},
>>> { CDC_TX_INP_MUX_ADC_MUX1_CFG0, 0x00},
>>>
> --
> Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
> is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
>
next prev parent reply other threads:[~2021-09-28 8:31 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <agross@kernel.org; bjorn.andersson@linaro.org; lgirdwood@gmail.com; broonie@kernel.org;robh+dt@kernel.org; plai@codeaurora.org; bgoswami@codeaurora.org; perex@perex.cz; tiwai@suse.com;srinivas.kandagatla@linaro.org; rohitkr@codeaurora.org; linu>
2021-09-22 12:31 ` [PATCH v2 0/5] Update Lpass digital codec macro drivers Srinivasa Rao Mandadapu
2021-09-22 12:31 ` [PATCH v2 1/5] ASoC: qcom: Add compatible names in va,wsa,rx,tx codec drivers for sc7280 Srinivasa Rao Mandadapu
2021-09-22 12:31 ` [PATCH v2 2/5] ASoC: qcom: dt-bindings: Add compatible names for lpass sc7280 digital codecs Srinivasa Rao Mandadapu
2021-09-27 19:01 ` Rob Herring
2021-09-22 12:31 ` [PATCH v2 3/5] ASoC: codecs: tx-macro: Enable tx top soundwire mic clock Srinivasa Rao Mandadapu
2021-09-27 12:21 ` Srinivas Kandagatla
2021-09-27 16:45 ` Srinivasa Rao Mandadapu
2021-09-27 16:47 ` Srinivasa Rao Mandadapu
2021-10-08 14:08 ` Srinivasa Rao Mandadapu
2021-09-22 12:31 ` [PATCH v2 4/5] ASoC: codecs: tx-macro: Update tx default values Srinivasa Rao Mandadapu
2021-09-27 10:42 ` Srinivas Kandagatla
[not found] ` <20ddc4ea-e99c-5492-1931-be1999655563@codeaurora.org>
2021-09-28 8:31 ` Srinivas Kandagatla [this message]
2021-10-08 14:07 ` Srinivasa Rao Mandadapu
2021-10-08 15:30 ` Mark Brown
2021-09-22 12:31 ` [PATCH v2 5/5] ASoC: codecs: Change bulk clock voting to optional voting in digital codecs Srinivasa Rao Mandadapu
2021-09-27 10:42 ` Srinivas Kandagatla
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=da23bfce-23cd-0869-d752-b0713136072a@linaro.org \
--to=srinivas.kandagatla@linaro.org \
--cc=agross@kernel.org \
--cc=alsa-devel@alsa-project.org \
--cc=bgoswami@codeaurora.org \
--cc=bjorn.andersson@linaro.org \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=judyhsiao@chromium.org \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=perex@perex.cz \
--cc=plai@codeaurora.org \
--cc=potturu@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=rohitkr@codeaurora.org \
--cc=srivasam@codeaurora.org \
--cc=swboyd@chromium.org \
--cc=tiwai@suse.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).