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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Matthias Kaehlcke <mka@chromium.org>,
	Rajendra Nayak <quic_rjendra@quicinc.com>,
	Georgi Djakov <djakov@kernel.org>
Cc: agross@kernel.org, andersson@kernel.org,
	konrad.dybcio@somainline.org, robh+dt@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
	Douglas Anderson <dianders@chromium.org>,
	Stephen Boyd <swboyd@chromium.org>
Subject: Re: [PATCH v2 4/4] arm64: dts: qcom: sc7280: Add cpu and llcc BWMON (=> interconnect issue)
Date: Sun, 15 Jan 2023 16:13:40 +0100	[thread overview]
Message-ID: <dc5487d8-d31e-28c6-07e8-8d1ff54a4ba4@linaro.org> (raw)
In-Reply-To: <Y8Ggh6RObbB1cxSS@google.com>

On 13/01/2023 19:18, Matthias Kaehlcke wrote:
> Hi,
> 
> On Fri, Sep 02, 2022 at 10:05:11AM +0530, Rajendra Nayak wrote:
>> Add cpu and llcc BWMON nodes and their corresponding
>> OPP tables for sc7280 SoC.
>>
>> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> I found that with a v6.1 kernel AOSS on sc7280 doesn't reach it's low
> power state during system. This can be observed on herobrine based
> boards on which the AP_SUSPEND signal should transition to 1 during
> system suspend. If it doesn't the Embedded Controller (EC) notices
> it and wakes the system up again.
> 
> Bisection points to this patch, the issue only occurs when
> CONFIG_QCOM_ICC_BWMON is *not* set. One might think the patch shouldn't
> have any impact at all when the driver is not enabled, but it does.
> 
> Debugging shows that the issue is interconnect related. A bare platform
> device is created for each bwmon devices, which results in the average
> and peak bandwidth of the interconnect link to be set 'initially' to
> INT_MAX. The driver is supposed to call icc_sync_state() during probe,

This is for interconnect providers, not consumers.

> which would set the initially bandwidths to 0 and determine the actually
> needed bandwidth. But since the driver isn't probed the initial
> bandwidths stay at INT_MAX.
> 
> This isn't actually an issue with this patch, but how the interconnect
> framework deals with devices that are registered on the bus, but aren't
> probed (yet). Not sure how this would be best fixed. Georgi, do you have
> any ideas?

Why the device is not probed (yet)? If it is registered, it will come
soon during boot up.

Best regards,
Krzysztof


  reply	other threads:[~2023-01-15 15:13 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-02  4:35 [PATCH v2 0/4] soc: qcom: icc-bwmon: Add support for llcc and cpu bwmon on sc7280 Rajendra Nayak
2022-09-02  4:35 ` [PATCH v2 1/4] dt-bindings: interconnect: qcom,msm8998-bwmon: Add support for sc7280 BWMONs Rajendra Nayak
2022-09-02  4:35 ` [PATCH v2 2/4] soc: qcom: icc-bwmon: add support for sc7280 LLCC BWMON Rajendra Nayak
2022-09-02  4:35 ` [PATCH v2 3/4] soc: qcom: icc-bwmon: force clear counter/irq registers Rajendra Nayak
2022-09-02  4:35 ` [PATCH v2 4/4] arm64: dts: qcom: sc7280: Add cpu and llcc BWMON Rajendra Nayak
2022-09-07 21:33   ` Stephen Boyd
2022-09-08  8:55     ` Krzysztof Kozlowski
2023-01-13 18:18   ` [PATCH v2 4/4] arm64: dts: qcom: sc7280: Add cpu and llcc BWMON (=> interconnect issue) Matthias Kaehlcke
2023-01-15 15:13     ` Krzysztof Kozlowski [this message]
2023-01-17 17:27       ` Matthias Kaehlcke
2023-01-17 17:33         ` Krzysztof Kozlowski
2023-01-17 17:47           ` Matthias Kaehlcke
2023-01-20 21:32             ` Matthias Kaehlcke
2023-01-24  0:02               ` Georgi Djakov
2023-01-25  1:04                 ` Matthias Kaehlcke
2022-09-06 16:38 ` (subset) [PATCH v2 0/4] soc: qcom: icc-bwmon: Add support for llcc and cpu bwmon on sc7280 Bjorn Andersson

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