From: Jianmin Lv <lvjianmin@loongson.cn>
To: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, Hanjun Guo <guohanjun@huawei.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH V13 07/13] irqchip/loongson-pch-msi: Add ACPI init support
Date: Thu, 30 Jun 2022 10:51:44 +0800 [thread overview]
Message-ID: <dd677e76-b215-04fb-b68e-e540cf4d5492@loongson.cn> (raw)
In-Reply-To: <87sfnn1ui2.wl-maz@kernel.org>
On 2022/6/29 下午9:15, Marc Zyngier wrote:
> On Mon, 27 Jun 2022 12:39:51 +0100,
> Jianmin Lv <lvjianmin@loongson.cn> wrote:
>>
>> From: Huacai Chen <chenhuacai@loongson.cn>
>>
>> We are preparing to add new Loongson (based on LoongArch, not compatible
>> with old MIPS-based Loongson) support. LoongArch use ACPI other than DT
>> as its boot protocol, so add ACPI init support.
>
> Same rant about the content-less paragraph, which I asked you to drop
> a few version ago.
>
Ok, I only dropped it for the patch that you reviewed in previous
version, without handling other similar patches. I'll drop it for all
similar patch in next version.
>>
>> PCH-PIC/PCH-MSI stands for "Interrupt Controller" that described in
>> Section 5 of "Loongson 7A1000 Bridge User Manual". For more information
>> please refer Documentation/loongarch/irq-chip-model.rst.
>>
>> For systems with two chipsets, there are two related msi irqdomains,
>> each of which has the same node id as its parent irqdomain. So we
>> use a structure to mantain the relation of node and it's parent
>> irqdomain as pch irqdomin, and add a pci_segment field to it for
>> matching the pci segment of a pci device when setting msi irqdomain
>> for the device.
>>
>> struct acpi_vector_group {
>> int node;
>> int pci_segment;
>> struct irq_domain *parent;
>> };
>>
>> The field 'pci_segment' and 'node' are initialized from MCFG, and
>> the parent irqdomain will set field 'parent' by matching same
>> 'node'.
>>
>> Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn>
>> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
>> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
>> ---
>> arch/loongarch/include/asm/irq.h | 7 +-
>> arch/loongarch/kernel/irq.c | 30 ++++++-
>> drivers/irqchip/irq-loongson-pch-msi.c | 147 +++++++++++++++++++++++----------
>> 3 files changed, 138 insertions(+), 46 deletions(-)
>>
>> diff --git a/arch/loongarch/include/asm/irq.h b/arch/loongarch/include/asm/irq.h
>> index a444dc6..367aa44 100644
>> --- a/arch/loongarch/include/asm/irq.h
>> +++ b/arch/loongarch/include/asm/irq.h
>> @@ -50,9 +50,11 @@ static inline bool on_irq_stack(int cpu, unsigned long sp)
>>
>> struct acpi_vector_group {
>> int node;
>> + int pci_segment;
>> struct irq_domain *parent;
>> };
>> extern struct acpi_vector_group pch_group[MAX_IO_PICS];
>> +extern struct acpi_vector_group msi_group[MAX_IO_PICS];
>>
>> #define CORES_PER_EIO_NODE 4
>>
>> @@ -112,9 +114,8 @@ struct irq_domain *htvec_acpi_init(struct irq_domain *parent,
>> struct acpi_madt_ht_pic *acpi_htvec);
>> int pch_lpc_acpi_init(struct irq_domain *parent,
>> struct acpi_madt_lpc_pic *acpi_pchlpc);
>> -struct irq_domain *pch_msi_acpi_init(struct irq_domain *parent,
>> - struct acpi_madt_msi_pic *acpi_pchmsi);
>> int find_pch_pic(u32 gsi);
>> +struct fwnode_handle *get_pch_msi_handle(int pci_segment);
>>
>> extern struct acpi_madt_lio_pic *acpi_liointc;
>> extern struct acpi_madt_eio_pic *acpi_eiointc[MAX_IO_PICS];
>> @@ -127,7 +128,7 @@ struct irq_domain *pch_msi_acpi_init(struct irq_domain *parent,
>> extern struct irq_domain *cpu_domain;
>> extern struct irq_domain *liointc_domain;
>> extern struct fwnode_handle *pch_lpc_handle;
>> -extern struct irq_domain *pch_msi_domain[MAX_IO_PICS];
>> +extern struct fwnode_handle *pch_msi_handle[MAX_IO_PICS];
>> extern struct fwnode_handle *pch_pic_handle[MAX_IO_PICS];
>>
>> extern irqreturn_t loongson3_ipi_interrupt(int irq, void *dev);
>> diff --git a/arch/loongarch/kernel/irq.c b/arch/loongarch/kernel/irq.c
>> index f2115be..82bc6c7 100644
>> --- a/arch/loongarch/kernel/irq.c
>> +++ b/arch/loongarch/kernel/irq.c
>> @@ -27,8 +27,8 @@
>>
>> struct irq_domain *cpu_domain;
>> struct irq_domain *liointc_domain;
>> -struct irq_domain *pch_msi_domain[MAX_IO_PICS];
>> struct acpi_vector_group pch_group[MAX_IO_PICS];
>> +struct acpi_vector_group msi_group[MAX_IO_PICS];
>>
>> /*
>> * 'what should we do if we get a hw irq event on an illegal vector'.
>> @@ -55,6 +55,33 @@ int arch_show_interrupts(struct seq_file *p, int prec)
>> return 0;
>> }
>>
>> +static int early_pci_mcfg_parse(struct acpi_table_header *header)
>
> Shouldn't this be __init as well?
>
Yes, thanks, it should be __init too.
>> +{
>> + struct acpi_table_mcfg *mcfg;
>> + struct acpi_mcfg_allocation *mptr;
>> + int i, n;
>> +
>> + if (header->length < sizeof(struct acpi_table_mcfg))
>> + return -EINVAL;
>> +
>> + n = (header->length - sizeof(struct acpi_table_mcfg)) /
>> + sizeof(struct acpi_mcfg_allocation);
>> + mcfg = (struct acpi_table_mcfg *)header;
>> + mptr = (struct acpi_mcfg_allocation *) &mcfg[1];
>> +
>> + for (i = 0; i < n; i++, mptr++) {
>> + msi_group[i].pci_segment = mptr->pci_segment;
>> + msi_group[i].node = (mptr->address >> 44) & 0xf;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +void __init init_msi_parent_group(void)
>> +{
>> + acpi_table_parse(ACPI_SIG_MCFG, early_pci_mcfg_parse);
>> +}
>> +
>> void __init init_IRQ(void)
>> {
>> int i;
>> @@ -68,6 +95,7 @@ void __init init_IRQ(void)
>> clear_csr_ecfg(ECFG0_IM);
>> clear_csr_estat(ESTATF_IP);
>>
>> + init_msi_parent_group();
>
> The changes in this file should be a separate patch, as it is
> completely independent.
>
Ok, I'll put it in a separate patch.
>> irqchip_init();
>> #ifdef CONFIG_SMP
>> ipi_irq = EXCCODE_IPI - EXCCODE_INT_START;
>> diff --git a/drivers/irqchip/irq-loongson-pch-msi.c b/drivers/irqchip/irq-loongson-pch-msi.c
>> index e3801c4..5db4a68 100644
>> --- a/drivers/irqchip/irq-loongson-pch-msi.c
>> +++ b/drivers/irqchip/irq-loongson-pch-msi.c
>> @@ -15,14 +15,30 @@
>> #include <linux/pci.h>
>> #include <linux/slab.h>
>>
>> +static int nr_pics;
>> +
>> struct pch_msi_data {
>> struct mutex msi_map_lock;
>> phys_addr_t doorbell;
>> u32 irq_first; /* The vector number that MSIs starts */
>> u32 num_irqs; /* The number of vectors for MSIs */
>> unsigned long *msi_map;
>> + struct fwnode_handle *domain_handle;
>> };
>>
>> +static struct pch_msi_data *pch_msi_priv[2];
>
> What is this '2'?
>
Yes, I should use MAX_IO_PICS, thanks.
>> +
>> +struct fwnode_handle *get_pch_msi_handle(int pci_segment)
>> +{
>> + int i;
>> +
>> + for (i = 0; i < MAX_IO_PICS; i++) {
>> + if (msi_group[i].pci_segment == pci_segment)
>
> AFAICT, this driver is supposed to compile on MIPS too. Clearly, you
> haven't bothered checking that it was still building:
>
> drivers/irqchip/irq-loongson-pch-msi.c: In function ‘get_pch_msi_handle’:
> drivers/irqchip/irq-loongson-pch-msi.c:35:18: error: ‘MAX_IO_PICS’ undeclared (first use in this function)
> 35 | for (i = 0; i < MAX_IO_PICS; i++) {
> | ^~~~~~~~~~~
> drivers/irqchip/irq-loongson-pch-msi.c:35:18: note: each undeclared identifier is reported only once for each function it appears in
> drivers/irqchip/irq-loongson-pch-msi.c:36:7: error: ‘msi_group’ undeclared (first use in this function); did you mean ‘task_group’?
> 36 | if (msi_group[i].pci_segment == pci_segment)
> | ^~~~~~~~~
> | task_group
>
> I've stopped here.
So sorry for that, I got it, I'll fix them and test on both of LoongArch
and MIPS machine.
>
> M.
>
next prev parent reply other threads:[~2022-06-30 2:52 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-27 11:39 [PATCH V13 00/13] irqchip: Add LoongArch-related irqchip drivers Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 01/13] APCI: irq: Add support for multiple GSI domains Jianmin Lv
2022-06-28 12:50 ` Hanjun Guo
2022-06-27 11:39 ` [PATCH V13 02/13] ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallback Jianmin Lv
2022-06-28 13:26 ` Hanjun Guo
2022-06-27 11:39 ` [PATCH V13 03/13] genirq/generic_chip: export irq_unmap_generic_chip Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 04/13] LoongArch: Use ACPI_GENERIC_GSI for gsi handling Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 05/13] irqchip: Add Loongson PCH LPC controller support Jianmin Lv
2022-06-29 10:58 ` Marc Zyngier
2022-06-30 4:40 ` Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 06/13] irqchip/loongson-pch-pic: Add ACPI init support Jianmin Lv
2022-06-29 11:20 ` Marc Zyngier
2022-06-30 4:36 ` Jianmin Lv
2022-06-30 7:22 ` Marc Zyngier
2022-06-30 8:37 ` Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 07/13] irqchip/loongson-pch-msi: " Jianmin Lv
2022-06-29 13:15 ` Marc Zyngier
2022-06-30 2:51 ` Jianmin Lv [this message]
2022-06-27 11:39 ` [PATCH V13 08/13] irqchip/loongson-htvec: " Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 09/13] irqchip/loongson-liointc: " Jianmin Lv
2022-06-29 13:13 ` Marc Zyngier
2022-06-30 2:52 ` Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 10/13] irqchip: Add Loongson Extended I/O interrupt controller support Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 11/13] irqchip: Add LoongArch CPU " Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 12/13] irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArch Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 13/13] LoongArch: Fix irq number for timer and ipi Jianmin Lv
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