From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754502AbdIFCYP (ORCPT ); Tue, 5 Sep 2017 22:24:15 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:5975 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752340AbdIFCYM (ORCPT ); Tue, 5 Sep 2017 22:24:12 -0400 Subject: Re: [RFC PATCH 6/6] iommu/arm-smmu-v3: Avoid ILLEGAL setting of STE.S1STALLD and CD.S To: Jean-Philippe Brucker References: <1504167642-14922-1-git-send-email-xieyisheng1@huawei.com> <1504167642-14922-7-git-send-email-xieyisheng1@huawei.com> <738977bb-4cd7-7d86-0ea0-0c88b6af721c@arm.com> CC: , , , , , , , , , , , , , , , , , , , , From: Yisheng Xie Message-ID: Date: Wed, 6 Sep 2017 10:23:00 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.1.0 MIME-Version: 1.0 In-Reply-To: <738977bb-4cd7-7d86-0ea0-0c88b6af721c@arm.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.29.40] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.59AF5C1A.00C2,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: eaac97f5f94b6b047243d4909bd1c3ff Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jean-Philippe, On 2017/9/5 20:54, Jean-Philippe Brucker wrote: > On 31/08/17 09:20, Yisheng Xie wrote: >> It is ILLEGAL to set STE.S1STALLD if STALL_MODEL is not 0b00, which >> means we should not disable stall mode if stall/terminate mode is not >> configuable. >> >> Meanwhile, it is also ILLEGAL when STALL_MODEL==0b10 && CD.S==0 which >> means if stall mode is force we should always set CD.S. >> >> This patch add ARM_SMMU_FEAT_TERMINATE feature bit for smmu, and use >> TERMINATE feature checking to ensue above ILLEGAL cases from happening. >> >> Signed-off-by: Yisheng Xie >> --- >> drivers/iommu/arm-smmu-v3.c | 22 ++++++++++++++++------ >> 1 file changed, 16 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c >> index dbda2eb..0745522 100644 >> --- a/drivers/iommu/arm-smmu-v3.c >> +++ b/drivers/iommu/arm-smmu-v3.c >> @@ -55,6 +55,7 @@ >> #define IDR0_STALL_MODEL_SHIFT 24 >> #define IDR0_STALL_MODEL_MASK 0x3 >> #define IDR0_STALL_MODEL_STALL (0 << IDR0_STALL_MODEL_SHIFT) >> +#define IDR0_STALL_MODEL_NS (1 << IDR0_STALL_MODEL_SHIFT) >> #define IDR0_STALL_MODEL_FORCE (2 << IDR0_STALL_MODEL_SHIFT) >> #define IDR0_TTENDIAN_SHIFT 21 >> #define IDR0_TTENDIAN_MASK 0x3 >> @@ -766,6 +767,7 @@ struct arm_smmu_device { >> #define ARM_SMMU_FEAT_SVM (1 << 15) >> #define ARM_SMMU_FEAT_HA (1 << 16) >> #define ARM_SMMU_FEAT_HD (1 << 17) >> +#define ARM_SMMU_FEAT_TERMINATE (1 << 18) > > I'd rather introduce something like "ARM_SMMU_FEAT_STALL_FORCE" instead. > Terminate model has another meaning, and is defined by a different bit in > IDR0. Ok, sound more reasonable. Thanks Yisheng Xie > > Thanks, > Jean > > . >