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From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
	robh+dt@kernel.org, mathieu.poirier@linaro.org,
	leo.yan@linaro.org, alexander.shishkin@linux.intel.com,
	andy.gross@linaro.org, david.brown@linaro.org,
	vivek.gautam@codeaurora.org, dianders@chromium.org,
	sboyd@kernel.org, bjorn.andersson@linaro.org,
	devicetree@vger.kernel.org, mark.rutland@arm.com
Cc: rnayak@codeaurora.org, sibis@codeaurora.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	John.Horley@arm.com
Subject: Re: [PATCHv4 1/4] arm64: dts: qcom: sdm845: Add Coresight support
Date: Thu, 24 Jan 2019 23:51:28 +0530	[thread overview]
Message-ID: <de6e021a-4f9a-8e2e-dff0-1e7c61ad8b2b@codeaurora.org> (raw)
In-Reply-To: <18b70426-60fe-4871-6388-6e09fd5feb37@arm.com>

Hi Suzuki,

On 1/24/2019 4:49 PM, Suzuki K Poulose wrote:
> Hi Sai,
> 
> 
> That looks fine with me. But as Mathieu said, this needs to be a separate
> patch. But before all that please could you provide me the PIDR4 value for
> the Kryo A75 and A55 please ?
> 

Sure.

PIDR4 value is 0x4.

I get it now. So we are looking for JEP106 identification(PIDR1[7:4] and
PIDR2[2:0]) and continuation code(PIDR4[3:0]).

 From ARM Coresight Spec:

DES_0, PIDR1 bits[7:4] JEP106 identification code bits[3:0].
DES_1, PIDR2 bits[2:0] JEP106 identification code bits[6:4].
DES_2, PIDR4 bits[3:0] JEP106 continuation code.

For SDM845(A75 based):

*0xB_B8_03* does indicate that the JEP106 identification
code is 0x3B and continuation code is 0x4 which is of ARM and not
QCOM(JEP106 ID is 0x70) which is expected.

And the other values of PIDR0[0:7] and PIDR1[3:0] are *Implementation
defined part numbers* and can be different from ARM A75/A55.

I think this clears up case for SDM845.

As for MSM8996, it is not based on any ARM derivative and hence the
JEP106 ID is of QCOM(0x70) from the value of pid = *0xF_02_11*
based on PIDR1[7:4] and PIDR2[2:0]. This clears this as well.

Please correct me if I am wrong and also let me know if I can
continue with PID addition to table.

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

  reply	other threads:[~2019-01-24 18:21 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-22 13:37 [PATCHv4 0/4] Add coresight support for SDM845 and MSM8996 Sai Prakash Ranjan
2019-01-22 13:37 ` [PATCHv4 1/4] arm64: dts: qcom: sdm845: Add Coresight support Sai Prakash Ranjan
2019-01-22 14:00   ` Suzuki K Poulose
2019-01-22 15:02     ` Sai Prakash Ranjan
2019-01-22 16:08       ` Suzuki K Poulose
2019-01-22 16:48         ` Sai Prakash Ranjan
2019-01-22 20:12           ` Suzuki K Poulose
2019-01-23 12:11             ` Sai Prakash Ranjan
2019-01-23 19:14               ` Mathieu Poirier
2019-01-23 20:17                 ` Sai Prakash Ranjan
2019-01-24 16:07                   ` Marc Gonzalez
2019-01-24 18:24                     ` Sai Prakash Ranjan
2019-01-24 16:07                   ` Mathieu Poirier
2019-01-24 18:31                     ` Sai Prakash Ranjan
2019-01-24 11:19               ` Suzuki K Poulose
2019-01-24 18:21                 ` Sai Prakash Ranjan [this message]
2019-01-28 17:15                   ` Mathieu Poirier
2019-01-28 19:17                     ` Sai Prakash Ranjan
2019-01-22 13:37 ` [PATCHv4 2/4] arm64: dts: qcom: msm8996: " Sai Prakash Ranjan
2019-01-22 13:37 ` [PATCHv4 3/4] coresight: etm4x: Add support to enable ETMv4.2 Sai Prakash Ranjan
2019-01-22 13:37 ` [PATCHv4 4/4] arm64: dts: qcom: sdm845: Remove the duplicate header inclusion Sai Prakash Ranjan

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