From: "Gupta, Pankaj" <pankaj.gupta@amd.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: pbonzini@redhat.com, mlevitsk@redhat.com, seanjc@google.com,
joro@8bytes.org, jon.grimm@amd.com, wei.huang2@amd.com,
terry.bowman@amd.com
Subject: Re: [PATCH v4 02/15] KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD
Date: Mon, 9 May 2022 16:27:44 +0200 [thread overview]
Message-ID: <e02cff98-922f-7093-d674-5f81caf14a48@amd.com> (raw)
In-Reply-To: <20220508023930.12881-3-suravee.suthikulpanit@amd.com>
> To signify that the macros only support 8-bit xAPIC destination ID.
>
> Suggested-by: Maxim Levitsky <mlevitsk@redhat.com>
> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
> arch/x86/hyperv/hv_apic.c | 2 +-
> arch/x86/include/asm/apicdef.h | 4 ++--
> arch/x86/kernel/apic/apic.c | 2 +-
> arch/x86/kernel/apic/ipi.c | 2 +-
> arch/x86/kvm/lapic.c | 2 +-
> arch/x86/kvm/svm/avic.c | 4 ++--
> 6 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
> index db2d92fb44da..fb8b2c088681 100644
> --- a/arch/x86/hyperv/hv_apic.c
> +++ b/arch/x86/hyperv/hv_apic.c
> @@ -46,7 +46,7 @@ static void hv_apic_icr_write(u32 low, u32 id)
> {
> u64 reg_val;
>
> - reg_val = SET_APIC_DEST_FIELD(id);
> + reg_val = SET_XAPIC_DEST_FIELD(id);
> reg_val = reg_val << 32;
> reg_val |= low;
>
> diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
> index 5716f22f81ac..863c2cad5872 100644
> --- a/arch/x86/include/asm/apicdef.h
> +++ b/arch/x86/include/asm/apicdef.h
> @@ -89,8 +89,8 @@
> #define APIC_DM_EXTINT 0x00700
> #define APIC_VECTOR_MASK 0x000FF
> #define APIC_ICR2 0x310
> -#define GET_APIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
> -#define SET_APIC_DEST_FIELD(x) ((x) << 24)
> +#define GET_XAPIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
> +#define SET_XAPIC_DEST_FIELD(x) ((x) << 24)
> #define APIC_LVTT 0x320
> #define APIC_LVTTHMR 0x330
> #define APIC_LVTPC 0x340
> diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> index b70344bf6600..e6b754e43ed7 100644
> --- a/arch/x86/kernel/apic/apic.c
> +++ b/arch/x86/kernel/apic/apic.c
> @@ -275,7 +275,7 @@ void native_apic_icr_write(u32 low, u32 id)
> unsigned long flags;
>
> local_irq_save(flags);
> - apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id));
> + apic_write(APIC_ICR2, SET_XAPIC_DEST_FIELD(id));
> apic_write(APIC_ICR, low);
> local_irq_restore(flags);
> }
> diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
> index d1fb874fbe64..2a6509e8c840 100644
> --- a/arch/x86/kernel/apic/ipi.c
> +++ b/arch/x86/kernel/apic/ipi.c
> @@ -99,7 +99,7 @@ void native_send_call_func_ipi(const struct cpumask *mask)
>
> static inline int __prepare_ICR2(unsigned int mask)
> {
> - return SET_APIC_DEST_FIELD(mask);
> + return SET_XAPIC_DEST_FIELD(mask);
> }
>
> static inline void __xapic_wait_icr_idle(void)
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 137c3a2f5180..8b8c4a905976 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1326,7 +1326,7 @@ void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
> if (apic_x2apic_mode(apic))
> irq.dest_id = icr_high;
> else
> - irq.dest_id = GET_APIC_DEST_FIELD(icr_high);
> + irq.dest_id = GET_XAPIC_DEST_FIELD(icr_high);
>
> trace_kvm_apic_ipi(icr_low, irq.dest_id);
>
> diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
> index 54fe03714f8a..a8f514212b87 100644
> --- a/arch/x86/kvm/svm/avic.c
> +++ b/arch/x86/kvm/svm/avic.c
> @@ -328,7 +328,7 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm, struct kvm_lapic *source
> if (apic_x2apic_mode(vcpu->arch.apic))
> dest = icrh;
> else
> - dest = GET_APIC_DEST_FIELD(icrh);
> + dest = GET_XAPIC_DEST_FIELD(icrh);
>
> /*
> * Try matching the destination APIC ID with the vCPU.
> @@ -364,7 +364,7 @@ static void avic_kick_target_vcpus(struct kvm *kvm, struct kvm_lapic *source,
> */
> kvm_for_each_vcpu(i, vcpu, kvm) {
> if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK,
> - GET_APIC_DEST_FIELD(icrh),
> + GET_XAPIC_DEST_FIELD(icrh),
> icrl & APIC_DEST_MASK)) {
> vcpu->arch.apic->irr_pending = true;
> svm_complete_interrupt_delivery(vcpu,
Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com>
next prev parent reply other threads:[~2022-05-09 14:28 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-08 2:39 [PATCH v4 00/15] Introducing AMD x2AVIC and hybrid-AVIC modes Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 01/15] x86/cpufeatures: Introduce x2AVIC CPUID bit Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 02/15] KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD Suravee Suthikulpanit
2022-05-09 14:27 ` Gupta, Pankaj [this message]
2022-05-08 2:39 ` [PATCH v4 03/15] KVM: SVM: Detect X2APIC virtualization (x2AVIC) support Suravee Suthikulpanit
2022-05-09 10:15 ` Maxim Levitsky
2022-05-08 2:39 ` [PATCH v4 04/15] KVM: SVM: Update max number of vCPUs supported for x2AVIC mode Suravee Suthikulpanit
2022-05-09 13:35 ` Gupta, Pankaj
2022-05-08 2:39 ` [PATCH v4 05/15] KVM: SVM: Update avic_kick_target_vcpus to support 32-bit APIC ID Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 06/15] KVM: SVM: Do not support updating APIC ID when in x2APIC mode Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 07/15] KVM: SVM: Adding support for configuring x2APIC MSRs interception Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 08/15] KVM: x86: Deactivate APICv on vCPU with APIC disabled Suravee Suthikulpanit
2022-05-09 10:18 ` Maxim Levitsky
2022-05-09 10:30 ` Maxim Levitsky
2022-05-09 10:19 ` Maxim Levitsky
2022-05-08 2:39 ` [PATCH v4 09/15] KVM: SVM: Refresh AVIC configuration when changing APIC mode Suravee Suthikulpanit
2022-05-09 10:22 ` Maxim Levitsky
2022-05-08 2:39 ` [PATCH v4 10/15] KVM: SVM: Introduce helper functions to (de)activate AVIC and x2AVIC Suravee Suthikulpanit
2022-05-09 13:42 ` Maxim Levitsky
2022-05-11 15:37 ` Suravee Suthikulpanit
2022-05-11 16:26 ` Maxim Levitsky
2022-05-08 2:39 ` [PATCH v4 11/15] KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu Suravee Suthikulpanit
2022-05-09 13:40 ` Gupta, Pankaj
2022-05-08 2:39 ` [PATCH v4 12/15] KVM: SVM: Introduce hybrid-AVIC mode Suravee Suthikulpanit
2022-05-09 11:23 ` Suthikulpanit, Suravee
2022-05-08 2:39 ` [PATCH v4 13/15] KVM: x86: Warning APICv inconsistency only when vcpu APIC mode is valid Suravee Suthikulpanit
2022-05-09 13:38 ` Gupta, Pankaj
2022-05-08 2:39 ` [PATCH v4 14/15] KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 15/15] KVM: SVM: Add AVIC doorbell tracepoint Suravee Suthikulpanit
2022-05-09 10:28 ` [PATCH v4 00/15] Introducing AMD x2AVIC and hybrid-AVIC modes Maxim Levitsky
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