From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EAA7C3F68F for ; Thu, 30 Jan 2020 15:21:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2ECF920707 for ; Thu, 30 Jan 2020 15:21:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727334AbgA3PVO convert rfc822-to-8bit (ORCPT ); Thu, 30 Jan 2020 10:21:14 -0500 Received: from eu-smtp-delivery-151.mimecast.com ([146.101.78.151]:54864 "EHLO eu-smtp-delivery-151.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727186AbgA3PVO (ORCPT ); Thu, 30 Jan 2020 10:21:14 -0500 Received: from AcuMS.aculab.com (156.67.243.126 [156.67.243.126]) (Using TLS) by relay.mimecast.com with ESMTP id uk-mta-41-bGG4hDvvOfmWYjQy5O4gVw-1; Thu, 30 Jan 2020 15:21:09 +0000 Received: from AcuMS.Aculab.com (fd9f:af1c:a25b:0:43c:695e:880f:8750) by AcuMS.aculab.com (fd9f:af1c:a25b:0:43c:695e:880f:8750) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 30 Jan 2020 15:21:09 +0000 Received: from AcuMS.Aculab.com ([fe80::43c:695e:880f:8750]) by AcuMS.aculab.com ([fe80::43c:695e:880f:8750%12]) with mapi id 15.00.1347.000; Thu, 30 Jan 2020 15:21:09 +0000 From: David Laight To: 'Peter Zijlstra' , Hans de Goede CC: Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Vipul Kumar , Vipul Kumar , Daniel Lezcano , Srikanth Krishnakar , Cedric Hombourger , Len Brown , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "stable@vger.kernel.org" Subject: RE: [PATCH 3/3] x86/tsc_msr: Make MSR derived TSC frequency more accurate Thread-Topic: [PATCH 3/3] x86/tsc_msr: Make MSR derived TSC frequency more accurate Thread-Index: AQHV13M/Jf366MsxW0K0cA6JkRCOwKgDUdtg Date: Thu, 30 Jan 2020 15:21:08 +0000 Message-ID: References: <20200130115255.20840-1-hdegoede@redhat.com> <20200130115255.20840-3-hdegoede@redhat.com> <20200130134310.GX14914@hirez.programming.kicks-ass.net> In-Reply-To: <20200130134310.GX14914@hirez.programming.kicks-ass.net> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.202.205.107] MIME-Version: 1.0 X-MC-Unique: bGG4hDvvOfmWYjQy5O4gVw-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: aculab.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peter Zijlstra > Sent: 30 January 2020 13:43 ... > > + * Bay Trail SDM MSR_FSB_FREQ frequencies simplified PLL model: > > + * 000: 100 * 5 / 6 = 83.3333 MHz > > + * 001: 100 * 1 / 1 = 100.0000 MHz > > + * 010: 100 * 4 / 3 = 133.3333 MHz > > + * 011: 100 * 7 / 6 = 116.6667 MHz > > + * 100: 100 * 4 / 5 = 80.0000 MHz > > > + * Cherry Trail SDM MSR_FSB_FREQ frequencies simplified PLL model: > > + * 0000: 100 * 5 / 6 = 83.3333 MHz > > + * 0001: 100 * 1 / 1 = 100.0000 MHz > > + * 0010: 100 * 4 / 3 = 133.3333 MHz > > + * 0011: 100 * 7 / 6 = 116.6667 MHz > > + * 0100: 100 * 4 / 5 = 80.0000 MHz > > + * 0101: 100 * 14 / 15 = 93.3333 MHz > > + * 0110: 100 * 9 / 10 = 90.0000 MHz > > + * 0111: 100 * 8 / 9 = 88.8889 MHz > > + * 1000: 100 * 7 / 8 = 87.5000 MHz > > > + * Merriefield (BYT MID) SDM MSR_FSB_FREQ frequencies simplified PLL model: > > + * 0001: 100 * 1 / 1 = 100.0000 MHz > > + * 0010: 100 * 4 / 3 = 133.3333 MHz > > > + * Moorefield (CHT MID) SDM MSR_FSB_FREQ frequencies simplified PLL model: > > + * 0000: 100 * 5 / 6 = 83.3333 MHz > > + * 0001: 100 * 1 / 1 = 100.0000 MHz > > + * 0010: 100 * 4 / 3 = 133.3333 MHz > > + * 0011: 100 * 1 / 1 = 100.0000 MHz > > Unless I'm going cross-eyed, that's 4 times the exact same table. Apart from the very last line which duplicates 100MHz. And the fact that some entries are missing (presumed invalid?) for certain cpu. If the tables are ever used for setting the frequency then the valid range (and values?) would need to be known. I did wonder if the 'mask' was necessary? Are the unused bits reserved and zero? David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)